ARM: dts: logicpd-som-lv: Resync DTS files with Linux 5.17-rc5
authorAdam Ford <aford173@gmail.com>
Sat, 26 Feb 2022 16:49:47 +0000 (10:49 -0600)
committerTom Rini <trini@konsulko.com>
Thu, 10 Mar 2022 18:57:04 +0000 (13:57 -0500)
Resync the DTS files for the Logic PD SOM-LV with Linux 5.17-rc5
with some additional pending changes to address issues with
wrong pin-muxing on the OMAP35.

Signed-off-by: Adam Ford <aford173@gmail.com>
arch/arm/dts/logicpd-som-lv-35xx-devkit.dts
arch/arm/dts/logicpd-som-lv-37xx-devkit.dts
arch/arm/dts/logicpd-som-lv-baseboard.dtsi
arch/arm/dts/logicpd-som-lv.dtsi

index f7a841a..f690bc8 100644 (file)
@@ -9,5 +9,19 @@
 
 / {
        model = "LogicPD Zoom OMAP35xx SOM-LV Development Kit";
-       compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3";
+       compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3430", "ti,omap3";
+};
+
+&omap3_pmx_core2 {
+
+       hsusb2_2_pins: pinmux_hsusb2_2_pins {
+               pinctrl-single,pins = <
+                       OMAP3430_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
+                       OMAP3430_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
+                       OMAP3430_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
+                       OMAP3430_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
+                       OMAP3430_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
+                       OMAP3430_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
+               >;
+       };
 };
index a604d92..e28e962 100644 (file)
        model = "LogicPD Zoom DM3730 SOM-LV Development Kit";
        compatible = "logicpd,dm3730-som-lv-devkit", "ti,omap3630", "ti,omap3";
 };
+
+&omap3_pmx_core2 {
+
+       hsusb2_2_pins: pinmux_hsusb2_2_pins {
+               pinctrl-single,pins = <
+                       OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
+                       OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
+                       OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
+                       OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
+                       OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
+                       OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
+               >;
+       };
+};
index 100396f..7d0468a 100644 (file)
@@ -51,6 +51,8 @@
 
 &mcbsp2 {
        status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcbsp2_pins>;
 };
 
 &charger {
@@ -77,7 +79,7 @@
 };
 
 &dss {
-       status = "ok";
+       status = "okay";
        vdds_dsi-supply = <&vpll2>;
        vdda_video-supply = <&video_reg>;
        pinctrl-names = "default";
                regulator-max-microvolt = <3300000>;
        };
 
-       lcd0: display@0 {
-               compatible = "panel-dpi";
-               label = "28";
-               status = "okay";
-               /* default-on; */
+       lcd0: display {
+               /* This isn't the exact LCD, but the timings meet spec */
+               compatible = "logicpd,type28";
                pinctrl-names = "default";
                pinctrl-0 = <&lcd_enable_pin>;
-               enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;    /* gpio155, lcd INI */
+               backlight = <&bl>;
+               enable-gpios = <&gpio5 27 GPIO_ACTIVE_HIGH>;
                port {
                        lcd_in: endpoint {
                                remote-endpoint = <&dpi_out>;
                        };
                };
-
-               panel-timing {
-                       clock-frequency = <9000000>;
-                       hactive = <480>;
-                       vactive = <272>;
-                       hfront-porch = <3>;
-                       hback-porch = <2>;
-                       hsync-len = <42>;
-                       vback-porch = <3>;
-                       vfront-porch = <2>;
-                       vsync-len = <11>;
-                       hsync-active = <1>;
-                       vsync-active = <1>;
-                       de-active = <1>;
-                       pixelclk-active = <0>;
-               };
        };
 
        bl: backlight {
index b56524c..385bc8d 100644 (file)
@@ -27,6 +27,8 @@
 
        /* HS USB Host PHY on PORT 1 */
        hsusb2_phy: hsusb2_phy {
+               pinctrl-names = "default";
+               pinctrl-0 = <&hsusb2_reset_pin>;
                compatible = "usb-nop-xceiv";
                reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
                #phy-cells = <0>;
 };
 
 &usbhshost {
+       pinctrl-names = "default";
+       pinctrl-0 = <&hsusb2_pins>, <&hsusb2_2_pins>;
        port2-mode = "ehci-phy";
 };
 
 
 
 &omap3_pmx_core {
-       pinctrl-names = "default";
-       pinctrl-0 = <&hsusb2_pins>;
 
        mmc3_pins: pinmux_mm3_pins {
                pinctrl-single,pins = <
                        OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
                >;
        };
+
        mcbsp2_pins: pinmux_mcbsp2_pins {
                pinctrl-single,pins = <
                        OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)        /* mcbsp2_fsx */
                        OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4)       /* GPIO_162,BT_EN */
                >;
        };
+
        mcspi1_pins: pinmux_mcspi1_pins {
                pinctrl-single,pins = <
                        OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0)        /* mcspi1_clk.mcspi1_clk */
 };
 
 &omap3_pmx_wkup {
-       pinctrl-names = "default";
-       pinctrl-0 = <&hsusb2_reset_pin>;
+
        hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
                pinctrl-single,pins = <
                        OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4)        /* sys_boot2.gpio_4 */
                >;
        };
+
        wl127x_gpio: pinmux_wl127x_gpio_pin {
                pinctrl-single,pins = <
                        OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4)         /* sys_boot0.gpio_2 */
        };
 };
 
-&omap3_pmx_core2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&hsusb2_2_pins>;
-       hsusb2_2_pins: pinmux_hsusb2_2_pins {
-               pinctrl-single,pins = <
-                       OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3)            /* etk_d10.hsusb2_clk */
-                       OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3)            /* etk_d11.hsusb2_stp */
-                       OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d12.hsusb2_dir */
-                       OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d13.hsusb2_nxt */
-                       OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d14.hsusb2_data0 */
-                       OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3)    /* etk_d15.hsusb2_data1 */
-               >;
-       };
-};
-
 &uart2 {
        interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
        pinctrl-names = "default";