KVM: arm64: Disable TTBR1_EL2 when using ARM64_KVM_HVHE
authorMarc Zyngier <maz@kernel.org>
Fri, 9 Jun 2023 16:21:54 +0000 (17:21 +0100)
committerOliver Upton <oliver.upton@linux.dev>
Mon, 12 Jun 2023 23:17:23 +0000 (23:17 +0000)
When using hVHE, we end-up with two TTBRs at EL2. That's great,
but we're not quite ready for this just yet.

Disable TTBR1_EL2 by setting TCR_EL2.EPD1 so that we only
translate via TTBR0_EL2.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230609162200.2024064-12-maz@kernel.org
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
arch/arm64/kvm/arm.c

index c12276d..35b32cb 100644 (file)
@@ -1666,7 +1666,13 @@ static void __init cpu_prepare_hyp_mode(int cpu, u32 hyp_va_bits)
 
        params->mair_el2 = read_sysreg(mair_el1);
 
-       tcr = (read_sysreg(tcr_el1) & TCR_EL2_MASK) | TCR_EL2_RES1;
+       tcr = read_sysreg(tcr_el1);
+       if (cpus_have_final_cap(ARM64_KVM_HVHE)) {
+               tcr |= TCR_EPD1_MASK;
+       } else {
+               tcr &= TCR_EL2_MASK;
+               tcr |= TCR_EL2_RES1;
+       }
        tcr &= ~TCR_T0SZ_MASK;
        tcr |= TCR_T0SZ(hyp_va_bits);
        params->tcr_el2 = tcr;