status = "disabled";
};
- pdma0: pdma@12680000 {
+ pdma0: dma-controller@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>;
};
- pdma1: pdma@12690000 {
+ pdma1: dma-controller@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
- pdma0: pdma@12680000 {
+ pdma0: dma-controller@12680000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12680000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>;
};
- pdma1: pdma@12690000 {
+ pdma1: dma-controller@12690000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12690000 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>;
};
- mdma1: mdma@12850000 {
+ mdma1: dma-controller@12850000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12850000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
};
&soc {
- mdma0: mdma@12840000 {
+ mdma0: dma-controller@12840000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x12840000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
samsung,pmureg-phandle = <&pmu_system_controller>;
};
- pdma0: pdma@121a0000 {
+ pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>;
};
- pdma1: pdma@121b0000 {
+ pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>;
};
- mdma0: mdma@10800000 {
+ mdma0: dma-controller@10800000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <1>;
};
- mdma1: mdma@11c10000 {
+ mdma1: dma-controller@11c10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};
- pdma0: pdma@121a0000 {
+ pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121a0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>;
};
- pdma1: pdma@121b0000 {
+ pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121b0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&mau_pd>;
};
- adma: adma@3880000 {
+ adma: dma-controller@3880000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x03880000 0x1000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&mau_pd>;
};
- pdma0: pdma@121a0000 {
+ pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121A0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>;
};
- pdma1: pdma@121b0000 {
+ pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x121B0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <32>;
};
- mdma0: mdma@10800000 {
+ mdma0: dma-controller@10800000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x10800000 0x1000>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#dma-requests = <1>;
};
- mdma1: mdma@11c10000 {
+ mdma1: dma-controller@11c10000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x11C10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;