ARM: dts: imx6qdl-sabresd: Pass reset-assert-us

According to the AR8031 datasheet:

"When using crystal, clock is generated internally after the power is
stable. In order to get reliable power-on-reset, it is recommended to
keep asserting the reset low signal long enough (10 ms) to ensure the
clock is stable and clock-to-reset (1 ms) requirement is satisfied."

Pass the 'reset-assert-us' property to describe such requirement.

While at it, use the 'reset-gpios' property inside the the mdio
node instead of the deprecated usage of 'phy-reset-gpios'.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Soeren Moch <smoch@web.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index eaa2146..68b3e68 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -204,7 +204,6 @@
        pinctrl-0 = <&pinctrl_enet>;
        phy-mode = "rgmii-id";
        phy-handle = <&phy>;
-       phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
        fsl,magic-packet;
        status = "okay";
 
@@ -215,6 +214,8 @@
                phy: ethernet-phy@1 {
                        reg = <1>;
                        qca,clk-out-frequency = <125000000>;
+                       reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
+                       reset-assert-us = <10000>;
                };
        };
 };