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drm/nouveau/mc: msi rearm write via subdev, not device
author
Ben Skeggs
<bskeggs@redhat.com>
Fri, 11 Oct 2013 04:28:04 +0000
(14:28 +1000)
committer
Ben Skeggs
<bskeggs@redhat.com>
Fri, 8 Nov 2013 05:38:26 +0000
(15:38 +1000)
This way we can catch it with debugging on for PMC subdev.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/core/subdev/mc/base.c
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diff --git
a/drivers/gpu/drm/nouveau/core/subdev/mc/base.c
b/drivers/gpu/drm/nouveau/core/subdev/mc/base.c
index d8bb48f54c16e207be8c660af9f6d7b4b694ab26..be5bdeef50e666e47abda90fed2784ab685566bd 100644
(file)
--- a/
drivers/gpu/drm/nouveau/core/subdev/mc/base.c
+++ b/
drivers/gpu/drm/nouveau/core/subdev/mc/base.c
@@
-47,7
+47,7
@@
nouveau_mc_intr(int irq, void *arg)
}
if (pmc->use_msi)
- nv_wr08(pmc
->base.base.parent, 0x00
088068, 0xff);
+ nv_wr08(pmc
, 0x
088068, 0xff);
if (intr) {
nv_error(pmc, "unknown intr 0x%08x\n", stat);
@@
-115,7
+115,7
@@
nouveau_mc_create_(struct nouveau_object *parent, struct nouveau_object *engine,
pmc->use_msi = pci_enable_msi(device->pdev) == 0;
if (pmc->use_msi) {
nv_info(pmc, "MSI interrupts enabled\n");
- nv_wr08(
device, 0x00
088068, 0xff);
+ nv_wr08(
pmc, 0x
088068, 0xff);
}
}
break;