(and (match_code "const_int")
(match_test "xtensa_mem_offset (INTVAL (op), SFmode)")))
+(define_predicate "reload_operand"
+ (match_code "mem")
+{
+ const_rtx addr = XEXP (op, 0);
+ if (REG_P (addr))
+ return REGNO (addr) == A1_REG;
+ if (GET_CODE (addr) == PLUS)
+ return REG_P (XEXP (addr, 0))
+ && REGNO (XEXP (addr, 0)) == A1_REG
+ && CONST_INT_P (XEXP (addr, 1));
+ return false;
+})
+
(define_predicate "branch_operator"
(match_code "eq,ne,lt,ge"))
(if_then_else (match_test "TARGET_DENSITY")
(const_int 5)
(const_int 6)))])
+
+(define_peephole2
+ [(set (match_operand:SI 0 "register_operand")
+ (match_operand:SI 6 "reload_operand"))
+ (set (match_operand:SI 1 "register_operand")
+ (match_operand:SI 7 "reload_operand"))
+ (set (match_operand:SF 2 "register_operand")
+ (match_operand:SF 4 "register_operand"))
+ (set (match_operand:SF 3 "register_operand")
+ (match_operand:SF 5 "register_operand"))]
+ "REGNO (operands[0]) == REGNO (operands[4])
+ && REGNO (operands[1]) == REGNO (operands[5])
+ && peep2_reg_dead_p (4, operands[0])
+ && peep2_reg_dead_p (4, operands[1])"
+ [(set (match_dup 2)
+ (match_dup 6))
+ (set (match_dup 3)
+ (match_dup 7))]
+{
+ uint32_t check = 0;
+ int i;
+ for (i = 0; i <= 3; ++i)
+ {
+ uint32_t mask = (uint32_t)1 << REGNO (operands[i]);
+ if (check & mask)
+ FAIL;
+ check |= mask;
+ }
+ operands[6] = gen_rtx_MEM (SFmode, XEXP (operands[6], 0));
+ operands[7] = gen_rtx_MEM (SFmode, XEXP (operands[7], 0));
+})