Legalizer: Reword comment again, per Duncan's suggestion.

llvm-svn: 173625

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 88e72ecd92979fadf31af58562e415cedef81371..182b7f3e68077f1de8285e1f4029ad6bc5fe029c 100644 (file)
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -2098,9 +2098,8 @@ void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
     EVT VT = LHSL.getValueType();
 
     // If the shift amount operand is coming from a vector legalization it may
-    // have an illegal type.  Fix that first by casting the operand.  Otherwise
-    // the new SHL_PARTS operation would need further legalization, and the
-    // legalizer assumes that illegal SHL_PARTS never occur.
+    // have an illegal type.  Fix that first by casting the operand, otherwise
+    // the new SHL_PARTS operation would need further legalization.
     SDValue ShiftOp = N->getOperand(1);
     MVT ShiftTy = TLI.getShiftAmountTy(VT);
     assert(ShiftTy.getSizeInBits() >= Log2_32_Ceil(VT.getSizeInBits()) &&