drm/i915/mtl: Add MTP ddc pin configuration
authorRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Wed, 5 Oct 2022 00:20:13 +0000 (17:20 -0700)
committerRadhakrishna Sripada <radhakrishna.sripada@intel.com>
Thu, 6 Oct 2022 00:50:31 +0000 (17:50 -0700)
Meteorlake PCH reuses Alderlake vbt, DE pin mapping. Extend
ADL-P pin mapping for Meteorlake.

Bspec: 20124 does not have the mapping for MTP. Based on Bspec:49306, 64051,
it is concluded that MTP and ADL-P PCH have the same vbt -> DE pin pair mapping.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221005002534.2966978-1-radhakrishna.sripada@intel.com
drivers/gpu/drm/i915/display/intel_bios.c

index 4c543e8..c2987f2 100644 (file)
@@ -2188,7 +2188,7 @@ static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
        const u8 *ddc_pin_map;
        int n_entries;
 
-       if (IS_ALDERLAKE_P(i915)) {
+       if (HAS_PCH_MTP(i915) || IS_ALDERLAKE_P(i915)) {
                ddc_pin_map = adlp_ddc_pin_map;
                n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
        } else if (IS_ALDERLAKE_S(i915)) {