;} //
;/*========================== unsigned long long ==============================*/
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @allZeroi() {
; P9BE-LABEL: allZeroi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> zeroinitializer
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltConst1i() {
; P9BE-LABEL: spltConst1i:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 1, i32 1, i32 1, i32 1>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltConst16ki() {
; P9BE-LABEL: spltConst16ki:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltConst32ki() {
; P9BE-LABEL: spltConst32ki:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromRegsi(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d) {
; P9BE-LABEL: fromRegsi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit3
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromDiffConstsi() {
; P9BE-LABEL: fromDiffConstsi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 242, i32 -113, i32 889, i32 19>
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsAi(i32* nocapture readonly %arr) {
; P9BE-LABEL: fromDiffMemConsAi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsDi(i32* nocapture readonly %arr) {
; P9BE-LABEL: fromDiffMemConsDi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarAi(i32* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit11
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarDi(i32* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit11
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromRandMemConsi(i32* nocapture readonly %arr) {
; P9BE-LABEL: fromRandMemConsi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromRandMemVari(i32* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromRandMemVari:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit12
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltRegVali(i32 signext %val) {
; P9BE-LABEL: spltRegVali:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @spltMemVali(i32* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemVali:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltCnstConvftoi() {
; P9BE-LABEL: spltCnstConvftoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 4, i32 4, i32 4, i32 4>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromRegsConvftoi(float %a, float %b, float %c, float %d) {
; P9BE-LABEL: fromRegsConvftoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromDiffConstsConvftoi() {
; P9BE-LABEL: fromDiffConstsConvftoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 24, i32 234, i32 988, i32 422>
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsAConvftoi(float* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsAConvftoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %2
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsDConvftoi(float* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsDConvftoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit9
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarAConvftoi(float* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAConvftoi:
; P9BE: # %bb.0: # %entry
%conv13 = fptosi float %3 to i32
%vecinit14 = insertelement <4 x i32> %vecinit9, i32 %conv13, i32 3
ret <4 x i32> %vecinit14
-; FIXME: implement finding consecutive loads with pre-inc
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarDConvftoi(float* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDConvftoi:
; P9BE: # %bb.0: # %entry
; FIXME: implement finding consecutive loads with pre-inc
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltRegValConvftoi(float %val) {
; P9BE-LABEL: spltRegValConvftoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @spltMemValConvftoi(float* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValConvftoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltCnstConvdtoi() {
; P9BE-LABEL: spltCnstConvdtoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 4, i32 4, i32 4, i32 4>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromRegsConvdtoi(double %a, double %b, double %c, double %d) {
; P9BE-LABEL: fromRegsConvdtoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromDiffConstsConvdtoi() {
; P9BE-LABEL: fromDiffConstsConvdtoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 24, i32 234, i32 988, i32 422>
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsAConvdtoi(double* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsAConvdtoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit9
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsDConvdtoi(double* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsDConvdtoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit9
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarAConvdtoi(double* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAConvdtoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit14
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarDConvdtoi(double* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDConvdtoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit14
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltRegValConvdtoi(double %val) {
; P9BE-LABEL: spltRegValConvdtoi:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @spltMemValConvdtoi(double* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValConvdtoi:
; P9BE: # %bb.0: # %entry
%splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
+
define <4 x i32> @allZeroui() {
; P9BE-LABEL: allZeroui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> zeroinitializer
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltConst1ui() {
; P9BE-LABEL: spltConst1ui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 1, i32 1, i32 1, i32 1>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltConst16kui() {
; P9BE-LABEL: spltConst16kui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltConst32kui() {
; P9BE-LABEL: spltConst32kui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 65535, i32 65535, i32 65535, i32 65535>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromRegsui(i32 zeroext %a, i32 zeroext %b, i32 zeroext %c, i32 zeroext %d) {
; P9BE-LABEL: fromRegsui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit3
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromDiffConstsui() {
; P9BE-LABEL: fromDiffConstsui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 242, i32 -113, i32 889, i32 19>
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsAui(i32* nocapture readonly %arr) {
; P9BE-LABEL: fromDiffMemConsAui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsDui(i32* nocapture readonly %arr) {
; P9BE-LABEL: fromDiffMemConsDui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarAui(i32* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit11
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarDui(i32* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit11
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromRandMemConsui(i32* nocapture readonly %arr) {
; P9BE-LABEL: fromRandMemConsui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromRandMemVarui(i32* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromRandMemVarui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit12
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltRegValui(i32 zeroext %val) {
; P9BE-LABEL: spltRegValui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @spltMemValui(i32* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltCnstConvftoui() {
; P9BE-LABEL: spltCnstConvftoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 4, i32 4, i32 4, i32 4>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromRegsConvftoui(float %a, float %b, float %c, float %d) {
; P9BE-LABEL: fromRegsConvftoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromDiffConstsConvftoui() {
; P9BE-LABEL: fromDiffConstsConvftoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 24, i32 234, i32 988, i32 422>
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsAConvftoui(float* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsAConvftoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %2
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsDConvftoui(float* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsDConvftoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit9
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarAConvftoui(float* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAConvftoui:
; P9BE: # %bb.0: # %entry
; FIXME: implement finding consecutive loads with pre-inc
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarDConvftoui(float* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDConvftoui:
; P9BE: # %bb.0: # %entry
; FIXME: implement finding consecutive loads with pre-inc
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltRegValConvftoui(float %val) {
; P9BE-LABEL: spltRegValConvftoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @spltMemValConvftoui(float* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValConvftoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltCnstConvdtoui() {
; P9BE-LABEL: spltCnstConvdtoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 4, i32 4, i32 4, i32 4>
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromRegsConvdtoui(double %a, double %b, double %c, double %d) {
; P9BE-LABEL: fromRegsConvdtoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit6
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @fromDiffConstsConvdtoui() {
; P9BE-LABEL: fromDiffConstsConvdtoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> <i32 24, i32 234, i32 988, i32 422>
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsAConvdtoui(double* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsAConvdtoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit9
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemConsDConvdtoui(double* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsDConvdtoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit9
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarAConvdtoui(double* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAConvdtoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit14
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @fromDiffMemVarDConvdtoui(double* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDConvdtoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %vecinit14
}
-; Function Attrs: norecurse nounwind readnone
define <4 x i32> @spltRegValConvdtoui(double %val) {
; P9BE-LABEL: spltRegValConvdtoui:
; P9BE: # %bb.0: # %entry
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <4 x i32> @spltMemValConvdtoui(double* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValConvdtoui:
; P9BE: # %bb.0: # %entry
%splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
ret <4 x i32> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
+
define <2 x i64> @allZeroll() {
; P9BE-LABEL: allZeroll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> zeroinitializer
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltConst1ll() {
; P9BE-LABEL: spltConst1ll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 1, i64 1>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltConst16kll() {
; P9BE-LABEL: spltConst16kll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 32767, i64 32767>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltConst32kll() {
; P9BE-LABEL: spltConst32kll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 65535, i64 65535>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromRegsll(i64 %a, i64 %b) {
; P9BE-LABEL: fromRegsll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit1
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromDiffConstsll() {
; P9BE-LABEL: fromDiffConstsll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 242, i64 -113>
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsAll(i64* nocapture readonly %arr) {
; P9BE-LABEL: fromDiffMemConsAll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsDll(i64* nocapture readonly %arr) {
; P9BE-LABEL: fromDiffMemConsDll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarAll(i64* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarDll(i64* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromRandMemConsll(i64* nocapture readonly %arr) {
; P9BE-LABEL: fromRandMemConsll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromRandMemVarll(i64* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromRandMemVarll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltRegValll(i64 %val) {
; P9BE-LABEL: spltRegValll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @spltMemValll(i64* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltCnstConvftoll() {
; P9BE-LABEL: spltCnstConvftoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 4, i64 4>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromRegsConvftoll(float %a, float %b) {
; P9BE-LABEL: fromRegsConvftoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromDiffConstsConvftoll() {
; P9BE-LABEL: fromDiffConstsConvftoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 24, i64 234>
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsAConvftoll(float* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsAConvftoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsDConvftoll(float* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsDConvftoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarAConvftoll(float* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAConvftoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarDConvftoll(float* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDConvftoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltRegValConvftoll(float %val) {
; P9BE-LABEL: spltRegValConvftoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @spltMemValConvftoll(float* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValConvftoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltCnstConvdtoll() {
; P9BE-LABEL: spltCnstConvdtoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 4, i64 4>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromRegsConvdtoll(double %a, double %b) {
; P9BE-LABEL: fromRegsConvdtoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromDiffConstsConvdtoll() {
; P9BE-LABEL: fromDiffConstsConvdtoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 24, i64 234>
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsAConvdtoll(double* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsAConvdtoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %2
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsDConvdtoll(double* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsDConvdtoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarAConvdtoll(double* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAConvdtoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarDConvdtoll(double* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDConvdtoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltRegValConvdtoll(double %val) {
; P9BE-LABEL: spltRegValConvdtoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @spltMemValConvdtoll(double* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValConvdtoll:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @allZeroull() {
; P9BE-LABEL: allZeroull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> zeroinitializer
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltConst1ull() {
; P9BE-LABEL: spltConst1ull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 1, i64 1>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltConst16kull() {
; P9BE-LABEL: spltConst16kull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 32767, i64 32767>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltConst32kull() {
; P9BE-LABEL: spltConst32kull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 65535, i64 65535>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromRegsull(i64 %a, i64 %b) {
; P9BE-LABEL: fromRegsull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit1
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromDiffConstsull() {
; P9BE-LABEL: fromDiffConstsull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 242, i64 -113>
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsAull(i64* nocapture readonly %arr) {
; P9BE-LABEL: fromDiffMemConsAull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsDull(i64* nocapture readonly %arr) {
; P9BE-LABEL: fromDiffMemConsDull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarAull(i64* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarDull(i64* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromRandMemConsull(i64* nocapture readonly %arr) {
; P9BE-LABEL: fromRandMemConsull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromRandMemVarull(i64* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromRandMemVarull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltRegValull(i64 %val) {
; P9BE-LABEL: spltRegValull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @spltMemValull(i64* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltCnstConvftoull() {
; P9BE-LABEL: spltCnstConvftoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 4, i64 4>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromRegsConvftoull(float %a, float %b) {
; P9BE-LABEL: fromRegsConvftoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromDiffConstsConvftoull() {
; P9BE-LABEL: fromDiffConstsConvftoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 24, i64 234>
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsAConvftoull(float* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsAConvftoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsDConvftoull(float* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsDConvftoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarAConvftoull(float* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAConvftoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarDConvftoull(float* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDConvftoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltRegValConvftoull(float %val) {
; P9BE-LABEL: spltRegValConvftoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @spltMemValConvftoull(float* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValConvftoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltCnstConvdtoull() {
; P9BE-LABEL: spltCnstConvdtoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 4, i64 4>
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromRegsConvdtoull(double %a, double %b) {
; P9BE-LABEL: fromRegsConvdtoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit2
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @fromDiffConstsConvdtoull() {
; P9BE-LABEL: fromDiffConstsConvdtoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> <i64 24, i64 234>
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsAConvdtoull(double* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsAConvdtoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %2
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemConsDConvdtoull(double* nocapture readonly %ptr) {
; P9BE-LABEL: fromDiffMemConsDConvdtoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit3
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarAConvdtoull(double* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarAConvdtoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @fromDiffMemVarDConvdtoull(double* nocapture readonly %arr, i32 signext %elem) {
; P9BE-LABEL: fromDiffMemVarDConvdtoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %vecinit4
}
-; Function Attrs: norecurse nounwind readnone
define <2 x i64> @spltRegValConvdtoull(double %val) {
; P9BE-LABEL: spltRegValConvdtoull:
; P9BE: # %bb.0: # %entry
ret <2 x i64> %splat.splat
}
-; Function Attrs: norecurse nounwind readonly
define <2 x i64> @spltMemValConvdtoull(double* nocapture readonly %ptr) {
; P9BE-LABEL: spltMemValConvdtoull:
; P9BE: # %bb.0: # %entry