drm/amd/powerplay: add mask bit for fan control mode.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index e220465..db23e54 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -2000,8 +2000,9 @@ static int smu7_thermal_parameter_init(struct pp_hwmgr *hwmgr)
 
                hwmgr->dyn_state.cac_dtp_table->usTargetOperatingTemp =
                               table_info->cac_dtp_table->usTargetOperatingTemp;
-               phm_cap_set(hwmgr->platform_descriptor.platformCaps,
-                                               PHM_PlatformCaps_ODFuzzyFanControlSupport);
+               if (hwmgr->feature_mask & PP_OD_FUZZY_FAN_CONTROL_MASK)
+                       phm_cap_set(hwmgr->platform_descriptor.platformCaps,
+                                       PHM_PlatformCaps_ODFuzzyFanControlSupport);
        }
 
        return 0;

diff --git a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
index a57410b..6cdb7cb 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
@@ -85,6 +85,7 @@ enum PP_FEATURE_MASK {
        PP_ULV_MASK = 0x100,
        PP_ENABLE_GFX_CG_THRU_SMU = 0x200,
        PP_CLOCK_STRETCH_MASK = 0x400,
+       PP_OD_FUZZY_FAN_CONTROL_MASK = 0x800
 };
 
 enum PHM_BackEnd_Magic {