2015-11-10 Ilya Enkovich <enkovich.gnu@gmail.com>

	* config/i386/sse.md (maskload<mode>): Rename to ...
	(maskload<mode><sseintvecmodelower>): ... this.
	(maskstore<mode>): Rename to ...
	(maskstore<mode><sseintvecmodelower>): ... this.
	(maskload<mode><avx512fmaskmodelower>): New.
	(maskstore<mode><avx512fmaskmodelower>): New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@230100 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a7421a9..2360be2 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,14 @@
 2015-11-10  Ilya Enkovich  <enkovich.gnu@gmail.com>
 
+       * config/i386/sse.md (maskload<mode>): Rename to ...
+       (maskload<mode><sseintvecmodelower>): ... this.
+       (maskstore<mode>): Rename to ...
+       (maskstore<mode><sseintvecmodelower>): ... this.
+       (maskload<mode><avx512fmaskmodelower>): New.
+       (maskstore<mode><avx512fmaskmodelower>): New.
+
+2015-11-10  Ilya Enkovich  <enkovich.gnu@gmail.com>
+
        * internal-fn.c (expand_MASK_LOAD): Adjust to maskload optab changes.
        (expand_MASK_STORE): Adjust to maskstore optab changes.
        * optabs-query.c (can_vec_mask_load_store_p): Add MASK_MODE arg.

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 57feb27..f804255 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -18135,7 +18135,7 @@
    (set_attr "btver2_decode" "vector") 
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_expand "maskload<mode>"
+(define_expand "maskload<mode><sseintvecmodelower>"
   [(set (match_operand:V48_AVX2 0 "register_operand")
        (unspec:V48_AVX2
          [(match_operand:<sseintvecmode> 2 "register_operand")
@@ -18143,7 +18143,23 @@
          UNSPEC_MASKMOV))]
   "TARGET_AVX")
 
-(define_expand "maskstore<mode>"
+(define_expand "maskload<mode><avx512fmaskmodelower>"
+  [(set (match_operand:V48_AVX512VL 0 "register_operand")
+       (vec_merge:V48_AVX512VL
+         (match_operand:V48_AVX512VL 1 "memory_operand")
+         (match_dup 0)
+         (match_operand:<avx512fmaskmode> 2 "register_operand")))]
+  "TARGET_AVX512F")
+
+(define_expand "maskload<mode><avx512fmaskmodelower>"
+  [(set (match_operand:VI12_AVX512VL 0 "register_operand")
+       (vec_merge:VI12_AVX512VL
+         (match_operand:VI12_AVX512VL 1 "memory_operand")
+         (match_dup 0)
+         (match_operand:<avx512fmaskmode> 2 "register_operand")))]
+  "TARGET_AVX512BW")
+
+(define_expand "maskstore<mode><sseintvecmodelower>"
   [(set (match_operand:V48_AVX2 0 "memory_operand")
        (unspec:V48_AVX2
          [(match_operand:<sseintvecmode> 2 "register_operand")
@@ -18152,6 +18168,22 @@
          UNSPEC_MASKMOV))]
   "TARGET_AVX")
 
+(define_expand "maskstore<mode><avx512fmaskmodelower>"
+  [(set (match_operand:V48_AVX512VL 0 "memory_operand")
+       (vec_merge:V48_AVX512VL
+         (match_operand:V48_AVX512VL 1 "register_operand")
+         (match_dup 0)
+         (match_operand:<avx512fmaskmode> 2 "register_operand")))]
+  "TARGET_AVX512F")
+
+(define_expand "maskstore<mode><avx512fmaskmodelower>"
+  [(set (match_operand:VI12_AVX512VL 0 "memory_operand")
+       (vec_merge:VI12_AVX512VL
+         (match_operand:VI12_AVX512VL 1 "register_operand")
+         (match_dup 0)
+         (match_operand:<avx512fmaskmode> 2 "register_operand")))]
+  "TARGET_AVX512BW")
+
 (define_insn_and_split "avx_<castmode><avxsizesuffix>_<castmode>"
   [(set (match_operand:AVX256MODE2P 0 "nonimmediate_operand" "=x,m")
        (unspec:AVX256MODE2P