status = "disabled";
- resets = <&rstctrl 24>, <&rstctrl 25>, <&rstctrl 26>;
- reset-names = "pcie0", "pcie1", "pcie2";
- clocks = <&sysc MT7621_CLK_PCIE0>,
- <&sysc MT7621_CLK_PCIE1>,
- <&sysc MT7621_CLK_PCIE2>;
- clock-names = "pcie0", "pcie1", "pcie2";
- phys = <&pcie0_phy 1>, <&pcie2_phy 0>;
- phy-names = "pcie-phy0", "pcie-phy2";
-
reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
pcie@0,0 {
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rstctrl 24>;
+ clocks = <&sysc MT7621_CLK_PCIE0>;
+ phys = <&pcie0_phy 1>;
+ phy-names = "pcie-phy0";
ranges;
};
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rstctrl 25>;
+ clocks = <&sysc MT7621_CLK_PCIE1>;
+ phys = <&pcie0_phy 1>;
+ phy-names = "pcie-phy1";
ranges;
};
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rstctrl 26>;
+ clocks = <&sysc MT7621_CLK_PCIE2>;
+ phys = <&pcie2_phy 0>;
+ phy-names = "pcie-phy2";
ranges;
};
};