rockchip: dts: rk3399-puma: add DTS for the DDR3-1866 timing
authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tue, 6 Jun 2017 18:44:47 +0000 (20:44 +0200)
committerSimon Glass <sjg@chromium.org>
Thu, 8 Jun 2017 03:30:48 +0000 (21:30 -0600)
This adds the DDR3-1866 timing via its own DTS and wires it up.  This
(currently) is not the default timing for the RK3399-Q7 and should be
selected explicitly via the config (CONFIG_DEFAULT_DEVICE_TREE).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/Makefile
arch/arm/dts/rk3399-puma-ddr1866.dts [new file with mode: 0644]

index 540fa25..8b8f5e9 100644 (file)
@@ -48,6 +48,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
        rk3399-firefly.dtb \
        rk3399-puma-ddr1333.dtb \
        rk3399-puma-ddr1600.dtb \
+       rk3399-puma-ddr1866.dtb \
        rv1108-evb.dtb
 dtb-$(CONFIG_ARCH_MESON) += \
        meson-gxbb-odroidc2.dtb
diff --git a/arch/arm/dts/rk3399-puma-ddr1866.dts b/arch/arm/dts/rk3399-puma-ddr1866.dts
new file mode 100644 (file)
index 0000000..4eec8e7
--- /dev/null
@@ -0,0 +1,11 @@
+/*
+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
+ *
+ * SPDX-License-Identifier:     GPL-2.0+       X11
+ */
+
+/dts-v1/;
+
+#include "rk3399-puma.dtsi"
+#include "rk3399-sdram-ddr3-1866.dtsi"
+