pinctrl: icelake: Use generic flag for special GPIO base treatment

Since we have a generic flag for special GPIO base treatment,
use it in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>

diff --git a/drivers/pinctrl/intel/pinctrl-icelake.c b/drivers/pinctrl/intel/pinctrl-icelake.c
index 6489e9b..429b5a8 100644 (file)
--- a/drivers/pinctrl/intel/pinctrl-icelake.c
+++ b/drivers/pinctrl/intel/pinctrl-icelake.c
@@ -29,8 +29,6 @@
                .gpio_base = (g),                       \
        }
 
-#define ICL_NO_GPIO    -1
-
 #define ICL_COMMUNITY(b, s, e, g)                      \
        {                                               \
                .barno = (b),                           \
@@ -305,29 +303,29 @@ static const struct pinctrl_pin_desc icllp_pins[] = {
 };
 
 static const struct intel_padgroup icllp_community0_gpps[] = {
-       ICL_GPP(0, 0, 7, 0),                    /* GPP_G */
-       ICL_GPP(1, 8, 33, 32),                  /* GPP_B */
-       ICL_GPP(2, 34, 58, 64),                 /* GPP_A */
+       ICL_GPP(0, 0, 7, 0),                            /* GPP_G */
+       ICL_GPP(1, 8, 33, 32),                          /* GPP_B */
+       ICL_GPP(2, 34, 58, 64),                         /* GPP_A */
 };
 
 static const struct intel_padgroup icllp_community1_gpps[] = {
-       ICL_GPP(0, 59, 82, 96),                 /* GPP_H */
-       ICL_GPP(1, 83, 103, 128),               /* GPP_D */
-       ICL_GPP(2, 104, 123, 160),              /* GPP_F */
-       ICL_GPP(3, 124, 152, 192),              /* vGPIO */
+       ICL_GPP(0, 59, 82, 96),                         /* GPP_H */
+       ICL_GPP(1, 83, 103, 128),                       /* GPP_D */
+       ICL_GPP(2, 104, 123, 160),                      /* GPP_F */
+       ICL_GPP(3, 124, 152, 192),                      /* vGPIO */
 };
 
 static const struct intel_padgroup icllp_community4_gpps[] = {
-       ICL_GPP(0, 153, 176, 224),              /* GPP_C */
-       ICL_GPP(1, 177, 182, ICL_NO_GPIO),      /* HVCMOS */
-       ICL_GPP(2, 183, 206, 256),              /* GPP_E */
-       ICL_GPP(3, 207, 215, ICL_NO_GPIO),      /* JTAG */
+       ICL_GPP(0, 153, 176, 224),                      /* GPP_C */
+       ICL_GPP(1, 177, 182, INTEL_GPIO_BASE_NOMAP),    /* HVCMOS */
+       ICL_GPP(2, 183, 206, 256),                      /* GPP_E */
+       ICL_GPP(3, 207, 215, INTEL_GPIO_BASE_NOMAP),    /* JTAG */
 };
 
 static const struct intel_padgroup icllp_community5_gpps[] = {
-       ICL_GPP(0, 216, 223, 288),              /* GPP_R */
-       ICL_GPP(1, 224, 231, 320),              /* GPP_S */
-       ICL_GPP(2, 232, 240, ICL_NO_GPIO),      /* SPI */
+       ICL_GPP(0, 216, 223, 288),                      /* GPP_R */
+       ICL_GPP(1, 224, 231, 320),                      /* GPP_S */
+       ICL_GPP(2, 232, 240, INTEL_GPIO_BASE_NOMAP),    /* SPI */
 };
 
 static const struct intel_community icllp_communities[] = {