X64: Fix order of operands on movq(reg, xmm).

Fixes bug 792, and the Transcendental cache is the only use of this operation.

Review URL: http://codereview.chromium.org/2806080

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5138 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

diff --git a/src/x64/assembler-x64.cc b/src/x64/assembler-x64.cc
index c66666a..40899ab 100644 (file)
--- a/src/x64/assembler-x64.cc
+++ b/src/x64/assembler-x64.cc
@@ -2529,10 +2529,10 @@ void Assembler::movd(Register dst, XMMRegister src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit(0x66);
-  emit_optional_rex_32(dst, src);
+  emit_optional_rex_32(src, dst);
   emit(0x0F);
   emit(0x7E);
-  emit_sse_operand(dst, src);
+  emit_sse_operand(src, dst);
 }
 
 
@@ -2551,10 +2551,10 @@ void Assembler::movq(Register dst, XMMRegister src) {
   EnsureSpace ensure_space(this);
   last_pc_ = pc_;
   emit(0x66);
-  emit_rex_64(dst, src);
+  emit_rex_64(src, dst);
   emit(0x0F);
   emit(0x7E);
-  emit_sse_operand(dst, src);
+  emit_sse_operand(src, dst);
 }
 
 

diff --git a/src/x64/disasm-x64.cc b/src/x64/disasm-x64.cc
index 06a8c79..7c9dfc1 100644 (file)
--- a/src/x64/disasm-x64.cc
+++ b/src/x64/disasm-x64.cc
@@ -1019,10 +1019,10 @@ int DisassemblerX64::TwoByteOpcodeInstruction(byte* data) {
                        NameOfXMMRegister(regop));
         current += PrintRightOperand(current);
       } else if (opcode == 0x7E) {
-        AppendToBuffer("mov%c %s,",
-                       rex_w() ? 'q' : 'd',
-                       NameOfCPURegister(regop));
-        current += PrintRightXMMOperand(current);
+        AppendToBuffer("mov%c ",
+                       rex_w() ? 'q' : 'd');
+        current += PrintRightOperand(current);
+        AppendToBuffer(", %s", NameOfXMMRegister(regop));
       } else {
         const char* mnemonic = "?";
         if (opcode == 0x57) {