drm/mediatek: add ddp component CCORR

This patch add ddp component CCORR

Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: CK Hu <ck.hu@mediatek.com>

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
index efa85973e46b07b9e62d5d59917821f2ac03f086..1f6df17b244e6936ef4adde1a953e0c92a5bc4a9 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c
@@ -33,6 +33,12 @@
 #define DISP_AAL_EN                            0x0000
 #define DISP_AAL_SIZE                          0x0030
 
+#define DISP_CCORR_EN                          0x0000
+#define CCORR_EN                               BIT(0)
+#define DISP_CCORR_CFG                         0x0020
+#define CCORR_RELAY_MODE                       BIT(0)
+#define DISP_CCORR_SIZE                                0x0030
+
 #define DISP_GAMMA_EN                          0x0000
 #define DISP_GAMMA_CFG                         0x0020
 #define DISP_GAMMA_SIZE                                0x0030
@@ -123,6 +129,24 @@ static void mtk_aal_stop(struct mtk_ddp_comp *comp)
        writel_relaxed(0x0, comp->regs + DISP_AAL_EN);
 }
 
+static void mtk_ccorr_config(struct mtk_ddp_comp *comp, unsigned int w,
+                            unsigned int h, unsigned int vrefresh,
+                            unsigned int bpc)
+{
+       writel(h << 16 | w, comp->regs + DISP_CCORR_SIZE);
+       writel(CCORR_RELAY_MODE, comp->regs + DISP_CCORR_CFG);
+}
+
+static void mtk_ccorr_start(struct mtk_ddp_comp *comp)
+{
+       writel(CCORR_EN, comp->regs + DISP_CCORR_EN);
+}
+
+static void mtk_ccorr_stop(struct mtk_ddp_comp *comp)
+{
+       writel_relaxed(0x0, comp->regs + DISP_CCORR_EN);
+}
+
 static void mtk_gamma_config(struct mtk_ddp_comp *comp, unsigned int w,
                             unsigned int h, unsigned int vrefresh,
                             unsigned int bpc)
@@ -171,6 +195,12 @@ static const struct mtk_ddp_comp_funcs ddp_aal = {
        .stop = mtk_aal_stop,
 };
 
+static const struct mtk_ddp_comp_funcs ddp_ccorr = {
+       .config = mtk_ccorr_config,
+       .start = mtk_ccorr_start,
+       .stop = mtk_ccorr_stop,
+};
+
 static const struct mtk_ddp_comp_funcs ddp_gamma = {
        .gamma_set = mtk_gamma_set,
        .config = mtk_gamma_config,
@@ -192,6 +222,7 @@ static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
        [MTK_DISP_RDMA] = "rdma",
        [MTK_DISP_WDMA] = "wdma",
        [MTK_DISP_COLOR] = "color",
+       [MTK_DISP_CCORR] = "ccorr",
        [MTK_DISP_AAL] = "aal",
        [MTK_DISP_GAMMA] = "gamma",
        [MTK_DISP_UFOE] = "ufoe",
@@ -213,6 +244,7 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_ID_MAX] = {
        [DDP_COMPONENT_AAL0]    = { MTK_DISP_AAL,       0, &ddp_aal },
        [DDP_COMPONENT_AAL1]    = { MTK_DISP_AAL,       1, &ddp_aal },
        [DDP_COMPONENT_BLS]     = { MTK_DISP_BLS,       0, NULL },
+       [DDP_COMPONENT_CCORR]   = { MTK_DISP_CCORR,     0, &ddp_ccorr },
        [DDP_COMPONENT_COLOR0]  = { MTK_DISP_COLOR,     0, NULL },
        [DDP_COMPONENT_COLOR1]  = { MTK_DISP_COLOR,     1, NULL },
        [DDP_COMPONENT_DPI0]    = { MTK_DPI,            0, NULL },

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
index 0ad287f427cc45122e2002d1f9e51f552386ca41..b5869a1d33451ed1a976b75e8db3f7cb5064a399 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h
@@ -20,6 +20,7 @@ enum mtk_ddp_comp_type {
        MTK_DISP_RDMA,
        MTK_DISP_WDMA,
        MTK_DISP_COLOR,
+       MTK_DISP_CCORR,
        MTK_DISP_AAL,
        MTK_DISP_GAMMA,
        MTK_DISP_UFOE,
@@ -36,6 +37,7 @@ enum mtk_ddp_comp_id {
        DDP_COMPONENT_AAL0,
        DDP_COMPONENT_AAL1,
        DDP_COMPONENT_BLS,
+       DDP_COMPONENT_CCORR,
        DDP_COMPONENT_COLOR0,
        DDP_COMPONENT_COLOR1,
        DDP_COMPONENT_DPI0,