.reg_read = cdns_regmap_read,
};
-static void cdns_sierra_phy_init(struct phy *gphy)
+static int cdns_sierra_phy_init(struct phy *gphy)
{
struct cdns_sierra_inst *ins = phy_get_drvdata(gphy);
struct cdns_sierra_phy *phy = dev_get_drvdata(gphy->dev.parent);
struct cdns_reg_pairs *vals;
u32 num_regs;
+ /* Initialise the PHY registers, unless auto configured */
+ if (phy->autoconf)
+ return 0;
+
if (ins->phy_type == PHY_TYPE_PCIE) {
num_regs = phy->init_data->pcie_regs;
vals = phy->init_data->pcie_vals;
num_regs = phy->init_data->usb_regs;
vals = phy->init_data->usb_vals;
} else {
- return;
+ return -EINVAL;
}
for (i = 0; i < ins->num_lanes; i++) {
for (j = 0; j < num_regs ; j++) {
regmap_write(regmap, vals[j].off, vals[j].val);
}
}
+
+ return 0;
}
static int cdns_sierra_phy_on(struct phy *gphy)
}
static const struct phy_ops ops = {
+ .init = cdns_sierra_phy_init,
.power_on = cdns_sierra_phy_on,
.power_off = cdns_sierra_phy_off,
.owner = THIS_MODULE,
sp->phys[node].phy = gphy;
phy_set_drvdata(gphy, &sp->phys[node]);
- /* Initialise the PHY registers, unless auto configured */
- if (!sp->autoconf)
- cdns_sierra_phy_init(gphy);
-
node++;
}
sp->nsubnodes = node;