nir_intrinsic_instr *store =
nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_var);
store->num_components = num_components;
- store->const_index[0] = writemask;
+ nir_intrinsic_set_write_mask(store, writemask);
store->variables[0] = nir_deref_var_create(store, var);
store->src[0] = nir_src_for_ssa(value);
nir_builder_instr_insert(build, &store->instr);
unsigned uniform_loc = instr->variables[0]->var->data.location;
nir_intrinsic_instr *new_instr = nir_intrinsic_instr_create(mem_ctx, op);
- new_instr->const_index[0] =
- state->shader_program->UniformStorage[uniform_loc].opaque[state->shader->stage].index;
+ nir_intrinsic_set_base(new_instr,
+ state->shader_program->UniformStorage[uniform_loc].opaque[state->shader->stage].index);
nir_load_const_instr *offset_const = nir_load_const_instr_create(mem_ctx, 1);
offset_const->value.u[0] = instr->variables[0]->var->data.offset;
store = nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output);
store->num_components = 4;
- store->const_index[0] = out->data.driver_location;
- store->const_index[1] = 0xf; /* wrmask */
+ nir_intrinsic_set_base(store, out->data.driver_location);
+ nir_intrinsic_set_write_mask(store, 0xf);
store->src[0].ssa = nir_vec4(b, val[0], val[1], val[2], val[3]);
store->src[0].is_ssa = true;
store->src[1] = nir_src_for_ssa(nir_imm_int(b, 0));
load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_input);
load->num_components = 4;
- load->const_index[0] = in->data.driver_location;
+ nir_intrinsic_set_base(load, in->data.driver_location);
load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
nir_builder_instr_insert(b, &load->instr);
if (instr->type == nir_instr_type_intrinsic) {
nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
if ((intr->intrinsic == nir_intrinsic_store_output) &&
- intr->const_index[0] == state->drvloc) {
+ nir_intrinsic_base(intr) == state->drvloc) {
assert(state->def == NULL);
assert(intr->src[0].is_ssa);
assert(nir_src_as_const_value(intr->src[1]));
nir_intrinsic_instr *lowered =
nir_intrinsic_instr_create(b->shader,
nir_intrinsic_emit_vertex_with_counter);
- lowered->const_index[0] = intrin->const_index[0];
+ nir_intrinsic_set_stream_id(lowered, nir_intrinsic_stream_id(intrin));
lowered->src[0] = nir_src_for_ssa(count);
nir_builder_instr_insert(b, &lowered->instr);
nir_intrinsic_instr *lowered =
nir_intrinsic_instr_create(b->shader,
nir_intrinsic_end_primitive_with_counter);
- lowered->const_index[0] = intrin->const_index[0];
+ nir_intrinsic_set_stream_id(lowered, nir_intrinsic_stream_id(intrin));
lowered->src[0] = nir_src_for_ssa(count);
nir_builder_instr_insert(b, &lowered->instr);
load_op(state, mode, per_vertex));
load->num_components = intrin->num_components;
- load->const_index[0] =
- intrin->variables[0]->var->data.driver_location;
+ nir_intrinsic_set_base(load,
+ intrin->variables[0]->var->data.driver_location);
if (per_vertex)
load->src[0] = nir_src_for_ssa(vertex_index);
nir_src_copy(&store->src[0], &intrin->src[0], store);
- store->const_index[0] =
- intrin->variables[0]->var->data.driver_location;
-
- /* Copy the writemask */
- store->const_index[1] = intrin->const_index[0];
+ nir_intrinsic_set_base(store,
+ intrin->variables[0]->var->data.driver_location);
+ nir_intrinsic_set_write_mask(store, nir_intrinsic_write_mask(intrin));
if (per_vertex)
store->src[1] = nir_src_for_ssa(vertex_index);
nir_alu_instr *mov = nir_alu_instr_create(state->shader, nir_op_imov);
nir_src_copy(&mov->src[0].src, &intrin->src[0], mov);
- mov->dest.write_mask = intrin->const_index[0];
+ mov->dest.write_mask = nir_intrinsic_write_mask(intrin);
mov->dest.dest.is_ssa = false;
mov->dest.dest.reg.reg = reg_src.reg.reg;
mov->dest.dest.reg.base_offset = reg_src.reg.base_offset;
load = nir_intrinsic_instr_create(b->shader, nir_intrinsic_load_input);
load->num_components = 4;
- load->const_index[0] = in->data.driver_location;
+ nir_intrinsic_set_base(load, in->data.driver_location);
load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
nir_ssa_dest_init(&load->instr, &load->dest, 4, NULL);
nir_builder_instr_insert(b, &load->instr);
for (idx = 0; idx < state->colors_count; idx++) {
unsigned drvloc =
state->colors[idx].front->data.driver_location;
- if (intr->const_index[0] == drvloc) {
+ if (nir_intrinsic_base(intr) == drvloc) {
assert(nir_src_as_const_value(intr->src[0]));
break;
}
nir_intrinsic_instr *store =
nir_intrinsic_instr_create(mem_ctx, nir_intrinsic_store_var);
store->num_components = num_components;
- store->const_index[0] = (1 << num_components) - 1;
+ nir_intrinsic_set_write_mask(store, (1 << num_components) - 1);
store->variables[0] = nir_deref_as_var(nir_copy_deref(store, &dest_head->deref));
store->src[0].is_ssa = true;
nir_ssa_def *new_def;
b.cursor = nir_before_instr(&intrin->instr);
- if (intrin->const_index[0] == (1 << intrin->num_components) - 1) {
+ unsigned wrmask = nir_intrinsic_write_mask(intrin);
+ if (wrmask == (1 << intrin->num_components) - 1) {
/* Whole variable store - just copy the source. Note that
* intrin->num_components and intrin->src[0].ssa->num_components
* may differ.
*/
nir_ssa_def *srcs[4];
for (unsigned i = 0; i < intrin->num_components; i++) {
- if (intrin->const_index[0] & (1 << i)) {
+ if (wrmask & (1 << i)) {
srcs[i] = nir_channel(&b, intrin->src[0].ssa, i);
} else {
srcs[i] = nir_channel(&b, old_def, i);
}
nir_foreach_variable(var, var_list) {
- if ((var->data.driver_location == instr->const_index[0]) &&
+ if ((var->data.driver_location == nir_intrinsic_base(instr)) &&
var->name) {
fprintf(fp, "\t/* %s */", var->name);
break;
assert(instr->variables[0]->var->data.mode != nir_var_shader_in &&
instr->variables[0]->var->data.mode != nir_var_uniform &&
instr->variables[0]->var->data.mode != nir_var_shader_storage);
- assert((instr->const_index[0] & ~((1 << instr->num_components) - 1)) == 0);
+ assert((nir_intrinsic_write_mask(instr) & ~((1 << instr->num_components) - 1)) == 0);
break;
}
case nir_intrinsic_copy_var: