ath9k_hw: Fill few hw cap for edma
authorVasanthakumar Thiagarajan <vasanth@atheros.com>
Thu, 15 Apr 2010 21:38:25 +0000 (17:38 -0400)
committerJohn W. Linville <linville@tuxdriver.com>
Fri, 16 Apr 2010 19:43:21 +0000 (15:43 -0400)
HP & LP queue depth and rx status length.

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/ar9003_mac.h [new file with mode: 0644]
drivers/net/wireless/ath/ath9k/hw.c
drivers/net/wireless/ath/ath9k/hw.h

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mac.h b/drivers/net/wireless/ath/ath9k/ar9003_mac.h
new file mode 100644 (file)
index 0000000..dbf74eb
--- /dev/null
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2010 Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef AR9003_MAC_H
+#define AR9003_MAC_H
+
+struct ar9003_rxs {
+       u32 ds_info;
+       u32 status1;
+       u32 status2;
+       u32 status3;
+       u32 status4;
+       u32 status5;
+       u32 status6;
+       u32 status7;
+       u32 status8;
+       u32 status9;
+       u32 status10;
+       u32 status11;
+} __packed;
+
+#endif
index b33aa2d..8bd718c 100644 (file)
@@ -2873,8 +2873,12 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
                btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
        }
 
-       if (AR_SREV_9300_20_OR_LATER(ah))
+       if (AR_SREV_9300_20_OR_LATER(ah)) {
                pCap->hw_caps |= ATH9K_HW_CAP_EDMA;
+               pCap->rx_hp_qdepth = ATH9K_HW_RX_HP_QDEPTH;
+               pCap->rx_lp_qdepth = ATH9K_HW_RX_LP_QDEPTH;
+               pCap->rx_status_len = sizeof(struct ar9003_rxs);
+       }
 
        return 0;
 }
index d89af6e..6bd87bf 100644 (file)
@@ -28,6 +28,7 @@
 #include "reg.h"
 #include "phy.h"
 #include "btcoex.h"
+#include "ar9003_mac.h"
 
 #include "../regd.h"
 #include "../debug.h"
 
 #define TU_TO_USEC(_tu)             ((_tu) << 10)
 
+#define ATH9K_HW_RX_HP_QDEPTH  16
+#define ATH9K_HW_RX_LP_QDEPTH  128
+
 enum wireless_mode {
        ATH9K_MODE_11A = 0,
        ATH9K_MODE_11G,
@@ -192,6 +196,9 @@ struct ath9k_hw_capabilities {
        u8 num_gpio_pins;
        u8 num_antcfg_2ghz;
        u8 num_antcfg_5ghz;
+       u8 rx_hp_qdepth;
+       u8 rx_lp_qdepth;
+       u8 rx_status_len;
 };
 
 struct ath9k_ops_config {