re PR rtl-optimization/55458 (ICE: in assign_by_spills, at lra-assigns.c:1212 with...

2012-11-27  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/55458
	* lra-assigns.c: Include rtl-error.h.
	(assign_by_spills): Report about asm inpossible constraints.
	* Makefile.in (lra-assigns.c): Add $(RTL_ERROR_H).

2012-11-27  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/55458
	* gcc.target/i386/pr55458.c: New test.

From-SVN: r193871

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3efad5a..0d7dc0b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2012-11-27  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR rtl-optimization/55458
+       * lra-assigns.c: Include rtl-error.h.
+       (assign_by_spills): Report about asm inpossible constraints.
+       * Makefile.in (lra-assigns.c): Add $(RTL_ERROR_H).
+
 2012-11-27  Paolo Bonzini  <pbonzini@redhat.com>
 
        PR rtl-optimization/55489

diff --git a/gcc/Makefile.in b/gcc/Makefile.in
index 8f8316f..8c78eda 100644 (file)
--- a/gcc/Makefile.in
+++ b/gcc/Makefile.in
@@ -3261,7 +3261,7 @@ lra.o : lra.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
    $(FLAGS_H) $(FUNCTION_H) $(EXPR_H) $(BASIC_BLOCK_H) $(TM_P_H) \
    $(EXCEPT_H) ira.h $(LRA_INT_H)
 lra-assigns.o : lra-assigns.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
-   $(TM_H) $(RTL_H) $(REGS_H) insn-config.h $(DF_H) \
+   $(TM_H) $(RTL_H) $(RTL_ERROR_H) $(REGS_H) insn-config.h $(DF_H) \
    $(RECOG_H) output.h $(REGS_H) hard-reg-set.h $(FLAGS_H) $(FUNCTION_H) \
    $(EXPR_H) $(BASIC_BLOCK_H) $(TM_P_H) $(EXCEPT_H) ira.h \
    rtl-error.h sparseset.h $(LRA_INT_H)

diff --git a/gcc/lra-assigns.c b/gcc/lra-assigns.c
index b1a1c3d..8b7dcff 100644 (file)
--- a/gcc/lra-assigns.c
+++ b/gcc/lra-assigns.c
@@ -81,6 +81,7 @@ along with GCC; see the file COPYING3.        If not see
 #include "tm.h"
 #include "hard-reg-set.h"
 #include "rtl.h"
+#include "rtl-error.h"
 #include "tm_p.h"
 #include "target.h"
 #include "insn-config.h"
@@ -1209,7 +1210,34 @@ assign_by_spills (void)
        }
       if (nfails == 0)
        break;
-      lra_assert (iter == 0);
+      if (iter > 0)
+       {
+         /* We did not assign hard regs to reload pseudos after two
+            iteration.  It means something is wrong with asm insn
+            constraints.  Report it.  */
+         bool asm_p = false;
+         bitmap_head failed_reload_insns;
+
+         bitmap_initialize (&failed_reload_insns, &reg_obstack);
+         for (i = 0; i < nfails; i++)
+           bitmap_ior_into (&failed_reload_insns,
+                            &lra_reg_info[sorted_pseudos[i]].insn_bitmap);
+         EXECUTE_IF_SET_IN_BITMAP (&failed_reload_insns, 0, u, bi)
+           {
+             insn = lra_insn_recog_data[u]->insn;
+             if (asm_noperands (PATTERN (insn)) >= 0)
+               {
+                 asm_p = true;
+                 error_for_asm (insn,
+                                "%<asm%> operand has impossible constraints");
+                 /* Avoid further trouble with this insn.      */
+                 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
+                 lra_invalidate_insn_data (insn);
+               }
+           }
+         lra_assert (asm_p);
+         break;
+       }
       /* This is a very rare event.  We can not assign a hard
         register to reload pseudo because the hard register was
         assigned to another reload pseudo on a previous

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 1e1448b..e065504 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-27  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR rtl-optimization/55458
+       * gcc.target/i386/pr55458.c: New test.
+
 2012-11-27  Jakub Jelinek  <jakub@redhat.com>
 
        PR tree-optimization/55110

diff --git a/gcc/testsuite/gcc.target/i386/pr55458.c b/gcc/testsuite/gcc.target/i386/pr55458.c
new file mode 100644 (file)
index 0000000..07a54ad
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr55458.c
@@ -0,0 +1,11 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-fPIC" } */
+
+int a, b, c;
+
+void
+foo (void)
+{
+  asm volatile ("":"+m" (a), "+m" (b), "+m" (c)); /* { dg-error "operand has impossible constraints" } */
+}