mx31: Use proper IO accessor for GPR register

Use proper IO accessor for GPR register.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>

diff --git a/arch/arm/cpu/arm1136/mx31/generic.c b/arch/arm/cpu/arm1136/mx31/generic.c
index 1621e9e..167e97a 100644 (file)
--- a/arch/arm/cpu/arm1136/mx31/generic.c
+++ b/arch/arm/cpu/arm1136/mx31/generic.c
@@ -144,14 +144,15 @@ void mx31_set_pad(enum iomux_pins pin, u32 config)
 void mx31_set_gpr(enum iomux_gp_func gp, char en)
 {
        u32 l;
+       struct iomuxc_regs *iomuxc = (struct iomuxc_regs *)IOMUXC_BASE;
 
-       l = readl(IOMUXC_GPR);
+       l = readl(&iomuxc->gpr);
        if (en)
                l |= gp;
        else
                l &= ~gp;
 
-       writel(l, IOMUXC_GPR);
+       writel(l, &iomuxc->gpr);
 }
 
 void mxc_setup_weimcs(int cs, const struct mxc_weimcs *weimcs)

diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index afdaa1c..0147920 100644 (file)
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -98,6 +98,12 @@ struct iim_regs {
        u32 iim_scs3;
 };
 
+struct iomuxc_regs {
+       u32 unused1;
+       u32 unused2;
+       u32 gpr;
+};
+
 struct mx3_cpu_type {
        u8 srev;
        u32 v;
@@ -636,7 +642,6 @@ struct esdc_regs {
 #define WEIM_BASE      0xb8002000
 
 #define IOMUXC_BASE    0x43FAC000
-#define IOMUXC_GPR     (IOMUXC_BASE + 0x8)
 #define IOMUXC_SW_MUX_CTL(x)   (IOMUXC_BASE + 0xc + (x) * 4)
 #define IOMUXC_SW_PAD_CTL(x)   (IOMUXC_BASE + 0x154 + (x) * 4)