drm/meson: store the framebuffer width for plane commit
authorNeil Armstrong <narmstrong@baylibre.com>
Mon, 21 Oct 2019 09:15:03 +0000 (11:15 +0200)
committerNeil Armstrong <narmstrong@baylibre.com>
Tue, 10 Dec 2019 09:08:37 +0000 (10:08 +0100)
Also store the framebuffer width in the private common struct
to be used by the AFBC decoder module driver when committing the AFBC
plane.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191021091509.3864-4-narmstrong@baylibre.com
drivers/gpu/drm/meson/meson_drv.h
drivers/gpu/drm/meson/meson_plane.c

index 820d07b..3287282 100644 (file)
@@ -52,6 +52,7 @@ struct meson_drm {
                uint32_t osd1_addr;
                uint32_t osd1_stride;
                uint32_t osd1_height;
+               uint32_t osd1_width;
                uint32_t osd_sc_ctrl0;
                uint32_t osd_sc_i_wh_m1;
                uint32_t osd_sc_o_h_start_end;
index ed54322..5e798c2 100644 (file)
@@ -305,6 +305,7 @@ static void meson_plane_atomic_update(struct drm_plane *plane,
        priv->viu.osd1_addr = gem->paddr;
        priv->viu.osd1_stride = fb->pitches[0];
        priv->viu.osd1_height = fb->height;
+       priv->viu.osd1_width = fb->width;
 
        if (!meson_plane->enabled) {
                /* Reset OSD1 before enabling it on GXL+ SoCs */