RDMA/hns: Program the tclass and flow label into the hardware
authorLijun Ou <oulijun@huawei.com>
Mon, 30 Jul 2018 12:20:30 +0000 (20:20 +0800)
committerJason Gunthorpe <jgg@mellanox.com>
Tue, 31 Jul 2018 02:42:44 +0000 (20:42 -0600)
This was missed in a few places, and was just using 0.

Also correct the spelling of HNS_ROCE_FLOW_LABEL_MASK

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
drivers/infiniband/hw/hns/hns_roce_ah.c
drivers/infiniband/hw/hns/hns_roce_device.h
drivers/infiniband/hw/hns/hns_roce_hw_v1.c
drivers/infiniband/hw/hns/hns_roce_hw_v2.c

index 14efa3b..0d96c5b 100644 (file)
@@ -97,7 +97,7 @@ int hns_roce_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
        rdma_ah_set_static_rate(ah_attr, ah->av.stat_rate);
        rdma_ah_set_grh(ah_attr, NULL,
                        (le32_to_cpu(ah->av.sl_tclass_flowlabel) &
-                        HNS_ROCE_FLOW_LABLE_MASK), ah->av.gid_index,
+                        HNS_ROCE_FLOW_LABEL_MASK), ah->av.gid_index,
                        ah->av.hop_limit,
                        (le32_to_cpu(ah->av.sl_tclass_flowlabel) >>
                         HNS_ROCE_TCLASS_SHIFT));
index 1c25275..0eab5a2 100644 (file)
@@ -76,7 +76,7 @@
 /* 4G/4K = 1M */
 #define HNS_ROCE_SL_SHIFT                      28
 #define HNS_ROCE_TCLASS_SHIFT                  20
-#define HNS_ROCE_FLOW_LABLE_MASK               0xfffff
+#define HNS_ROCE_FLOW_LABEL_MASK               0xfffff
 
 #define HNS_ROCE_MAX_PORTS                     6
 #define HNS_ROCE_MAX_GID_NUM                   16
index 8e11c6b..aa7f234 100644 (file)
@@ -174,7 +174,9 @@ static int hns_roce_v1_post_send(struct ib_qp *ibqp,
 
                        roce_set_field(ud_sq_wqe->u32_36,
                                       UD_SEND_WQE_U32_36_FLOW_LABEL_M,
-                                      UD_SEND_WQE_U32_36_FLOW_LABEL_S, 0);
+                                      UD_SEND_WQE_U32_36_FLOW_LABEL_S,
+                                      ah->av.sl_tclass_flowlabel &
+                                      HNS_ROCE_FLOW_LABEL_MASK);
                        roce_set_field(ud_sq_wqe->u32_36,
                                      UD_SEND_WQE_U32_36_PRIORITY_M,
                                      UD_SEND_WQE_U32_36_PRIORITY_S,
@@ -192,7 +194,9 @@ static int hns_roce_v1_post_send(struct ib_qp *ibqp,
                                       ah->av.hop_limit);
                        roce_set_field(ud_sq_wqe->u32_40,
                                       UD_SEND_WQE_U32_40_TRAFFIC_CLASS_M,
-                                      UD_SEND_WQE_U32_40_TRAFFIC_CLASS_S, 0);
+                                      UD_SEND_WQE_U32_40_TRAFFIC_CLASS_S,
+                                      ah->av.sl_tclass_flowlabel >>
+                                      HNS_ROCE_TCLASS_SHIFT);
 
                        memcpy(&ud_sq_wqe->dgid[0], &ah->av.dgid[0], GID_LEN);
 
index 57d744d..268d55b 100644 (file)
@@ -332,14 +332,13 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp,
                        roce_set_field(ud_sq_wqe->byte_36,
                                       V2_UD_SEND_WQE_BYTE_36_TCLASS_M,
                                       V2_UD_SEND_WQE_BYTE_36_TCLASS_S,
-                                      0);
-                       roce_set_field(ud_sq_wqe->byte_36,
-                                      V2_UD_SEND_WQE_BYTE_36_TCLASS_M,
-                                      V2_UD_SEND_WQE_BYTE_36_TCLASS_S,
-                                      0);
+                                      ah->av.sl_tclass_flowlabel >>
+                                      HNS_ROCE_TCLASS_SHIFT);
                        roce_set_field(ud_sq_wqe->byte_40,
                                       V2_UD_SEND_WQE_BYTE_40_FLOW_LABEL_M,
-                                      V2_UD_SEND_WQE_BYTE_40_FLOW_LABEL_S, 0);
+                                      V2_UD_SEND_WQE_BYTE_40_FLOW_LABEL_S,
+                                      ah->av.sl_tclass_flowlabel &
+                                      HNS_ROCE_FLOW_LABEL_MASK);
                        roce_set_field(ud_sq_wqe->byte_40,
                                       V2_UD_SEND_WQE_BYTE_40_SL_M,
                                       V2_UD_SEND_WQE_BYTE_40_SL_S,