defm VCOMPRESS_V : VCPR_MV_Mask<"vcompress", 0b010111>;
} // Constraints = "@earlyclobber $vd", RVVConstraint = Vcompress
-let hasSideEffects = 0, mayLoad = 0, mayStore = 0,
+let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isMoveReg = 1,
RVVConstraint = NoConstraint in {
// A future extension may relax the vector register alignment restrictions.
foreach n = [1, 2, 4, 8] in {
; CHECK-NEXT: li a2, 128
; CHECK-NEXT: bgeu a0, a2, .LBB0_2
; CHECK-NEXT: .LBB0_4: # %entry
- ; CHECK-NEXT: vmv1r.v v8, v9
- ; CHECK-NEXT: vse64.v v8, (a1)
+ ; CHECK-NEXT: vse64.v v9, (a1)
; CHECK-NEXT: ret
entry:
ret void