+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -mcpu=core2 -mattr=+mmx,+sse2 | FileCheck %s
; rdar://6602459
@g_v1di = external global <1 x i64>
define void @t1() nounwind {
-entry:
- %call = call <1 x i64> @return_v1di() ; <<1 x i64>> [#uses=0]
- store <1 x i64> %call, <1 x i64>* @g_v1di
- ret void
; CHECK-LABEL: t1:
-; CHECK: callq
-; CHECK-NEXT: movq _g_v1di
-; CHECK-NEXT: movq %rax,
+; CHECK: ## BB#0: ## %entry
+; CHECK-NEXT: pushq %rax
+; CHECK-NEXT: callq _return_v1di
+; CHECK-NEXT: movq _g_v1di@{{.*}}(%rip), %rcx
+; CHECK-NEXT: movq %rax, (%rcx)
+; CHECK-NEXT: popq %rax
+; CHECK-NEXT: retq
+entry:
+ %call = call <1 x i64> @return_v1di() ; <<1 x i64>> [#uses=0]
+ store <1 x i64> %call, <1 x i64>* @g_v1di
+ ret void
}
declare <1 x i64> @return_v1di()
define <1 x i64> @t2() nounwind {
- ret <1 x i64> <i64 1>
; CHECK-LABEL: t2:
-; CHECK: movl $1
-; CHECK-NEXT: ret
+; CHECK: ## BB#0:
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: retq
+ ret <1 x i64> <i64 1>
}
define <2 x i32> @t3() nounwind {
- ret <2 x i32> <i32 1, i32 0>
; CHECK-LABEL: t3:
-; CHECK: movl $1
-; CHECK: movd {{.*}}, %xmm0
+; CHECK: ## BB#0:
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: movd %rax, %xmm0
+; CHECK-NEXT: retq
+ ret <2 x i32> <i32 1, i32 0>
}
define double @t4() nounwind {
- ret double bitcast (<2 x i32> <i32 1, i32 0> to double)
; CHECK-LABEL: t4:
-; CHECK: movl $1
-; CHECK-NOT: pshufd
-; CHECK: movd {{.*}}, %xmm0
+; CHECK: ## BB#0:
+; CHECK-NEXT: movl $1, %eax
+; CHECK-NEXT: movd %eax, %xmm0
+; CHECK-NEXT: retq
+ ret double bitcast (<2 x i32> <i32 1, i32 0> to double)
}