cacheinfo: Check cache properties are present in DT
authorPierre Gondois <pierre.gondois@arm.com>
Fri, 14 Apr 2023 08:14:50 +0000 (10:14 +0200)
committerSudeep Holla <sudeep.holla@arm.com>
Fri, 14 Apr 2023 09:13:38 +0000 (10:13 +0100)
If a Device Tree (DT) is used, the presence of cache properties is
assumed. Not finding any is not considered. For arm64 platforms,
cache information can be fetched from the clidr_el1 register.
Checking whether cache information is available in the DT
allows to switch to using clidr_el1.

init_of_cache_level()
\-of_count_cache_leaves()
will assume there a 2 cache leaves (L1 data/instruction caches), which
can be different from clidr_el1 information.

cache_setup_of_node() tries to read cache properties in the DT.
If there are none, this is considered a success. Knowing no
information was available would allow to switch to using clidr_el1.

Fixes: de0df442ee49 ("cacheinfo: Check 'cache-unified' property to count cache leaves")
Reported-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/all/20230404-hatred-swimmer-6fecdf33b57a@spud/
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230414081453.244787-3-pierre.gondois@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
drivers/base/cacheinfo.c

index ba14c78..f16e5a8 100644 (file)
@@ -78,6 +78,9 @@ bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y)
 }
 
 #ifdef CONFIG_OF
+
+static bool of_check_cache_nodes(struct device_node *np);
+
 /* OF properties to query for a given cache type */
 struct cache_type_info {
        const char *size_prop;
@@ -205,6 +208,11 @@ static int cache_setup_of_node(unsigned int cpu)
                return -ENOENT;
        }
 
+       if (!of_check_cache_nodes(np)) {
+               of_node_put(np);
+               return -ENOENT;
+       }
+
        prev = np;
 
        while (index < cache_leaves(cpu)) {
@@ -229,6 +237,25 @@ static int cache_setup_of_node(unsigned int cpu)
        return 0;
 }
 
+static bool of_check_cache_nodes(struct device_node *np)
+{
+       struct device_node *next;
+
+       if (of_property_present(np, "cache-size")   ||
+           of_property_present(np, "i-cache-size") ||
+           of_property_present(np, "d-cache-size") ||
+           of_property_present(np, "cache-unified"))
+               return true;
+
+       next = of_find_next_cache_node(np);
+       if (next) {
+               of_node_put(next);
+               return true;
+       }
+
+       return false;
+}
+
 static int of_count_cache_leaves(struct device_node *np)
 {
        unsigned int leaves = 0;
@@ -260,6 +287,11 @@ int init_of_cache_level(unsigned int cpu)
        struct device_node *prev = NULL;
        unsigned int levels = 0, leaves, level;
 
+       if (!of_check_cache_nodes(np)) {
+               of_node_put(np);
+               return -ENOENT;
+       }
+
        leaves = of_count_cache_leaves(np);
        if (leaves > 0)
                levels = 1;