chip->owner = THIS_MODULE;
chip->parent = bcma_bus_get_host_dev(bus);
#if IS_BUILTIN(CONFIG_OF)
- if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
- chip->of_node = cc->core->dev.of_node;
+ chip->of_node = cc->core->dev.of_node;
#endif
switch (bus->chipinfo.id) {
case BCMA_CHIP_ID_BCM4707:
{
struct device_node *node;
- if (!IS_ENABLED(CONFIG_OF_IRQ))
- return;
-
node = bcma_of_find_child_device(parent, core);
if (node)
core->dev.of_node = node;
core->dev.release = bcma_release_core_dev;
core->dev.bus = &bcma_bus_type;
dev_set_name(&core->dev, "bcma%d:%d", bus->num, core->core_index);
+ core->dev.parent = bcma_bus_get_host_dev(bus);
+ if (core->dev.parent)
+ bcma_of_fill_device(core->dev.parent, core);
switch (bus->hosttype) {
case BCMA_HOSTTYPE_PCI:
- core->dev.parent = &bus->host_pci->dev;
core->dma_dev = &bus->host_pci->dev;
core->irq = bus->host_pci->irq;
break;
case BCMA_HOSTTYPE_SOC:
if (IS_ENABLED(CONFIG_OF) && bus->host_pdev) {
core->dma_dev = &bus->host_pdev->dev;
- core->dev.parent = &bus->host_pdev->dev;
- if (core->dev.parent)
- bcma_of_fill_device(core->dev.parent, core);
} else {
core->dev.dma_mask = &core->dev.coherent_dma_mask;
core->dma_dev = &core->dev;
#include "hif.h"
#include "debug.h"
#include "htc.h"
+#include "hw.h"
void ath10k_bmi_start(struct ath10k *ar)
{
+ int ret;
+
ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi start\n");
ar->bmi.done_sent = false;
+
+ /* Enable hardware clock to speed up firmware download */
+ if (ar->hw_params.hw_ops->enable_pll_clk) {
+ ret = ar->hw_params.hw_ops->enable_pll_clk(ar);
+ ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi enable pll ret %d\n", ret);
+ }
}
int ath10k_bmi_done(struct ath10k *ar)
return 0;
}
+int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val)
+{
+ struct bmi_cmd cmd;
+ u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.write_soc_reg);
+ int ret;
+
+ ath10k_dbg(ar, ATH10K_DBG_BMI,
+ "bmi write soc register 0x%08x val 0x%08x\n",
+ address, reg_val);
+
+ if (ar->bmi.done_sent) {
+ ath10k_warn(ar, "bmi write soc register command in progress\n");
+ return -EBUSY;
+ }
+
+ cmd.id = __cpu_to_le32(BMI_WRITE_SOC_REGISTER);
+ cmd.write_soc_reg.addr = __cpu_to_le32(address);
+ cmd.write_soc_reg.value = __cpu_to_le32(reg_val);
+
+ ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, NULL, NULL);
+ if (ret) {
+ ath10k_warn(ar, "Unable to write soc register to device: %d\n",
+ ret);
+ return ret;
+ }
+
+ return 0;
+}
+
+int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val)
+{
+ struct bmi_cmd cmd;
+ union bmi_resp resp;
+ u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.read_soc_reg);
+ u32 resplen = sizeof(resp.read_soc_reg);
+ int ret;
+
+ ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read soc register 0x%08x\n",
+ address);
+
+ if (ar->bmi.done_sent) {
+ ath10k_warn(ar, "bmi read soc register command in progress\n");
+ return -EBUSY;
+ }
+
+ cmd.id = __cpu_to_le32(BMI_READ_SOC_REGISTER);
+ cmd.read_soc_reg.addr = __cpu_to_le32(address);
+
+ ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, &resp, &resplen);
+ if (ret) {
+ ath10k_warn(ar, "Unable to read soc register from device: %d\n",
+ ret);
+ return ret;
+ }
+
+ *reg_val = __le32_to_cpu(resp.read_soc_reg.value);
+
+ ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read soc register value 0x%08x\n",
+ *reg_val);
+
+ return 0;
+}
+
int ath10k_bmi_write_memory(struct ath10k *ar,
u32 address, const void *buffer, u32 length)
{
int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length);
int ath10k_bmi_fast_download(struct ath10k *ar, u32 address,
const void *buffer, u32 length);
+int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val);
+int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val);
#endif /* _BMI_H_ */
.board_size = QCA6174_BOARD_DATA_SZ,
.board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
},
- .hw_ops = &qca988x_ops,
+ .hw_ops = &qca6174_ops,
+ .hw_clk = qca6174_clk,
+ .target_cpu_freq = 176000000,
.decap_align_bytes = 4,
},
{
.board_size = QCA9377_BOARD_DATA_SZ,
.board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
},
- .hw_ops = &qca988x_ops,
+ .hw_ops = &qca6174_ops,
+ .hw_clk = qca6174_clk,
+ .target_cpu_freq = 176000000,
.decap_align_bytes = 4,
},
{
u32 num_rf_chains;
u32 max_spatial_stream;
/* protected by conf_mutex */
+ u32 low_5ghz_chan;
+ u32 high_5ghz_chan;
bool ani_enabled;
bool p2p;
mutex_lock(&ar->conf_mutex);
- if (len > buf_len)
- len = buf_len;
-
spin_lock_bh(&ar->data_lock);
for (i = 0; i < WMI_SERVICE_MAX; i++) {
enabled = test_bit(i, ar->wmi.svc_map);
size_t count, loff_t *ppos)
{
struct ath10k *ar = file->private_data;
+ struct ath10k_vif *arvif;
+
+ /* Just check for for the first vif alone, as all the vifs will be
+ * sharing the same channel and if the channel is disabled, all the
+ * vifs will share the same 'is_started' state.
+ */
+ arvif = list_first_entry(&ar->arvifs, typeof(*arvif), list);
+ if (!arvif->is_started)
+ return -EINVAL;
ieee80211_radar_detected(ar->hw);
#include "hw.h"
#include "hif.h"
#include "wmi-ops.h"
+#include "bmi.h"
const struct ath10k_hw_regs qca988x_regs = {
.rtc_soc_base_address = 0x00004000,
.pcie_intr_fw_mask = 0x00000400,
.pcie_intr_ce_mask_all = 0x0007f800,
.pcie_intr_clr_address = 0x00000014,
+ .cpu_pll_init_address = 0x00404020,
+ .cpu_speed_address = 0x00404024,
+ .core_clk_div_address = 0x00404028,
};
const struct ath10k_hw_regs qca99x0_regs = {
.ce_desc_meta_data_lsb = 4,
};
+const struct ath10k_hw_clk_params qca6174_clk[ATH10K_HW_REFCLK_COUNT] = {
+ {
+ .refclk = 48000000,
+ .div = 0xe,
+ .rnfrac = 0x2aaa8,
+ .settle_time = 2400,
+ .refdiv = 0,
+ .outdiv = 1,
+ },
+ {
+ .refclk = 19200000,
+ .div = 0x24,
+ .rnfrac = 0x2aaa8,
+ .settle_time = 960,
+ .refdiv = 0,
+ .outdiv = 1,
+ },
+ {
+ .refclk = 24000000,
+ .div = 0x1d,
+ .rnfrac = 0x15551,
+ .settle_time = 1200,
+ .refdiv = 0,
+ .outdiv = 1,
+ },
+ {
+ .refclk = 26000000,
+ .div = 0x1b,
+ .rnfrac = 0x4ec4,
+ .settle_time = 1300,
+ .refdiv = 0,
+ .outdiv = 1,
+ },
+ {
+ .refclk = 37400000,
+ .div = 0x12,
+ .rnfrac = 0x34b49,
+ .settle_time = 1870,
+ .refdiv = 0,
+ .outdiv = 1,
+ },
+ {
+ .refclk = 38400000,
+ .div = 0x12,
+ .rnfrac = 0x15551,
+ .settle_time = 1920,
+ .refdiv = 0,
+ .outdiv = 1,
+ },
+ {
+ .refclk = 40000000,
+ .div = 0x12,
+ .rnfrac = 0x26665,
+ .settle_time = 2000,
+ .refdiv = 0,
+ .outdiv = 1,
+ },
+ {
+ .refclk = 52000000,
+ .div = 0x1b,
+ .rnfrac = 0x4ec4,
+ .settle_time = 2600,
+ .refdiv = 0,
+ .outdiv = 1,
+ },
+};
+
void ath10k_hw_fill_survey_time(struct ath10k *ar, struct survey_info *survey,
u32 cc, u32 rcc, u32 cc_prev, u32 rcc_prev)
{
mutex_unlock(&ar->conf_mutex);
}
+/**
+ * ath10k_hw_qca6174_enable_pll_clock() - enable the qca6174 hw pll clock
+ * @ar: the ath10k blob
+ *
+ * This function is very hardware specific, the clock initialization
+ * steps is very sensitive and could lead to unknown crash, so they
+ * should be done in sequence.
+ *
+ * *** Be aware if you planned to refactor them. ***
+ *
+ * Return: 0 if successfully enable the pll, otherwise EINVAL
+ */
+static int ath10k_hw_qca6174_enable_pll_clock(struct ath10k *ar)
+{
+ int ret, wait_limit;
+ u32 clk_div_addr, pll_init_addr, speed_addr;
+ u32 addr, reg_val, mem_val;
+ struct ath10k_hw_params *hw;
+ const struct ath10k_hw_clk_params *hw_clk;
+
+ hw = &ar->hw_params;
+
+ if (ar->regs->core_clk_div_address == 0 ||
+ ar->regs->cpu_pll_init_address == 0 ||
+ ar->regs->cpu_speed_address == 0)
+ return -EINVAL;
+
+ clk_div_addr = ar->regs->core_clk_div_address;
+ pll_init_addr = ar->regs->cpu_pll_init_address;
+ speed_addr = ar->regs->cpu_speed_address;
+
+ /* Read efuse register to find out the right hw clock configuration */
+ addr = (RTC_SOC_BASE_ADDRESS | EFUSE_OFFSET);
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ /* sanitize if the hw refclk index is out of the boundary */
+ if (MS(reg_val, EFUSE_XTAL_SEL) > ATH10K_HW_REFCLK_COUNT)
+ return -EINVAL;
+
+ hw_clk = &hw->hw_clk[MS(reg_val, EFUSE_XTAL_SEL)];
+
+ /* Set the rnfrac and outdiv params to bb_pll register */
+ addr = (RTC_SOC_BASE_ADDRESS | BB_PLL_CONFIG_OFFSET);
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ reg_val &= ~(BB_PLL_CONFIG_FRAC_MASK | BB_PLL_CONFIG_OUTDIV_MASK);
+ reg_val |= (SM(hw_clk->rnfrac, BB_PLL_CONFIG_FRAC) |
+ SM(hw_clk->outdiv, BB_PLL_CONFIG_OUTDIV));
+ ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
+ if (ret)
+ return -EINVAL;
+
+ /* Set the correct settle time value to pll_settle register */
+ addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_SETTLE_OFFSET);
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ reg_val &= ~WLAN_PLL_SETTLE_TIME_MASK;
+ reg_val |= SM(hw_clk->settle_time, WLAN_PLL_SETTLE_TIME);
+ ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
+ if (ret)
+ return -EINVAL;
+
+ /* Set the clock_ctrl div to core_clk_ctrl register */
+ addr = (RTC_SOC_BASE_ADDRESS | SOC_CORE_CLK_CTRL_OFFSET);
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ reg_val &= ~SOC_CORE_CLK_CTRL_DIV_MASK;
+ reg_val |= SM(1, SOC_CORE_CLK_CTRL_DIV);
+ ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
+ if (ret)
+ return -EINVAL;
+
+ /* Set the clock_div register */
+ mem_val = 1;
+ ret = ath10k_bmi_write_memory(ar, clk_div_addr, &mem_val,
+ sizeof(mem_val));
+ if (ret)
+ return -EINVAL;
+
+ /* Configure the pll_control register */
+ addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_CONTROL_OFFSET);
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ reg_val |= (SM(hw_clk->refdiv, WLAN_PLL_CONTROL_REFDIV) |
+ SM(hw_clk->div, WLAN_PLL_CONTROL_DIV) |
+ SM(1, WLAN_PLL_CONTROL_NOPWD));
+ ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
+ if (ret)
+ return -EINVAL;
+
+ /* busy wait (max 1s) the rtc_sync status register indicate ready */
+ wait_limit = 100000;
+ addr = (RTC_WMAC_BASE_ADDRESS | RTC_SYNC_STATUS_OFFSET);
+ do {
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ if (!MS(reg_val, RTC_SYNC_STATUS_PLL_CHANGING))
+ break;
+
+ wait_limit--;
+ udelay(10);
+
+ } while (wait_limit > 0);
+
+ if (MS(reg_val, RTC_SYNC_STATUS_PLL_CHANGING))
+ return -EINVAL;
+
+ /* Unset the pll_bypass in pll_control register */
+ addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_CONTROL_OFFSET);
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ reg_val &= ~WLAN_PLL_CONTROL_BYPASS_MASK;
+ reg_val |= SM(0, WLAN_PLL_CONTROL_BYPASS);
+ ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
+ if (ret)
+ return -EINVAL;
+
+ /* busy wait (max 1s) the rtc_sync status register indicate ready */
+ wait_limit = 100000;
+ addr = (RTC_WMAC_BASE_ADDRESS | RTC_SYNC_STATUS_OFFSET);
+ do {
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ if (!MS(reg_val, RTC_SYNC_STATUS_PLL_CHANGING))
+ break;
+
+ wait_limit--;
+ udelay(10);
+
+ } while (wait_limit > 0);
+
+ if (MS(reg_val, RTC_SYNC_STATUS_PLL_CHANGING))
+ return -EINVAL;
+
+ /* Enable the hardware cpu clock register */
+ addr = (RTC_SOC_BASE_ADDRESS | SOC_CPU_CLOCK_OFFSET);
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ reg_val &= ~SOC_CPU_CLOCK_STANDARD_MASK;
+ reg_val |= SM(1, SOC_CPU_CLOCK_STANDARD);
+ ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
+ if (ret)
+ return -EINVAL;
+
+ /* unset the nopwd from pll_control register */
+ addr = (RTC_WMAC_BASE_ADDRESS | WLAN_PLL_CONTROL_OFFSET);
+ ret = ath10k_bmi_read_soc_reg(ar, addr, ®_val);
+ if (ret)
+ return -EINVAL;
+
+ reg_val &= ~WLAN_PLL_CONTROL_NOPWD_MASK;
+ ret = ath10k_bmi_write_soc_reg(ar, addr, reg_val);
+ if (ret)
+ return -EINVAL;
+
+ /* enable the pll_init register */
+ mem_val = 1;
+ ret = ath10k_bmi_write_memory(ar, pll_init_addr, &mem_val,
+ sizeof(mem_val));
+ if (ret)
+ return -EINVAL;
+
+ /* set the target clock frequency to speed register */
+ ret = ath10k_bmi_write_memory(ar, speed_addr, &hw->target_cpu_freq,
+ sizeof(hw->target_cpu_freq));
+ if (ret)
+ return -EINVAL;
+
+ return 0;
+}
+
const struct ath10k_hw_ops qca988x_ops = {
.set_coverage_class = ath10k_hw_qca988x_set_coverage_class,
};
const struct ath10k_hw_ops qca99x0_ops = {
.rx_desc_get_l3_pad_bytes = ath10k_qca99x0_rx_desc_get_l3_pad_bytes,
};
+
+const struct ath10k_hw_ops qca6174_ops = {
+ .set_coverage_class = ath10k_hw_qca988x_set_coverage_class,
+ .enable_pll_clk = ath10k_hw_qca6174_enable_pll_clock,
+};
u32 pcie_intr_fw_mask;
u32 pcie_intr_ce_mask_all;
u32 pcie_intr_clr_address;
+ u32 cpu_pll_init_address;
+ u32 cpu_speed_address;
+ u32 core_clk_div_address;
};
extern const struct ath10k_hw_regs qca988x_regs;
ATH10K_HW_CC_WRAP_SHIFTED_EACH = 2,
};
+enum ath10k_hw_refclk_speed {
+ ATH10K_HW_REFCLK_UNKNOWN = -1,
+ ATH10K_HW_REFCLK_48_MHZ = 0,
+ ATH10K_HW_REFCLK_19_2_MHZ = 1,
+ ATH10K_HW_REFCLK_24_MHZ = 2,
+ ATH10K_HW_REFCLK_26_MHZ = 3,
+ ATH10K_HW_REFCLK_37_4_MHZ = 4,
+ ATH10K_HW_REFCLK_38_4_MHZ = 5,
+ ATH10K_HW_REFCLK_40_MHZ = 6,
+ ATH10K_HW_REFCLK_52_MHZ = 7,
+
+ /* must be the last one */
+ ATH10K_HW_REFCLK_COUNT,
+};
+
+struct ath10k_hw_clk_params {
+ u32 refclk;
+ u32 div;
+ u32 rnfrac;
+ u32 settle_time;
+ u32 refdiv;
+ u32 outdiv;
+};
+
struct ath10k_hw_params {
u32 id;
u16 dev_id;
/* Number of bytes used for alignment in rx_hdr_status of rx desc. */
int decap_align_bytes;
+
+ /* hw specific clock control parameters */
+ const struct ath10k_hw_clk_params *hw_clk;
+ int target_cpu_freq;
};
struct htt_rx_desc;
struct ath10k_hw_ops {
int (*rx_desc_get_l3_pad_bytes)(struct htt_rx_desc *rxd);
void (*set_coverage_class)(struct ath10k *ar, s16 value);
+ int (*enable_pll_clk)(struct ath10k *ar);
};
extern const struct ath10k_hw_ops qca988x_ops;
extern const struct ath10k_hw_ops qca99x0_ops;
+extern const struct ath10k_hw_ops qca6174_ops;
+
+extern const struct ath10k_hw_clk_params qca6174_clk[];
static inline int
ath10k_rx_desc_get_l3_pad_bytes(struct ath10k_hw_params *hw,
#define WAVE1_PHYCLK_USEC_MASK 0x0000007F
#define WAVE1_PHYCLK_USEC_LSB 0
+/* qca6174 PLL offset/mask */
+#define SOC_CORE_CLK_CTRL_OFFSET 0x00000114
+#define SOC_CORE_CLK_CTRL_DIV_LSB 0
+#define SOC_CORE_CLK_CTRL_DIV_MASK 0x00000007
+
+#define EFUSE_OFFSET 0x0000032c
+#define EFUSE_XTAL_SEL_LSB 8
+#define EFUSE_XTAL_SEL_MASK 0x00000700
+
+#define BB_PLL_CONFIG_OFFSET 0x000002f4
+#define BB_PLL_CONFIG_FRAC_LSB 0
+#define BB_PLL_CONFIG_FRAC_MASK 0x0003ffff
+#define BB_PLL_CONFIG_OUTDIV_LSB 18
+#define BB_PLL_CONFIG_OUTDIV_MASK 0x001c0000
+
+#define WLAN_PLL_SETTLE_OFFSET 0x0018
+#define WLAN_PLL_SETTLE_TIME_LSB 0
+#define WLAN_PLL_SETTLE_TIME_MASK 0x000007ff
+
+#define WLAN_PLL_CONTROL_OFFSET 0x0014
+#define WLAN_PLL_CONTROL_DIV_LSB 0
+#define WLAN_PLL_CONTROL_DIV_MASK 0x000003ff
+#define WLAN_PLL_CONTROL_REFDIV_LSB 10
+#define WLAN_PLL_CONTROL_REFDIV_MASK 0x00003c00
+#define WLAN_PLL_CONTROL_BYPASS_LSB 16
+#define WLAN_PLL_CONTROL_BYPASS_MASK 0x00010000
+#define WLAN_PLL_CONTROL_NOPWD_LSB 18
+#define WLAN_PLL_CONTROL_NOPWD_MASK 0x00040000
+
+#define RTC_SYNC_STATUS_OFFSET 0x0244
+#define RTC_SYNC_STATUS_PLL_CHANGING_LSB 5
+#define RTC_SYNC_STATUS_PLL_CHANGING_MASK 0x00000020
+/* qca6174 PLL offset/mask end */
+
#endif /* _HW_H_ */
ath10k_warn(ar, "failed to set pdev regdomain: %d\n", ret);
}
+static void ath10k_mac_update_channel_list(struct ath10k *ar,
+ struct ieee80211_supported_band *band)
+{
+ int i;
+
+ if (ar->low_5ghz_chan && ar->high_5ghz_chan) {
+ for (i = 0; i < band->n_channels; i++) {
+ if (band->channels[i].center_freq < ar->low_5ghz_chan ||
+ band->channels[i].center_freq > ar->high_5ghz_chan)
+ band->channels[i].flags |=
+ IEEE80211_CHAN_DISABLED;
+ }
+ }
+}
+
static void ath10k_reg_notifier(struct wiphy *wiphy,
struct regulatory_request *request)
{
if (ar->state == ATH10K_STATE_ON)
ath10k_regd_update(ar);
mutex_unlock(&ar->conf_mutex);
+
+ if (ar->phy_capability & WHAL_WLAN_11A_CAPABILITY)
+ ath10k_mac_update_channel_list(ar,
+ ar->hw->wiphy->bands[NL80211_BAND_5GHZ]);
}
/***************/
lockdep_assert_held(&ar->data_lock);
WARN_ON(ctx && vifs);
- WARN_ON(vifs && n_vifs != 1);
+ WARN_ON(vifs && !n_vifs);
/* FIXME: Sort of an optimization and a workaround. Peers and vifs are
* on a linked list now. Doing a lookup peer -> vif -> chanctx for each
}
remaining_bytes -= nbytes;
-
- if (ret) {
- ath10k_warn(ar, "failed to read diag value at 0x%x: %d\n",
- address, ret);
- break;
- }
memcpy(data, data_buf, nbytes);
address += nbytes;
spin_lock_bh(&ar->data_lock);
ch = ar->rx_channel;
+
+ /* fetch target operating channel during channel change */
+ if (!ch)
+ ch = ar->tgt_oper_chan;
+
spin_unlock_bh(&ar->data_lock);
if (!ch) {
arg->phy_capab = ev->phy_capability;
arg->num_rf_chains = ev->num_rf_chains;
arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
+ arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
+ arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
arg->num_mem_reqs = ev->num_mem_reqs;
arg->service_map = ev->wmi_service_bitmap;
arg->service_map_len = sizeof(ev->wmi_service_bitmap);
arg->phy_capab = ev->phy_capability;
arg->num_rf_chains = ev->num_rf_chains;
arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
+ arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
+ arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
arg->num_mem_reqs = ev->num_mem_reqs;
arg->service_map = ev->wmi_service_bitmap;
arg->service_map_len = sizeof(ev->wmi_service_bitmap);
ar->phy_capability = __le32_to_cpu(arg.phy_capab);
ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
+ ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
+ ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
arg.service_map, arg.service_map_len);
struct phyerr_radar_report {
__le32 reg0; /* RADAR_REPORT_REG0_* */
- __le32 reg1; /* REDAR_REPORT_REG1_* */
+ __le32 reg1; /* RADAR_REPORT_REG1_* */
} __packed;
#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
__le32 num_rf_chains;
__le32 eeprom_rd;
__le32 num_mem_reqs;
+ __le32 low_5ghz_chan;
+ __le32 high_5ghz_chan;
const __le32 *service_map;
size_t service_map_len;
const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
};
static struct ieee80211_channel ath6kl_5ghz_a_channels[] = {
- CHAN5G(34, 0), CHAN5G(36, 0),
- CHAN5G(38, 0), CHAN5G(40, 0),
- CHAN5G(42, 0), CHAN5G(44, 0),
- CHAN5G(46, 0), CHAN5G(48, 0),
+ CHAN5G(36, 0), CHAN5G(40, 0),
+ CHAN5G(44, 0), CHAN5G(48, 0),
CHAN5G(52, 0), CHAN5G(56, 0),
CHAN5G(60, 0), CHAN5G(64, 0),
CHAN5G(100, 0), CHAN5G(104, 0),
return;
}
+ if (!spec_priv->spec_config.enabled)
+ return;
+
ath_ps_ops(common)->wakeup(common);
rxfilter = ath9k_hw_getrxfilter(ah);
ath9k_hw_setrxfilter(ah, rxfilter |
{ USB_DEVICE(0x0cf3, 0xb002) }, /* Ubiquiti WifiStation */
{ USB_DEVICE(0x057c, 0x8403) }, /* AVM FRITZ!WLAN 11N v2 USB */
{ USB_DEVICE(0x0471, 0x209e) }, /* Philips (or NXP) PTA01 */
+ { USB_DEVICE(0x1eda, 0x2315) }, /* AirTies */
{ USB_DEVICE(0x0cf3, 0x7015),
.driver_info = AR9287_USB }, /* Atheros */
wcn36xx_smd_stop(wcn);
out_free_smd_buf:
kfree(wcn->hal_buf);
-out_free_dxe_pool:
- wcn36xx_dxe_free_mem_pools(wcn);
out_free_dxe_ctl:
wcn36xx_dxe_free_ctl_blks(wcn);
+out_free_dxe_pool:
+ wcn36xx_dxe_free_mem_pools(wcn);
out_smd_close:
wcn36xx_smd_close(wcn);
out_err:
}
mutex_unlock(&wil->p2p_wdev_mutex);
- /* social scan on P2P_DEVICE is handled as p2p search */
- if (wdev->iftype == NL80211_IFTYPE_P2P_DEVICE &&
- wil_p2p_is_social_scan(request)) {
+ if (wdev->iftype == NL80211_IFTYPE_P2P_DEVICE) {
if (!wil->p2p.p2p_dev_started) {
wil_err(wil, "P2P search requested on stopped P2P device\n");
rc = -EIO;
goto out;
}
- wil->scan_request = request;
- wil->radio_wdev = wdev;
- rc = wil_p2p_search(wil, request);
- if (rc) {
- wil->radio_wdev = wil_to_wdev(wil);
- wil->scan_request = NULL;
+ /* social scan on P2P_DEVICE is handled as p2p search */
+ if (wil_p2p_is_social_scan(request)) {
+ wil->scan_request = request;
+ wil->radio_wdev = wdev;
+ rc = wil_p2p_search(wil, request);
+ if (rc) {
+ wil->radio_wdev = wil_to_wdev(wil);
+ wil->scan_request = NULL;
+ }
+ goto out;
}
- goto out;
}
(void)wil_p2p_stop_discovery(wil);
for (i = 0; i < request->n_ssids; i++) {
wil_dbg_misc(wil, "SSID[%d]", i);
- print_hex_dump_bytes("SSID ", DUMP_PREFIX_OFFSET,
- request->ssids[i].ssid,
- request->ssids[i].ssid_len);
+ wil_hex_dump_misc("SSID ", DUMP_PREFIX_OFFSET, 16, 1,
+ request->ssids[i].ssid,
+ request->ssids[i].ssid_len, true);
}
if (request->n_ssids)
}
if (request->ie_len)
- print_hex_dump_bytes("Scan IE ", DUMP_PREFIX_OFFSET,
- request->ie, request->ie_len);
+ wil_hex_dump_misc("Scan IE ", DUMP_PREFIX_OFFSET, 16, 1,
+ request->ie, request->ie_len, true);
else
wil_dbg_misc(wil, "Scan has no IE's\n");
rc = wmi_send(wil, WMI_CONNECT_CMDID, &conn, sizeof(conn));
if (rc == 0) {
netif_carrier_on(ndev);
+ wil6210_bus_request(wil, WIL_MAX_BUS_REQUEST_KBPS);
+ wil->bss = bss;
/* Connect can take lots of time */
mod_timer(&wil->connect_timer,
jiffies + msecs_to_jiffies(2000));
return 0;
}
+ wil->locally_generated_disc = true;
rc = wmi_call(wil, WMI_DISCONNECT_CMDID, NULL, 0,
WMI_DISCONNECT_EVENTID, NULL, 0,
WIL6210_DISCONNECT_TO_MS);
*/
wil_dbg_misc(wil, "mgmt_tx\n");
- print_hex_dump_bytes("mgmt tx frame ", DUMP_PREFIX_OFFSET, buf, len);
+ wil_hex_dump_misc("mgmt tx frame ", DUMP_PREFIX_OFFSET, 16, 1, buf,
+ len, true);
cmd = kmalloc(sizeof(*cmd) + len, GFP_KERNEL);
if (!cmd) {
static void wil_print_bcon_data(struct cfg80211_beacon_data *b)
{
- print_hex_dump_bytes("head ", DUMP_PREFIX_OFFSET,
- b->head, b->head_len);
- print_hex_dump_bytes("tail ", DUMP_PREFIX_OFFSET,
- b->tail, b->tail_len);
- print_hex_dump_bytes("BCON IE ", DUMP_PREFIX_OFFSET,
- b->beacon_ies, b->beacon_ies_len);
- print_hex_dump_bytes("PROBE ", DUMP_PREFIX_OFFSET,
- b->probe_resp, b->probe_resp_len);
- print_hex_dump_bytes("PROBE IE ", DUMP_PREFIX_OFFSET,
- b->proberesp_ies, b->proberesp_ies_len);
- print_hex_dump_bytes("ASSOC IE ", DUMP_PREFIX_OFFSET,
- b->assocresp_ies, b->assocresp_ies_len);
+ wil_hex_dump_misc("head ", DUMP_PREFIX_OFFSET, 16, 1,
+ b->head, b->head_len, true);
+ wil_hex_dump_misc("tail ", DUMP_PREFIX_OFFSET, 16, 1,
+ b->tail, b->tail_len, true);
+ wil_hex_dump_misc("BCON IE ", DUMP_PREFIX_OFFSET, 16, 1,
+ b->beacon_ies, b->beacon_ies_len, true);
+ wil_hex_dump_misc("PROBE ", DUMP_PREFIX_OFFSET, 16, 1,
+ b->probe_resp, b->probe_resp_len, true);
+ wil_hex_dump_misc("PROBE IE ", DUMP_PREFIX_OFFSET, 16, 1,
+ b->proberesp_ies, b->proberesp_ies_len, true);
+ wil_hex_dump_misc("ASSOC IE ", DUMP_PREFIX_OFFSET, 16, 1,
+ b->assocresp_ies, b->assocresp_ies_len, true);
}
/* internal functions for device reset and starting AP */
wil->pbss = pbss;
netif_carrier_on(ndev);
+ wil6210_bus_request(wil, WIL_MAX_BUS_REQUEST_KBPS);
rc = wmi_pcp_start(wil, bi, wmi_nettype, chan, hidden_ssid, is_go);
if (rc)
wmi_pcp_stop(wil);
err_pcp_start:
netif_carrier_off(ndev);
+ wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
out:
mutex_unlock(&wil->mutex);
return rc;
wil_dbg_misc(wil, "BI %d DTIM %d\n", info->beacon_interval,
info->dtim_period);
wil_dbg_misc(wil, "PBSS %d\n", info->pbss);
- print_hex_dump_bytes("SSID ", DUMP_PREFIX_OFFSET,
- info->ssid, info->ssid_len);
+ wil_hex_dump_misc("SSID ", DUMP_PREFIX_OFFSET, 16, 1,
+ info->ssid, info->ssid_len, true);
wil_print_bcon_data(bcon);
wil_print_crypto(wil, crypto);
wil_dbg_misc(wil, "stop_ap\n");
netif_carrier_off(ndev);
+ wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
wil_set_recovery_state(wil, fw_recovery_idle);
mutex_lock(&wil->mutex);
module_param(debug_fw, bool, 0444);
MODULE_PARM_DESC(debug_fw, " do not perform card reset. For FW debug");
-static bool oob_mode;
-module_param(oob_mode, bool, 0444);
+static u8 oob_mode;
+module_param(oob_mode, byte, 0444);
MODULE_PARM_DESC(oob_mode,
" enable out of the box (OOB) mode in FW, for diagnostics and certification");
wil_bcast_fini(wil);
wil_update_net_queues_bh(wil, NULL, true);
netif_carrier_off(ndev);
+ wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
if (test_bit(wil_status_fwconnected, wil->status)) {
clear_bit(wil_status_fwconnected, wil->status);
cfg80211_disconnected(ndev, reason_code,
- NULL, 0, false, GFP_KERNEL);
+ NULL, 0,
+ wil->locally_generated_disc,
+ GFP_KERNEL);
+ wil->locally_generated_disc = false;
} else if (test_bit(wil_status_fwconnecting, wil->status)) {
cfg80211_connect_result(ndev, bssid, NULL, 0, NULL, 0,
WLAN_STATUS_UNSPECIFIED_FAILURE,
GFP_KERNEL);
+ wil->bss = NULL;
}
clear_bit(wil_status_fwconnecting, wil->status);
break;
{
struct wil6210_priv *wil = container_of(work,
struct wil6210_priv, disconnect_worker);
+ struct net_device *ndev = wil_to_ndev(wil);
+ int rc;
+ struct {
+ struct wmi_cmd_hdr wmi;
+ struct wmi_disconnect_event evt;
+ } __packed reply;
- mutex_lock(&wil->mutex);
- _wil6210_disconnect(wil, NULL, WLAN_REASON_UNSPECIFIED, false);
- mutex_unlock(&wil->mutex);
+ if (test_bit(wil_status_fwconnected, wil->status))
+ /* connect succeeded after all */
+ return;
+
+ if (!test_bit(wil_status_fwconnecting, wil->status))
+ /* already disconnected */
+ return;
+
+ rc = wmi_call(wil, WMI_DISCONNECT_CMDID, NULL, 0,
+ WMI_DISCONNECT_EVENTID, &reply, sizeof(reply),
+ WIL6210_DISCONNECT_TO_MS);
+ if (rc) {
+ wil_err(wil, "disconnect error %d\n", rc);
+ return;
+ }
+
+ wil_update_net_queues_bh(wil, NULL, true);
+ netif_carrier_off(ndev);
+ cfg80211_connect_result(ndev, NULL, NULL, 0, NULL, 0,
+ WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_KERNEL);
+ clear_bit(wil_status_fwconnecting, wil->status);
}
static void wil_connect_timer_fn(ulong x)
return -EAGAIN;
}
+void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps)
+{
+ if (wil->platform_ops.bus_request)
+ wil->platform_ops.bus_request(wil->platform_handle, kbps);
+}
+
/**
* wil6210_disconnect - disconnect one connection
* @wil: driver context
wil_w(wil, RGF_USER_USER_CPU_0, 1);
}
-static void wil_set_oob_mode(struct wil6210_priv *wil, bool enable)
+static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode)
{
- wil_info(wil, "enable=%d\n", enable);
- if (enable)
+ wil_info(wil, "oob_mode to %d\n", mode);
+ switch (mode) {
+ case 0:
+ wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE |
+ BIT_USER_OOB_R2_MODE);
+ break;
+ case 1:
+ wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
- else
+ break;
+ case 2:
wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
+ wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
+ break;
+ default:
+ wil_err(wil, "invalid oob_mode: %d\n", mode);
+ }
}
static int wil_target_reset(struct wil6210_priv *wil)
napi_enable(&wil->napi_tx);
set_bit(wil_status_napi_en, wil->status);
- if (wil->platform_ops.bus_request)
- wil->platform_ops.bus_request(wil->platform_handle,
- WIL_MAX_BUS_REQUEST_KBPS);
+ wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
return 0;
}
set_bit(wil_status_resetting, wil->status);
- if (wil->platform_ops.bus_request)
- wil->platform_ops.bus_request(wil->platform_handle, 0);
+ wil6210_bus_request(wil, 0);
wil_disable_irq(wil);
if (test_and_clear_bit(wil_status_napi_en, wil->status)) {
wil->halp.ref_cnt);
if (++wil->halp.ref_cnt == 1) {
+ reinit_completion(&wil->halp.comp);
wil6210_set_halp(wil);
rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies);
if (!rc) {
dev_err(dev, "wil_if_alloc failed: %d\n", rc);
return rc;
}
+
wil->pdev = pdev;
pci_set_drvdata(pdev, wil);
/* rollback to if_free */
}
/* rollback to err_plat */
+ /* device supports 48bit addresses */
+ rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));
+ if (rc) {
+ dev_err(dev, "dma_set_mask_and_coherent(48) failed: %d\n", rc);
+ rc = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
+ if (rc) {
+ dev_err(dev,
+ "dma_set_mask_and_coherent(32) failed: %d\n",
+ rc);
+ goto err_plat;
+ }
+ } else {
+ wil->use_extended_dma_addr = 1;
+ }
+
rc = pci_enable_device(pdev);
if (rc) {
wil_err(wil,
/* Allocate pring buffer and descriptors.
* vring->va should be aligned on its size rounded up to power of 2
- * This is granted by the dma_alloc_coherent
+ * This is granted by the dma_alloc_coherent.
+ *
+ * HW has limitation that all vrings addresses must share the same
+ * upper 16 msb bits part of 48 bits address. To workaround that,
+ * if we are using 48 bit addresses switch to 32 bit allocation
+ * before allocating vring memory.
+ *
+ * There's no check for the return value of dma_set_mask_and_coherent,
+ * since we assume if we were able to set the mask during
+ * initialization in this system it will not fail if we set it again
*/
+ if (wil->use_extended_dma_addr)
+ dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
+
pmc->pring_va = dma_alloc_coherent(dev,
sizeof(struct vring_tx_desc) * num_descriptors,
&pmc->pring_pa,
GFP_KERNEL);
+ if (wil->use_extended_dma_addr)
+ dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));
+
wil_dbg_misc(wil,
"pmc_alloc: allocated pring %p => %pad. %zd x %d = total %zd bytes\n",
pmc->pring_va, &pmc->pring_pa,
vring->va = NULL;
return -ENOMEM;
}
+
/* vring->va should be aligned on its size rounded up to power of 2
- * This is granted by the dma_alloc_coherent
+ * This is granted by the dma_alloc_coherent.
+ *
+ * HW has limitation that all vrings addresses must share the same
+ * upper 16 msb bits part of 48 bits address. To workaround that,
+ * if we are using 48 bit addresses switch to 32 bit allocation
+ * before allocating vring memory.
+ *
+ * There's no check for the return value of dma_set_mask_and_coherent,
+ * since we assume if we were able to set the mask during
+ * initialization in this system it will not fail if we set it again
*/
+ if (wil->use_extended_dma_addr)
+ dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
+
vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL);
if (!vring->va) {
kfree(vring->ctx);
vring->ctx = NULL;
return -ENOMEM;
}
+
+ if (wil->use_extended_dma_addr)
+ dma_set_mask_and_coherent(dev, DMA_BIT_MASK(48));
+
/* initially, all descriptors are SW owned
* For Tx and Rx, ownership bit is at the same location, thus
* we can use any
/*
- * Copyright (c) 2012-2016 Qualcomm Atheros, Inc.
+ * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
#define WIL_FW_NAME_SPARROW_PLUS "wil6210_sparrow_plus.fw" /* code Sparrow D0 */
#define WIL_BOARD_FILE_NAME "wil6210.brd" /* board & radio parameters */
+#define WIL_DEFAULT_BUS_REQUEST_KBPS 128000 /* ~1Gbps */
#define WIL_MAX_BUS_REQUEST_KBPS 800000 /* ~6.1Gbps */
/**
#define RGF_USER_USAGE_1 (0x880004)
#define RGF_USER_USAGE_6 (0x880018)
#define BIT_USER_OOB_MODE BIT(31)
+ #define BIT_USER_OOB_R2_MODE BIT(30)
#define RGF_USER_HW_MACHINE_STATE (0x8801dc)
#define HW_MACHINE_BOOT_DONE (0x3fffffd)
#define RGF_USER_USER_CPU_0 (0x8801e0)
u16 channel; /* relevant in AP mode */
int sinfo_gen;
u32 ap_isolate; /* no intra-BSS communication */
+ struct cfg80211_bss *bss; /* connected bss, relevant in STA mode */
+ int locally_generated_disc; /* relevant in STA mode */
/* interrupt moderation */
u32 tx_max_burst_duration;
u32 tx_interframe_timeout;
u8 vring2cid_tid[WIL6210_MAX_TX_RINGS][2]; /* [0] - CID, [1] - TID */
struct wil_sta_info sta[WIL6210_MAX_CID];
int bcast_vring;
+ bool use_extended_dma_addr; /* indicates whether we are using 48 bits */
/* scan */
struct cfg80211_scan_request *scan_request;
print_hex_dump_debug("DBG[ WMI]" prefix_str,\
prefix_type, rowsize, \
groupsize, buf, len, ascii)
+
+#define wil_hex_dump_misc(prefix_str, prefix_type, rowsize, \
+ groupsize, buf, len, ascii) \
+ print_hex_dump_debug("DBG[MISC]" prefix_str,\
+ prefix_type, rowsize, \
+ groupsize, buf, len, ascii)
#else /* defined(CONFIG_DYNAMIC_DEBUG) */
static inline
void wil_hex_dump_txrx(const char *prefix_str, int prefix_type, int rowsize,
int groupsize, const void *buf, size_t len, bool ascii)
{
}
+
+static inline
+void wil_hex_dump_misc(const char *prefix_str, int prefix_type, int rowsize,
+ int groupsize, const void *buf, size_t len, bool ascii)
+{
+}
#endif /* defined(CONFIG_DYNAMIC_DEBUG) */
void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
int wmi_led_cfg(struct wil6210_priv *wil, bool enable);
int wmi_abort_scan(struct wil6210_priv *wil);
void wil_abort_scan(struct wil6210_priv *wil, bool sync);
-
+void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps);
void wil6210_disconnect(struct wil6210_priv *wil, const u8 *bssid,
u16 reason_code, bool from_event);
void wil_probe_client_flush(struct wil6210_priv *wil);
(wdev->iftype == NL80211_IFTYPE_P2P_CLIENT)) {
if (rc) {
netif_carrier_off(ndev);
+ wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
wil_err(wil, "cfg80211_connect_result with failure\n");
cfg80211_connect_result(ndev, evt->bssid, NULL, 0,
NULL, 0,
GFP_KERNEL);
goto out;
} else {
- cfg80211_connect_result(ndev, evt->bssid,
- assoc_req_ie, assoc_req_ielen,
- assoc_resp_ie, assoc_resp_ielen,
- WLAN_STATUS_SUCCESS,
- GFP_KERNEL);
+ struct wiphy *wiphy = wil_to_wiphy(wil);
+
+ cfg80211_ref_bss(wiphy, wil->bss);
+ cfg80211_connect_bss(ndev, evt->bssid, wil->bss,
+ assoc_req_ie, assoc_req_ielen,
+ assoc_resp_ie, assoc_resp_ielen,
+ WLAN_STATUS_SUCCESS, GFP_KERNEL,
+ NL80211_TIMEOUT_UNSPECIFIED);
}
+ wil->bss = NULL;
} else if ((wdev->iftype == NL80211_IFTYPE_AP) ||
(wdev->iftype == NL80211_IFTYPE_P2P_GO)) {
if (rc) {
wil_dbg_wmi(wil, "disconnect_sta: (%pM, reason %d)\n", mac, reason);
+ wil->locally_generated_disc = true;
if (del_sta) {
ether_addr_copy(del_sta_cmd.dst_mac, mac);
rc = wmi_call(wil, WMI_DEL_STA_CMDID, &del_sta_cmd,
void wmi_event_flush(struct wil6210_priv *wil)
{
+ ulong flags;
struct pending_wmi_event *evt, *t;
wil_dbg_wmi(wil, "event_flush\n");
+ spin_lock_irqsave(&wil->wmi_ev_lock, flags);
+
list_for_each_entry_safe(evt, t, &wil->pending_wmi_ev, list) {
list_del(&evt->list);
kfree(evt);
}
+
+ spin_unlock_irqrestore(&wil->wmi_ev_lock, flags);
}
static bool wmi_evt_call_handler(struct wil6210_priv *wil, int id,
} station_state;
int operating_mode, power_mode;
- time_t last_qual;
+ unsigned long last_qual;
int beacons_this_sec;
int channel;
int reg_domain, config_reg_domain;
module, the driver will be called brcmsmac.ko.
config BRCMFMAC
- tristate "Broadcom IEEE802.11n embedded FullMAC WLAN driver"
+ tristate "Broadcom FullMAC WLAN driver"
depends on CFG80211
select BRCMUTIL
---help---
- This module adds support for embedded wireless adapters based on
- Broadcom IEEE802.11n FullMAC chipsets. It has to work with at least
- one of the bus interface support. If you choose to build a module,
- it'll be called brcmfmac.ko.
+ This module adds support for wireless adapters based on Broadcom
+ FullMAC chipsets. It has to work with at least one of the bus
+ interface support. If you choose to build a module, it'll be called
+ brcmfmac.ko.
config BRCMFMAC_PROTO_BCDC
bool
return brcmf_bus_txdata(drvr->bus_if, pktbuf);
}
+void brcmf_proto_bcdc_txflowblock(struct device *dev, bool state)
+{
+ struct brcmf_bus *bus_if = dev_get_drvdata(dev);
+ struct brcmf_pub *drvr = bus_if->drvr;
+
+ brcmf_dbg(TRACE, "Enter\n");
+
+ brcmf_fws_bus_blocked(drvr, state);
+}
+
+void
+brcmf_proto_bcdc_txcomplete(struct device *dev, struct sk_buff *txp,
+ bool success)
+{
+ struct brcmf_bus *bus_if = dev_get_drvdata(dev);
+ struct brcmf_pub *drvr = bus_if->drvr;
+ struct brcmf_if *ifp;
+
+ /* await txstatus signal for firmware if active */
+ if (brcmf_fws_fc_active(drvr->fws)) {
+ if (!success)
+ brcmf_fws_bustxfail(drvr->fws, txp);
+ } else {
+ if (brcmf_proto_bcdc_hdrpull(drvr, false, txp, &ifp))
+ brcmu_pkt_buf_free_skb(txp);
+ else
+ brcmf_txfinalize(ifp, txp, success);
+ }
+}
+
static void
brcmf_proto_bcdc_configure_addr_mode(struct brcmf_pub *drvr, int ifidx,
enum proto_addr_mode addr_mode)
brcmf_fws_rxreorder(ifp, skb);
}
+static void
+brcmf_proto_bcdc_add_if(struct brcmf_if *ifp)
+{
+ brcmf_fws_add_interface(ifp);
+}
+
+static void
+brcmf_proto_bcdc_del_if(struct brcmf_if *ifp)
+{
+ brcmf_fws_del_interface(ifp);
+}
+
+static void
+brcmf_proto_bcdc_reset_if(struct brcmf_if *ifp)
+{
+ brcmf_fws_reset_interface(ifp);
+}
+
+static int
+brcmf_proto_bcdc_init_done(struct brcmf_pub *drvr)
+{
+ return brcmf_fws_init(drvr);
+}
+
int brcmf_proto_bcdc_attach(struct brcmf_pub *drvr)
{
struct brcmf_bcdc *bcdc;
drvr->proto->delete_peer = brcmf_proto_bcdc_delete_peer;
drvr->proto->add_tdls_peer = brcmf_proto_bcdc_add_tdls_peer;
drvr->proto->rxreorder = brcmf_proto_bcdc_rxreorder;
+ drvr->proto->add_if = brcmf_proto_bcdc_add_if;
+ drvr->proto->del_if = brcmf_proto_bcdc_del_if;
+ drvr->proto->reset_if = brcmf_proto_bcdc_reset_if;
+ drvr->proto->init_done = brcmf_proto_bcdc_init_done;
drvr->proto->pd = bcdc;
drvr->hdrlen += BCDC_HEADER_LEN + BRCMF_PROT_FW_SIGNAL_MAX_TXBYTES;
void brcmf_proto_bcdc_detach(struct brcmf_pub *drvr)
{
+ brcmf_fws_deinit(drvr);
kfree(drvr->proto->pd);
drvr->proto->pd = NULL;
}
#ifdef CONFIG_BRCMFMAC_PROTO_BCDC
int brcmf_proto_bcdc_attach(struct brcmf_pub *drvr);
void brcmf_proto_bcdc_detach(struct brcmf_pub *drvr);
+void brcmf_proto_bcdc_txflowblock(struct device *dev, bool state);
+void brcmf_proto_bcdc_txcomplete(struct device *dev, struct sk_buff *txp,
+ bool success);
#else
static inline int brcmf_proto_bcdc_attach(struct brcmf_pub *drvr) { return 0; }
static inline void brcmf_proto_bcdc_detach(struct brcmf_pub *drvr) {}
void brcmf_detach(struct device *dev);
/* Indication from bus module that dongle should be reset */
void brcmf_dev_reset(struct device *dev);
-/* Indication from bus module to change flow-control state */
-void brcmf_txflowblock(struct device *dev, bool state);
-
-/* Notify the bus has transferred the tx packet to firmware */
-void brcmf_txcomplete(struct device *dev, struct sk_buff *txp, bool success);
/* Configure the "global" bus state used by upper layers */
void brcmf_bus_change_state(struct brcmf_bus *bus, enum brcmf_bus_state state);
status = e->status;
+ if (status == BRCMF_E_STATUS_ABORT)
+ goto exit;
+
if (!test_bit(BRCMF_SCAN_STATUS_BUSY, &cfg->scan_status)) {
brcmf_err("scan not ready, bsscfgidx=%d\n", ifp->bsscfgidx);
return -EPERM;
BIT(NL80211_BSS_SELECT_ATTR_BAND_PREF) |
BIT(NL80211_BSS_SELECT_ATTR_RSSI_ADJUST);
- wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT |
+ wiphy->flags |= WIPHY_FLAG_NETNS_OK |
+ WIPHY_FLAG_PS_ON_BY_DEFAULT |
WIPHY_FLAG_OFFCHAN_TX |
WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL;
if (brcmf_feat_is_enabled(ifp, BRCMF_FEAT_TDLS))
s32 err;
int i;
+ /* The country code gets set to "00" by default at boot, ignore */
+ if (req->alpha2[0] == '0' && req->alpha2[1] == '0')
+ return;
+
/* ignore non-ISO3166 country codes */
for (i = 0; i < sizeof(req->alpha2); i++)
if (req->alpha2[i] < 'A' || req->alpha2[i] > 'Z') {
strsep(&ptr, "\n");
/* Print fw version info */
- brcmf_err("Firmware version = %s\n", buf);
+ brcmf_info("Firmware version = %s\n", buf);
/* locate firmware version number for ethtool */
ptr = strrchr(buf, ' ') + 1;
#include "p2p.h"
#include "cfg80211.h"
#include "fwil.h"
-#include "fwsignal.h"
#include "feature.h"
#include "proto.h"
#include "pcie.h"
spin_unlock_irqrestore(&ifp->netif_stop_lock, flags);
}
-void brcmf_txflowblock(struct device *dev, bool state)
-{
- struct brcmf_bus *bus_if = dev_get_drvdata(dev);
- struct brcmf_pub *drvr = bus_if->drvr;
-
- brcmf_dbg(TRACE, "Enter\n");
-
- brcmf_fws_bus_blocked(drvr, state);
-}
-
void brcmf_netif_rx(struct brcmf_if *ifp, struct sk_buff *skb)
{
if (skb->pkt_type == PACKET_MULTICAST)
brcmu_pkt_buf_free_skb(txp);
}
-void brcmf_txcomplete(struct device *dev, struct sk_buff *txp, bool success)
-{
- struct brcmf_bus *bus_if = dev_get_drvdata(dev);
- struct brcmf_pub *drvr = bus_if->drvr;
- struct brcmf_if *ifp;
-
- /* await txstatus signal for firmware if active */
- if (brcmf_fws_fc_active(drvr->fws)) {
- if (!success)
- brcmf_fws_bustxfail(drvr->fws, txp);
- } else {
- if (brcmf_proto_hdrpull(drvr, false, txp, &ifp))
- brcmu_pkt_buf_free_skb(txp);
- else
- brcmf_txfinalize(ifp, txp, success);
- }
-}
-
static void brcmf_ethtool_get_drvinfo(struct net_device *ndev,
struct ethtool_drvinfo *info)
{
ndev->needed_headroom += drvr->hdrlen;
ndev->ethtool_ops = &brcmf_ethtool_ops;
- /* set the mac address */
+ /* set the mac address & netns */
memcpy(ndev->dev_addr, ifp->mac_addr, ETH_ALEN);
+ dev_net_set(ndev, wiphy_net(cfg_to_wiphy(drvr->config)));
INIT_WORK(&ifp->multicast_work, _brcmf_set_multicast_list);
INIT_WORK(&ifp->ndoffload_work, _brcmf_update_ndtable);
return;
brcmf_dbg(TRACE, "Enter, bsscfgidx=%d, ifidx=%d\n", ifp->bsscfgidx,
ifp->ifidx);
- brcmf_fws_del_interface(ifp);
+ brcmf_proto_del_if(ifp->drvr, ifp);
brcmf_del_if(ifp->drvr, ifp->bsscfgidx, rtnl_locked);
}
+static int brcmf_psm_watchdog_notify(struct brcmf_if *ifp,
+ const struct brcmf_event_msg *evtmsg,
+ void *data)
+{
+ int err;
+
+ brcmf_dbg(TRACE, "enter: bsscfgidx=%d\n", ifp->bsscfgidx);
+
+ brcmf_err("PSM's watchdog has fired!\n");
+
+ err = brcmf_debug_create_memdump(ifp->drvr->bus_if, data,
+ evtmsg->datalen);
+ if (err)
+ brcmf_err("Failed to get memory dump, %d\n", err);
+
+ return err;
+}
+
#ifdef CONFIG_INET
#define ARPOL_MAX_ENTRIES 8
static int brcmf_inetaddr_changed(struct notifier_block *nb,
goto fail;
}
+ /* Attach to events important for core code */
+ brcmf_fweh_register(drvr, BRCMF_E_PSM_WATCHDOG,
+ brcmf_psm_watchdog_notify);
+
/* attach firmware event handler */
brcmf_fweh_attach(drvr);
}
brcmf_feat_attach(drvr);
- ret = brcmf_fws_init(drvr);
+ ret = brcmf_proto_init_done(drvr);
if (ret < 0)
goto fail;
- brcmf_fws_add_interface(ifp);
+ brcmf_proto_add_if(drvr, ifp);
drvr->config = brcmf_cfg80211_attach(drvr, bus_if->dev,
drvr->settings->p2p_enable);
brcmf_cfg80211_detach(drvr->config);
drvr->config = NULL;
}
- if (drvr->fws) {
- brcmf_fws_del_interface(ifp);
- brcmf_fws_deinit(drvr);
- }
brcmf_net_detach(ifp->ndev, false);
if (p2p_ifp)
brcmf_net_detach(p2p_ifp->ndev, false);
brcmf_cfg80211_detach(drvr->config);
- brcmf_fws_deinit(drvr);
-
brcmf_bus_stop(drvr->bus_if);
brcmf_proto_detach(drvr);
static struct dentry *root_folder;
-static int brcmf_debug_create_memdump(struct brcmf_bus *bus, const void *data,
- size_t len)
+int brcmf_debug_create_memdump(struct brcmf_bus *bus, const void *data,
+ size_t len)
{
void *dump;
size_t ramsize;
return 0;
}
-static int brcmf_debug_psm_watchdog_notify(struct brcmf_if *ifp,
- const struct brcmf_event_msg *evtmsg,
- void *data)
-{
- int err;
-
- brcmf_dbg(TRACE, "enter: bsscfgidx=%d\n", ifp->bsscfgidx);
-
- brcmf_err("PSM's watchdog has fired!\n");
-
- err = brcmf_debug_create_memdump(ifp->drvr->bus_if, data,
- evtmsg->datalen);
- if (err)
- brcmf_err("Failed to get memory dump, %d\n", err);
-
- return err;
-}
-
void brcmf_debugfs_init(void)
{
root_folder = debugfs_create_dir(KBUILD_MODNAME, NULL);
if (IS_ERR(drvr->dbgfs_dir))
return PTR_ERR(drvr->dbgfs_dir);
-
- return brcmf_fweh_register(drvr, BRCMF_E_PSM_WATCHDOG,
- brcmf_debug_psm_watchdog_notify);
+ return 0;
}
void brcmf_debug_detach(struct brcmf_pub *drvr)
} while (0)
#if defined(DEBUG) || defined(CONFIG_BRCM_TRACING)
+
+/* For debug/tracing purposes treat info messages as errors */
+#define brcmf_info brcmf_err
+
__printf(3, 4)
void __brcmf_dbg(u32 level, const char *func, const char *fmt, ...);
#define brcmf_dbg(level, fmt, ...) \
#else /* defined(DEBUG) || defined(CONFIG_BRCM_TRACING) */
+#define brcmf_info(fmt, ...) \
+ do { \
+ pr_info("%s: " fmt, __func__, ##__VA_ARGS__); \
+ } while (0)
+
#define brcmf_dbg(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__)
#define BRCMF_DATA_ON() 0
extern int brcmf_msg_level;
+struct brcmf_bus;
struct brcmf_pub;
#ifdef DEBUG
void brcmf_debugfs_init(void);
struct dentry *brcmf_debugfs_get_devdir(struct brcmf_pub *drvr);
int brcmf_debugfs_add_entry(struct brcmf_pub *drvr, const char *fn,
int (*read_fn)(struct seq_file *seq, void *data));
+int brcmf_debug_create_memdump(struct brcmf_bus *bus, const void *data,
+ size_t len);
#else
static inline void brcmf_debugfs_init(void)
{
{
return 0;
}
+static inline
+int brcmf_debug_create_memdump(struct brcmf_bus *bus, const void *data,
+ size_t len)
+{
+ return 0;
+}
#endif
#endif /* BRCMFMAC_DEBUG_H */
#include "core.h"
#include "debug.h"
#include "tracepoint.h"
-#include "fwsignal.h"
#include "fweh.h"
#include "fwil.h"
+#include "proto.h"
/**
* struct brcmf_fweh_queue_item - event item on event queue.
if (IS_ERR(ifp))
return;
if (!is_p2pdev)
- brcmf_fws_add_interface(ifp);
+ brcmf_proto_add_if(drvr, ifp);
if (!drvr->fweh.evt_handler[BRCMF_E_IF])
if (brcmf_net_attach(ifp, false) < 0)
return;
}
if (ifp && ifevent->action == BRCMF_E_IF_CHANGE)
- brcmf_fws_reset_interface(ifp);
+ brcmf_proto_reset_if(drvr, ifp);
err = brcmf_fweh_call_event_handler(ifp, emsg->event_code, emsg, data);
BRCMF_PCIE_MBDATA_TIMEOUT);
if (!devinfo->mbdata_completed) {
brcmf_err("Timeout on response for entering D3 substate\n");
+ brcmf_bus_change_state(bus, BRCMF_BUS_UP);
return -EIO;
}
int brcmf_pno_start_sched_scan(struct brcmf_if *ifp,
struct cfg80211_sched_scan_request *req)
{
- struct brcmu_d11inf *d11inf;
struct brcmf_pno_config_le pno_cfg;
struct cfg80211_ssid *ssid;
u16 chan;
}
/* configure channels to use */
- d11inf = &ifp->drvr->config->d11inf;
for (i = 0; i < req->n_channels; i++) {
chan = req->channels[i]->hw_value;
pno_cfg.channel_list[i] = cpu_to_le16(chan);
void (*add_tdls_peer)(struct brcmf_pub *drvr, int ifidx,
u8 peer[ETH_ALEN]);
void (*rxreorder)(struct brcmf_if *ifp, struct sk_buff *skb);
+ void (*add_if)(struct brcmf_if *ifp);
+ void (*del_if)(struct brcmf_if *ifp);
+ void (*reset_if)(struct brcmf_if *ifp);
+ int (*init_done)(struct brcmf_pub *drvr);
void *pd;
};
ifp->drvr->proto->rxreorder(ifp, skb);
}
+static inline void
+brcmf_proto_add_if(struct brcmf_pub *drvr, struct brcmf_if *ifp)
+{
+ if (!drvr->proto->add_if)
+ return;
+ drvr->proto->add_if(ifp);
+}
+
+static inline void
+brcmf_proto_del_if(struct brcmf_pub *drvr, struct brcmf_if *ifp)
+{
+ if (!drvr->proto->del_if)
+ return;
+ drvr->proto->del_if(ifp);
+}
+
+static inline void
+brcmf_proto_reset_if(struct brcmf_pub *drvr, struct brcmf_if *ifp)
+{
+ if (!drvr->proto->reset_if)
+ return;
+ drvr->proto->reset_if(ifp);
+}
+
+static inline int
+brcmf_proto_init_done(struct brcmf_pub *drvr)
+{
+ if (!drvr->proto->init_done)
+ return 0;
+ return drvr->proto->init_done(drvr);
+}
+
#endif /* BRCMFMAC_PROTO_H */
#include "firmware.h"
#include "core.h"
#include "common.h"
+#include "bcdc.h"
#define DCMD_RESP_TIMEOUT msecs_to_jiffies(2500)
#define CTL_DONE_TIMEOUT msecs_to_jiffies(2500)
bus->tx_seq = (bus->tx_seq + pktq->qlen) % SDPCM_SEQ_WRAP;
skb_queue_walk_safe(pktq, pkt_next, tmp) {
__skb_unlink(pkt_next, pktq);
- brcmf_txcomplete(bus->sdiodev->dev, pkt_next, ret == 0);
+ brcmf_proto_bcdc_txcomplete(bus->sdiodev->dev, pkt_next,
+ ret == 0);
}
return ret;
}
if ((bus->sdiodev->state == BRCMF_SDIOD_DATA) &&
bus->txoff && (pktq_len(&bus->txq) < TXLOW)) {
bus->txoff = false;
- brcmf_txflowblock(bus->sdiodev->dev, false);
+ brcmf_proto_bcdc_txflowblock(bus->sdiodev->dev, false);
}
return cnt;
if (pktq_len(&bus->txq) >= TXHI) {
bus->txoff = true;
- brcmf_txflowblock(dev, true);
+ brcmf_proto_bcdc_txflowblock(dev, true);
}
spin_unlock_bh(&bus->txq_lock);
#include "usb.h"
#include "core.h"
#include "common.h"
+#include "bcdc.h"
#define IOCTL_RESP_TIMEOUT msecs_to_jiffies(2000)
req->skb);
brcmf_usb_del_fromq(devinfo, req);
- brcmf_txcomplete(devinfo->dev, req->skb, urb->status == 0);
+ brcmf_proto_bcdc_txcomplete(devinfo->dev, req->skb, urb->status == 0);
req->skb = NULL;
brcmf_usb_enq(devinfo, &devinfo->tx_freeq, req, &devinfo->tx_freecount);
spin_lock_irqsave(&devinfo->tx_flowblock_lock, flags);
if (devinfo->tx_freecount > devinfo->tx_high_watermark &&
devinfo->tx_flowblock) {
- brcmf_txflowblock(devinfo->dev, false);
+ brcmf_proto_bcdc_txflowblock(devinfo->dev, false);
devinfo->tx_flowblock = false;
}
spin_unlock_irqrestore(&devinfo->tx_flowblock_lock, flags);
spin_lock_irqsave(&devinfo->tx_flowblock_lock, flags);
if (devinfo->tx_freecount < devinfo->tx_low_watermark &&
!devinfo->tx_flowblock) {
- brcmf_txflowblock(dev, true);
+ brcmf_proto_bcdc_txflowblock(dev, true);
devinfo->tx_flowblock = true;
}
spin_unlock_irqrestore(&devinfo->tx_flowblock_lock, flags);
fw_img = &fw->data[le32_to_cpu(fw->boot_size) +
le32_to_cpu(fw->ucode_size)];
- if (rc < 0)
- goto error;
-
if (!priv->rxq)
priv->rxq = ipw_rx_queue_alloc(priv);
else
cmd->command = cpu_to_le16(HostCmd_CMD_CHAN_REPORT_REQUEST);
cmd->size = cpu_to_le16(S_DS_GEN);
- le16_add_cpu(&cmd->size, sizeof(struct host_cmd_ds_chan_rpt_req));
+ le16_unaligned_add_cpu(&cmd->size,
+ sizeof(struct host_cmd_ds_chan_rpt_req));
cr_req->chan_desc.start_freq = cpu_to_le16(MWIFIEX_A_BAND_START_FREQ);
cr_req->chan_desc.chan_num = radar_params->chandef->chan->hw_value;
return 0;
}
+static void mwifiex_reg_apply_radar_flags(struct wiphy *wiphy)
+{
+ struct ieee80211_supported_band *sband;
+ struct ieee80211_channel *chan;
+ unsigned int i;
+
+ if (!wiphy->bands[NL80211_BAND_5GHZ])
+ return;
+ sband = wiphy->bands[NL80211_BAND_5GHZ];
+
+ for (i = 0; i < sband->n_channels; i++) {
+ chan = &sband->channels[i];
+ if ((!(chan->flags & IEEE80211_CHAN_DISABLED)) &&
+ (chan->flags & IEEE80211_CHAN_RADAR))
+ chan->flags |= IEEE80211_CHAN_NO_IR;
+ }
+}
+
/*
* CFG802.11 regulatory domain callback function.
*
mwifiex_dbg(adapter, INFO,
"info: cfg80211 regulatory domain callback for %c%c\n",
request->alpha2[0], request->alpha2[1]);
+ mwifiex_reg_apply_radar_flags(wiphy);
switch (request->initiator) {
case NL80211_REGDOM_SET_BY_DRIVER:
mwifiex_dbg(adapter, CMD,
"cmd: DNLD_CMD: %#x, act %#x, len %d, seqno %#x\n",
cmd_code,
- le16_to_cpu(*(__le16 *)((u8 *)host_cmd + S_DS_GEN)),
+ get_unaligned_le16((u8 *)host_cmd + S_DS_GEN),
cmd_size, le16_to_cpu(host_cmd->seq_num));
mwifiex_dbg_dump(adapter, CMD_D, "cmd buffer:", host_cmd, cmd_size);
(adapter->dbg.last_cmd_index + 1) % DBG_CMD_NUM;
adapter->dbg.last_cmd_id[adapter->dbg.last_cmd_index] = cmd_code;
adapter->dbg.last_cmd_act[adapter->dbg.last_cmd_index] =
- le16_to_cpu(*(__le16 *) ((u8 *) host_cmd + S_DS_GEN));
+ get_unaligned_le16((u8 *)host_cmd + S_DS_GEN);
/* Clear BSS_NO_BITS from HostCmd */
cmd_code &= HostCmd_CMD_ID_MASK;
u8 llc_ctrl;
u8 snap_oui[3];
__be16 snap_type;
-};
+} __packed;
struct rx_packet_hdr {
struct ethhdr eth803_hdr;
struct rfc_1042_hdr rfc1042_hdr;
-};
+} __packed;
struct tx_packet_hdr {
struct ethhdr eth803_hdr;
struct rfc_1042_hdr rfc1042_hdr;
-};
+} __packed;
#define B_SUPPORTED_RATES 5
#define G_SUPPORTED_RATES 9
u8 reserved1[2];
u8 tx_token_id;
u8 reserved[2];
-};
+} __packed;
struct uap_rxpd {
u8 bss_type;
u8 ht_info;
u8 reserved[3];
u8 flags;
-};
+} __packed;
struct mwifiex_fw_chan_stats {
u8 chan_num;
__le16 adhoc_wake_period;
__le16 mode;
__le16 delay_to_ps;
-};
+} __packed;
#define HS_DEF_WAKE_INTERVAL 100
#define HS_DEF_INACTIVITY_TIMEOUT 50
struct mwifiex_ie_types_header header;
__le32 hs_wake_int;
__le32 hs_inact_timeout;
-};
+} __packed;
#define BITMAP_AUTO_DS 0x01
#define BITMAP_STA_PS 0x10
__le16 nbcn;
__le16 reserved[9];
long long reserved_1;
-};
+} __packed;
struct host_cmd_ds_802_11_rssi_info_rsp {
__le16 action;
__le16 bcn_rssi_avg;
__le16 bcn_nf_avg;
long long tsf_bcn;
-};
+} __packed;
struct host_cmd_ds_802_11_mac_address {
__le16 action;
u8 mac_addr[ETH_ALEN];
-};
+} __packed;
struct host_cmd_ds_mac_control {
__le32 action;
__le32 wep_icv_err_cnt[4];
__le32 bcn_rcv_cnt;
__le32 bcn_miss_cnt;
-};
+} __packed;
/* Enumeration for rate format */
enum _mwifiex_rate_format {
__le16 tx_ant_mode;
__le16 action_rx;
__le16 rx_ant_mode;
-};
+} __packed;
struct host_cmd_ds_rf_ant_siso {
__le16 action;
__le16 ant_mode;
-};
+} __packed;
struct host_cmd_ds_tdls_oper {
__le16 tdls_action;
struct mwifiex_tdls_config {
__le16 enable;
-};
+} __packed;
struct mwifiex_tdls_config_cs_params {
u8 unit_time;
u8 thr_otherlink;
u8 thr_directlink;
-};
+} __packed;
struct mwifiex_tdls_init_cs_params {
u8 peer_mac[ETH_ALEN];
struct mwifiex_tdls_stop_cs_params {
u8 peer_mac[ETH_ALEN];
-};
+} __packed;
struct host_cmd_ds_tdls_config {
__le16 tdls_action;
struct mwifiex_ie_types_wmm_param_set {
struct mwifiex_ie_types_header header;
u8 wmm_ie[1];
-};
+} __packed;
struct mwifiex_ie_types_mgmt_frame {
struct mwifiex_ie_types_header header;
__le16 reserved;
__le32 addr;
__le32 value;
-};
+} __packed;
struct mwifiex_ie_types_qos_info {
struct mwifiex_ie_types_header header;
sizeof(struct mwifiex_ie));
}
- le16_add_cpu(&ie_list->len,
- le16_to_cpu(priv->mgmt_ie[index].ie_length) +
- MWIFIEX_IE_HDR_SIZE);
+ le16_unaligned_add_cpu(&ie_list->len,
+ le16_to_cpu(
+ priv->mgmt_ie[index].ie_length) +
+ MWIFIEX_IE_HDR_SIZE);
input_len -= tlv_len + MWIFIEX_IE_HDR_SIZE;
}
le16_to_cpu(beacon_ie->ie_length);
memcpy(pos, beacon_ie, len);
pos += len;
- le16_add_cpu(&ap_custom_ie->len, len);
+ le16_unaligned_add_cpu(&ap_custom_ie->len, len);
}
if (pr_ie) {
len = sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE +
le16_to_cpu(pr_ie->ie_length);
memcpy(pos, pr_ie, len);
pos += len;
- le16_add_cpu(&ap_custom_ie->len, len);
+ le16_unaligned_add_cpu(&ap_custom_ie->len, len);
}
if (ar_ie) {
len = sizeof(struct mwifiex_ie) - IEEE_MAX_IE_SIZE +
le16_to_cpu(ar_ie->ie_length);
memcpy(pos, ar_ie, len);
pos += len;
- le16_add_cpu(&ap_custom_ie->len, len);
+ le16_unaligned_add_cpu(&ap_custom_ie->len, len);
}
ret = mwifiex_update_autoindex_ies(priv, ap_custom_ie);
vs_ie = (struct ieee_types_header *)vendor_ie;
memcpy(ie->ie_buffer + le16_to_cpu(ie->ie_length),
vs_ie, vs_ie->len + 2);
- le16_add_cpu(&ie->ie_length, vs_ie->len + 2);
+ le16_unaligned_add_cpu(&ie->ie_length, vs_ie->len + 2);
ie->mgmt_subtype_mask = cpu_to_le16(mask);
ie->ie_index = cpu_to_le16(MWIFIEX_AUTO_IDX_MASK);
}
#define MWIFIEX_TDLS_DEF_QOS_CAPAB 0xf
#define MWIFIEX_PRIO_BK 2
#define MWIFIEX_PRIO_VI 5
+#define MWIFIEX_SUPPORTED_CHANNELS 2
+#define MWIFIEX_OPERATING_CLASSES 16
struct mwifiex_uap_bss_param {
u8 channel;
* this warranty disclaimer.
*/
+#include <linux/suspend.h>
+
#include "main.h"
#include "wmm.h"
#include "cfg80211.h"
* - Download the correct firmware to card
* - Issue the init commands to firmware
*/
-static void mwifiex_fw_dpc(const struct firmware *firmware, void *context)
+static int _mwifiex_fw_dpc(const struct firmware *firmware, void *context)
{
int ret;
char fmt[64];
mwifiex_free_adapter(adapter);
/* Tell all current and future waiters we're finished */
complete_all(fw_done);
- return;
+
+ return init_failed ? -EIO : 0;
+}
+
+static void mwifiex_fw_dpc(const struct firmware *firmware, void *context)
+{
+ _mwifiex_fw_dpc(firmware, context);
}
/*
- * This function initializes the hardware and gets firmware.
+ * This function gets the firmware and (if called asynchronously) kicks off the
+ * HW init when done.
*/
static int mwifiex_init_hw_fw(struct mwifiex_adapter *adapter,
bool req_fw_nowait)
ret = request_firmware_nowait(THIS_MODULE, 1, adapter->fw_name,
adapter->dev, GFP_KERNEL, adapter,
mwifiex_fw_dpc);
- if (ret < 0)
- mwifiex_dbg(adapter, ERROR,
- "request_firmware_nowait error %d\n", ret);
} else {
ret = request_firmware(&adapter->firmware,
adapter->fw_name,
adapter->dev);
- if (ret < 0)
- mwifiex_dbg(adapter, ERROR,
- "request_firmware error %d\n", ret);
- else
- mwifiex_fw_dpc(adapter->firmware, (void *)adapter);
}
+ if (ret < 0)
+ mwifiex_dbg(adapter, ERROR, "request_firmware%s error %d\n",
+ req_fw_nowait ? "_nowait" : "", ret);
return ret;
}
int
mwifiex_reinit_sw(struct mwifiex_adapter *adapter)
{
+ int ret;
+
mwifiex_init_lock_list(adapter);
if (adapter->if_ops.up_dev)
adapter->if_ops.up_dev(adapter);
"%s: firmware init failed\n", __func__);
goto err_init_fw;
}
+
+ /* _mwifiex_fw_dpc() does its own cleanup */
+ ret = _mwifiex_fw_dpc(adapter->firmware, adapter);
+ if (ret) {
+ pr_err("Failed to bring up adapter: %d\n", ret);
+ return ret;
+ }
mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
- complete_all(adapter->fw_done);
return 0;
err_init_fw:
/* Notify PM core we are wakeup source */
pm_wakeup_event(adapter->dev, 0);
+ pm_system_wakeup();
return IRQ_HANDLED;
}
*/
static inline bool mwifiex_is_skb_mgmt_frame(struct sk_buff *skb)
{
- return (le32_to_cpu(*(__le32 *)skb->data) == PKT_TYPE_MGMT);
+ return (get_unaligned_le32(skb->data) == PKT_TYPE_MGMT);
}
/* This function retrieves channel closed for operation by Channel
*/
static bool mwifiex_pcie_ok_to_access_hw(struct mwifiex_adapter *adapter)
{
- u32 *cookie_addr;
+ u32 cookie_value;
struct pcie_service_card *card = adapter->card;
const struct mwifiex_pcie_card_reg *reg = card->pcie.reg;
return true;
if (card->sleep_cookie_vbase) {
- cookie_addr = (u32 *)card->sleep_cookie_vbase;
+ cookie_value = get_unaligned_le32(card->sleep_cookie_vbase);
mwifiex_dbg(adapter, INFO,
"info: ACCESS_HW: sleep cookie=0x%x\n",
- *cookie_addr);
- if (*cookie_addr == FW_AWAKE_COOKIE)
+ cookie_value);
+ if (cookie_value == FW_AWAKE_COOKIE)
return true;
}
if (!adapter || !adapter->priv_num)
return;
- cancel_work_sync(&card->work);
-
reg = card->pcie.reg;
if (reg)
ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
static void mwifiex_pcie_reset_notify(struct pci_dev *pdev, bool prepare)
{
- struct mwifiex_adapter *adapter;
- struct pcie_service_card *card;
-
- if (!pdev) {
- pr_err("%s: PCIe device is not specified\n", __func__);
- return;
- }
+ struct pcie_service_card *card = pci_get_drvdata(pdev);
+ struct mwifiex_adapter *adapter = card->adapter;
+ int ret;
- card = (struct pcie_service_card *)pci_get_drvdata(pdev);
- if (!card || !card->adapter) {
- pr_err("%s: Card or adapter structure is not valid (%ld)\n",
- __func__, (long)card);
+ if (!adapter) {
+ dev_err(&pdev->dev, "%s: adapter structure is not valid\n",
+ __func__);
return;
}
- adapter = card->adapter;
mwifiex_dbg(adapter, INFO,
"%s: vendor=0x%4.04x device=0x%4.04x rev=%d %s\n",
__func__, pdev->vendor, pdev->device,
* and firmware including firmware redownload
*/
adapter->surprise_removed = false;
- mwifiex_reinit_sw(adapter);
+ ret = mwifiex_reinit_sw(adapter);
+ if (ret) {
+ dev_err(&pdev->dev, "reinit failed: %d\n", ret);
+ return;
+ }
}
mwifiex_dbg(adapter, INFO, "%s, successful\n", __func__);
}
sizeof(sleep_cookie),
PCI_DMA_FROMDEVICE);
buffer = cmdrsp->data;
- sleep_cookie = READ_ONCE(*(u32 *)buffer);
+ sleep_cookie = get_unaligned_le32(buffer);
if (sleep_cookie == MWIFIEX_DEF_SLEEP_COOKIE) {
mwifiex_dbg(adapter, INFO,
static int mwifiex_pcie_alloc_sleep_cookie_buf(struct mwifiex_adapter *adapter)
{
struct pcie_service_card *card = adapter->card;
+ u32 tmp;
card->sleep_cookie_vbase = pci_alloc_consistent(card->dev, sizeof(u32),
&card->sleep_cookie_pbase);
return -ENOMEM;
}
/* Init val of Sleep Cookie */
- *(u32 *)card->sleep_cookie_vbase = FW_AWAKE_COOKIE;
+ tmp = FW_AWAKE_COOKIE;
+ put_unaligned(tmp, card->sleep_cookie_vbase);
mwifiex_dbg(adapter, INFO,
"alloc_scook: sleep cookie=0x%x\n",
- *((u32 *)card->sleep_cookie_vbase));
+ get_unaligned(card->sleep_cookie_vbase));
return 0;
}
dma_addr_t buf_pa;
struct mwifiex_pcie_buf_desc *desc = NULL;
struct mwifiex_pfu_buf_desc *desc2 = NULL;
- __le16 *tmp;
if (!(skb->data && skb->len)) {
mwifiex_dbg(adapter, ERROR,
adapter->data_sent = true;
payload = skb->data;
- tmp = (__le16 *)&payload[0];
- *tmp = cpu_to_le16((u16)skb->len);
- tmp = (__le16 *)&payload[2];
- *tmp = cpu_to_le16(MWIFIEX_TYPE_DATA);
+ put_unaligned_le16((u16)skb->len, payload + 0);
+ put_unaligned_le16(MWIFIEX_TYPE_DATA, payload + 2);
if (mwifiex_map_pci_memory(adapter, skb, skb->len,
PCI_DMA_TODEVICE))
(card->rxbd_rdptr & reg->rx_rollover_ind))) {
struct sk_buff *skb_data;
u16 rx_len;
- __le16 pkt_len;
rd_index = card->rxbd_rdptr & reg->rx_mask;
skb_data = card->rx_buf_list[rd_index];
/* Get data length from interface header -
* first 2 bytes for len, next 2 bytes is for type
*/
- pkt_len = *((__le16 *)skb_data->data);
- rx_len = le16_to_cpu(pkt_len);
+ rx_len = get_unaligned_le16(skb_data->data);
if (WARN_ON(rx_len <= INTF_HEADER_LEN ||
rx_len > MWIFIEX_RX_DATA_BUF_SIZE)) {
mwifiex_dbg(adapter, ERROR,
adapter->cmd_sent = true;
- *(__le16 *)&payload[0] = cpu_to_le16((u16)skb->len);
- *(__le16 *)&payload[2] = cpu_to_le16(MWIFIEX_TYPE_CMD);
+ put_unaligned_le16((u16)skb->len, &payload[0]);
+ put_unaligned_le16(MWIFIEX_TYPE_CMD, &payload[2]);
if (mwifiex_map_pci_memory(adapter, skb, skb->len, PCI_DMA_TODEVICE))
return -1;
struct sk_buff *skb = card->cmdrsp_buf;
int count = 0;
u16 rx_len;
- __le16 pkt_len;
mwifiex_dbg(adapter, CMD,
"info: Rx CMD Response\n");
card->cmd_buf = NULL;
}
- pkt_len = *((__le16 *)skb->data);
- rx_len = le16_to_cpu(pkt_len);
+ rx_len = get_unaligned_le16(skb->data);
skb_put(skb, MWIFIEX_UPLD_SIZE - skb->len);
skb_trim(skb, rx_len);
desc = card->evtbd_ring[rdptr];
memset(desc, 0, sizeof(*desc));
- event = *(u32 *) &skb_cmd->data[INTF_HEADER_LEN];
+ event = get_unaligned_le32(&skb_cmd->data[INTF_HEADER_LEN]);
adapter->event_cause = event;
/* The first 4bytes will be the event transfer header
len is 2 bytes followed by type which is 2 bytes */
int ret;
u32 fw_status;
+ cancel_work_sync(&card->work);
+
ret = mwifiex_read_reg(adapter, reg->fw_status, &fw_status);
if (fw_status == FIRMWARE_READY_PCIE) {
mwifiex_dbg(adapter, INFO,
/* Increment the TLV header length by the size
appended */
- le16_add_cpu(&chan_tlv_out->header.len,
- sizeof(chan_tlv_out->chan_scan_param));
+ le16_unaligned_add_cpu(&chan_tlv_out->header.len,
+ sizeof(
+ chan_tlv_out->chan_scan_param));
/*
* The tlv buffer length is set to the number of bytes
*scan_current_only = false;
if (user_scan_in) {
+ u8 tmpaddr[ETH_ALEN];
/* Default the ssid_filter flag to TRUE, set false under
certain wildcard conditions and qualified by the existence
user_scan_in->specific_bssid,
sizeof(scan_cfg_out->specific_bssid));
+ memcpy(tmpaddr, scan_cfg_out->specific_bssid, ETH_ALEN);
+
if (adapter->ext_scan &&
- !is_zero_ether_addr(scan_cfg_out->specific_bssid)) {
+ !is_zero_ether_addr(tmpaddr)) {
bssid_tlv =
(struct mwifiex_ie_types_bssid_list *)tlv_pos;
bssid_tlv->header.type = cpu_to_le16(TLV_TYPE_BSSID);
* truncate scan results. That is not an issue with an SSID
* or BSSID filter applied to the scan results in the firmware.
*/
+ memcpy(tmpaddr, scan_cfg_out->specific_bssid, ETH_ALEN);
if ((i && ssid_filter) ||
- !is_zero_ether_addr(scan_cfg_out->specific_bssid))
+ !is_zero_ether_addr(tmpaddr))
*filtered_scan = true;
if (user_scan_in->scan_chan_gap) {
* If a specific BSSID or SSID is used, the number of channels in the
* scan command will be increased to the absolute maximum.
*/
- if (*filtered_scan)
+ if (*filtered_scan) {
*max_chan_per_scan = MWIFIEX_MAX_CHANNELS_PER_SPECIFIC_SCAN;
- else
- *max_chan_per_scan = MWIFIEX_DEF_CHANNELS_PER_SCAN_CMD;
+ } else {
+ if (!priv->media_connected)
+ *max_chan_per_scan = MWIFIEX_DEF_CHANNELS_PER_SCAN_CMD;
+ else
+ *max_chan_per_scan =
+ MWIFIEX_DEF_CHANNELS_PER_SCAN_CMD / 2;
+ }
if (adapter->ext_scan) {
bss_mode = (struct mwifiex_ie_types_bss_mode *)tlv_pos;
if (*bytes_left >= sizeof(beacon_size)) {
/* Extract & convert beacon size from command buffer */
- beacon_size = le16_to_cpu(*(__le16 *)(*bss_info));
+ beacon_size = get_unaligned_le16((*bss_info));
*bytes_left -= sizeof(beacon_size);
*bss_info += sizeof(beacon_size);
}
temp_chan = chan_list_tlv->chan_scan_param + chan_idx;
/* Increment the TLV header length by size appended */
- le16_add_cpu(&chan_list_tlv->header.len,
- sizeof(chan_list_tlv->chan_scan_param));
+ le16_unaligned_add_cpu(&chan_list_tlv->header.len,
+ sizeof(
+ chan_list_tlv->chan_scan_param));
temp_chan->chan_number =
bgscan_cfg_in->chan_list[chan_idx].chan_number;
mwifiex_bgscan_create_channel_list(priv, bgscan_cfg_in,
chan_list_tlv->
chan_scan_param);
- le16_add_cpu(&chan_list_tlv->header.len,
- chan_num *
+ le16_unaligned_add_cpu(&chan_list_tlv->header.len,
+ chan_num *
sizeof(chan_list_tlv->chan_scan_param[0]));
}
/* Append vendor specific IE TLV */
mwifiex_cmd_append_vsie_tlv(priv, MWIFIEX_VSIE_MASK_BGSCAN, &tlv_pos);
- le16_add_cpu(&cmd->size, tlv_pos - bgscan_config->tlv);
+ le16_unaligned_add_cpu(&cmd->size, tlv_pos - bgscan_config->tlv);
return 0;
}
if (!adapter || !adapter->priv_num)
return;
- cancel_work_sync(&card->work);
-
mwifiex_dbg(adapter, INFO, "info: SDIO func num=%d\n", func->num);
ret = mwifiex_sdio_read_fw_status(adapter, &firmware_stat);
return -1;
}
- nb = le16_to_cpu(*(__le16 *) (buffer));
+ nb = get_unaligned_le16((buffer));
if (nb > npayload) {
mwifiex_dbg(adapter, ERROR,
"%s: invalid packet, nb=%d npayload=%d\n",
return -1;
}
- *type = le16_to_cpu(*(__le16 *) (buffer + 2));
+ *type = get_unaligned_le16((buffer + 2));
return ret;
}
__func__, blk_num, blk_size, total_pkt_len);
break;
}
- pkt_len = le16_to_cpu(*(__le16 *)(data + SDIO_HEADER_OFFSET));
+ pkt_len = get_unaligned_le16((data +
+ SDIO_HEADER_OFFSET));
if ((pkt_len + SDIO_HEADER_OFFSET) > blk_size) {
mwifiex_dbg(adapter, ERROR,
"%s: error in pkt_len,\t"
struct sk_buff *skb, u32 upld_typ)
{
u8 *cmd_buf;
- __le16 *curr_ptr = (__le16 *)skb->data;
- u16 pkt_len = le16_to_cpu(*curr_ptr);
+ u16 pkt_len;
struct mwifiex_rxinfo *rx_info;
+ pkt_len = get_unaligned_le16(skb->data);
+
if (upld_typ != MWIFIEX_TYPE_AGGR_DATA) {
skb_trim(skb, pkt_len);
skb_pull(skb, INTF_HEADER_LEN);
case MWIFIEX_TYPE_EVENT:
mwifiex_dbg(adapter, EVENT,
"info: --- Rx: Event ---\n");
- adapter->event_cause = le32_to_cpu(*(__le32 *) skb->data);
+ adapter->event_cause = get_unaligned_le32(skb->data);
if ((skb->len > 0) && (skb->len < MAX_EVENT_SIZE))
memcpy(adapter->event_body,
u32 *len_arr = card->mpa_rx.len_arr;
/* get curr PKT len & type */
- pkt_len = le16_to_cpu(*(__le16 *) &curr_ptr[0]);
- pkt_type = le16_to_cpu(*(__le16 *) &curr_ptr[2]);
+ pkt_len = get_unaligned_le16(&curr_ptr[0]);
+ pkt_type = get_unaligned_le16(&curr_ptr[2]);
/* copy pkt to deaggr buf */
skb_deaggr = mwifiex_alloc_dma_align_buf(len_arr[pind],
/* Allocate buffer and copy payload */
blk_size = MWIFIEX_SDIO_BLOCK_SIZE;
buf_block_len = (pkt_len + blk_size - 1) / blk_size;
- *(__le16 *)&payload[0] = cpu_to_le16((u16)pkt_len);
- *(__le16 *)&payload[2] = cpu_to_le16(type);
+ put_unaligned_le16((u16)pkt_len, payload + 0);
+ put_unaligned_le16((u32)type, payload + 2);
+
/*
* This is SDIO specific header
{
struct sdio_mmc_card *card = adapter->card;
+ cancel_work_sync(&card->work);
+
kfree(card->mp_regs);
kfree(card->mpa_rx.skb_arr);
kfree(card->mpa_rx.len_arr);
{
struct sdio_mmc_card *card = adapter->card;
struct sdio_func *func = card->func;
+ int ret;
mwifiex_shutdown_sw(adapter);
clear_bit(MWIFIEX_IFACE_WORK_DEVICE_DUMP, &card->work_flags);
clear_bit(MWIFIEX_IFACE_WORK_CARD_RESET, &card->work_flags);
- mwifiex_reinit_sw(adapter);
+ ret = mwifiex_reinit_sw(adapter);
+ if (ret)
+ dev_err(&func->dev, "reinit failed: %d\n", ret);
}
/* This function read/write firmware */
if (cmd_action == HostCmd_ACT_GEN_GET) {
snmp_mib->query_type = cpu_to_le16(HostCmd_ACT_GEN_GET);
snmp_mib->buf_size = cpu_to_le16(MAX_SNMP_BUF_SIZE);
- le16_add_cpu(&cmd->size, MAX_SNMP_BUF_SIZE);
+ le16_unaligned_add_cpu(&cmd->size, MAX_SNMP_BUF_SIZE);
} else if (cmd_action == HostCmd_ACT_GEN_SET) {
snmp_mib->query_type = cpu_to_le16(HostCmd_ACT_GEN_SET);
snmp_mib->buf_size = cpu_to_le16(sizeof(u16));
- *((__le16 *) (snmp_mib->value)) = cpu_to_le16(*ul_temp);
- le16_add_cpu(&cmd->size, sizeof(u16));
+ put_unaligned_le16(*ul_temp, snmp_mib->value);
+ le16_unaligned_add_cpu(&cmd->size, sizeof(u16));
}
mwifiex_dbg(priv->adapter, CMD,
"cmd: SNMP_CMD: Action=0x%x, OID=0x%x,\t"
"OIDSize=0x%x, Value=0x%x\n",
cmd_action, cmd_oid, le16_to_cpu(snmp_mib->buf_size),
- le16_to_cpu(*(__le16 *)snmp_mib->value));
+ get_unaligned_le16(snmp_mib->value));
return 0;
}
subsc_evt_cfg->bcn_l_rssi_cfg.evt_freq);
pos += sizeof(struct mwifiex_ie_types_rssi_threshold);
- le16_add_cpu(&cmd->size,
- sizeof(struct mwifiex_ie_types_rssi_threshold));
+ le16_unaligned_add_cpu(&cmd->size,
+ sizeof(
+ struct mwifiex_ie_types_rssi_threshold));
}
if (event_bitmap & BITMASK_BCN_RSSI_HIGH) {
subsc_evt_cfg->bcn_h_rssi_cfg.evt_freq);
pos += sizeof(struct mwifiex_ie_types_rssi_threshold);
- le16_add_cpu(&cmd->size,
- sizeof(struct mwifiex_ie_types_rssi_threshold));
+ le16_unaligned_add_cpu(&cmd->size,
+ sizeof(
+ struct mwifiex_ie_types_rssi_threshold));
}
return 0;
filter = &mef_entry->filter[i];
if (!filter->filt_type)
break;
- *(__le32 *)stack_ptr = cpu_to_le32((u32)filter->repeat);
+ put_unaligned_le32((u32)filter->repeat, stack_ptr);
stack_ptr += 4;
*stack_ptr = TYPE_DNUM;
stack_ptr += 1;
stack_ptr += 1;
*stack_ptr = TYPE_BYTESEQ;
stack_ptr += 1;
-
- *(__le32 *)stack_ptr = cpu_to_le32((u32)filter->offset);
+ put_unaligned_le32((u32)filter->offset, stack_ptr);
stack_ptr += 4;
*stack_ptr = TYPE_DNUM;
stack_ptr += 1;
sizeof(u8) + sizeof(u8));
/* Add the rule length to the command size*/
- le16_add_cpu(&cmd->size, le16_to_cpu(rule->header.len) +
- sizeof(struct mwifiex_ie_types_header));
+ le16_unaligned_add_cpu(&cmd->size,
+ le16_to_cpu(rule->header.len) +
+ sizeof(struct mwifiex_ie_types_header));
rule = (void *)((u8 *)rule->params + length);
}
/* Add sizeof action, num_of_rules to total command length */
- le16_add_cpu(&cmd->size, sizeof(u16) + sizeof(u16));
+ le16_unaligned_add_cpu(&cmd->size, sizeof(u16) + sizeof(u16));
return 0;
}
cmd->command = cpu_to_le16(HostCmd_CMD_TDLS_CONFIG);
cmd->size = cpu_to_le16(S_DS_GEN);
tdls_config->tdls_action = cpu_to_le16(cmd_action);
- le16_add_cpu(&cmd->size, sizeof(tdls_config->tdls_action));
+ le16_unaligned_add_cpu(&cmd->size, sizeof(tdls_config->tdls_action));
switch (cmd_action) {
case ACT_TDLS_CS_ENABLE_CONFIG:
return -ENOTSUPP;
}
- le16_add_cpu(&cmd->size, len);
+ le16_unaligned_add_cpu(&cmd->size, len);
return 0;
}
cmd->command = cpu_to_le16(HostCmd_CMD_TDLS_OPER);
cmd->size = cpu_to_le16(S_DS_GEN);
- le16_add_cpu(&cmd->size, sizeof(struct host_cmd_ds_tdls_oper));
+ le16_unaligned_add_cpu(&cmd->size,
+ sizeof(struct host_cmd_ds_tdls_oper));
tdls_oper->reason = 0;
memcpy(tdls_oper->peer_mac, oper->peer_mac, ETH_ALEN);
return -ENODATA;
}
- *(__le16 *)pos = cpu_to_le16(params->capability);
+ put_unaligned_le16(params->capability, pos);
config_len += sizeof(params->capability);
qos_info = params->uapsd_queues | (params->max_sp << 5);
return -ENOTSUPP;
}
- le16_add_cpu(&cmd->size, config_len);
+ le16_unaligned_add_cpu(&cmd->size, config_len);
return 0;
}
case HostCmd_CMD_VERSION_EXT:
cmd_ptr->command = cpu_to_le16(cmd_no);
cmd_ptr->params.verext.version_str_sel =
- (u8) (*((u32 *) data_buf));
+ (u8)(get_unaligned((u32 *)data_buf));
memcpy(&cmd_ptr->params, data_buf,
sizeof(struct host_cmd_ds_version_ext));
cmd_ptr->size =
case HostCmd_CMD_MGMT_FRAME_REG:
cmd_ptr->command = cpu_to_le16(cmd_no);
cmd_ptr->params.reg_mask.action = cpu_to_le16(cmd_action);
- cmd_ptr->params.reg_mask.mask = cpu_to_le32(*(u32 *)data_buf);
+ cmd_ptr->params.reg_mask.mask = cpu_to_le32(
+ get_unaligned((u32 *)data_buf));
cmd_ptr->size =
cpu_to_le16(sizeof(struct host_cmd_ds_mgmt_frame_reg) +
S_DS_GEN);
case HostCmd_CMD_P2P_MODE_CFG:
cmd_ptr->command = cpu_to_le16(cmd_no);
cmd_ptr->params.mode_cfg.action = cpu_to_le16(cmd_action);
- cmd_ptr->params.mode_cfg.mode = cpu_to_le16(*(u16 *)data_buf);
+ cmd_ptr->params.mode_cfg.mode = cpu_to_le16(
+ get_unaligned((u16 *)data_buf));
cmd_ptr->size =
cpu_to_le16(sizeof(struct host_cmd_ds_p2p_mode_cfg) +
S_DS_GEN);
if (ret)
return -1;
- if (!disable_auto_ds &&
- first_sta && priv->adapter->iface_type != MWIFIEX_USB &&
+ if (!disable_auto_ds && first_sta &&
priv->bss_type != MWIFIEX_BSS_TYPE_UAP) {
/* Enable auto deep sleep */
auto_ds.auto_ds = DEEP_SLEEP_ON;
"query_type = %#x, buf size = %#x\n",
oid, query_type, le16_to_cpu(smib->buf_size));
if (query_type == HostCmd_ACT_GEN_GET) {
- ul_temp = le16_to_cpu(*((__le16 *) (smib->value)));
+ ul_temp = get_unaligned_le16(smib->value);
if (data_buf)
*data_buf = ul_temp;
switch (oid) {
struct host_cmd_ds_p2p_mode_cfg *mode_cfg = &resp->params.mode_cfg;
if (data_buf)
- *((u16 *)data_buf) = le16_to_cpu(mode_cfg->mode);
+ put_unaligned_le16(le16_to_cpu(mode_cfg->mode), data_buf);
return 0;
}
adapter->dbg.num_event_deauth++;
if (priv->media_connected) {
reason_code =
- le16_to_cpu(*(__le16 *)adapter->event_body);
+ get_unaligned_le16(adapter->event_body);
mwifiex_reset_connect_state(priv, reason_code, true);
}
break;
adapter->dbg.num_event_disassoc++;
if (priv->media_connected) {
reason_code =
- le16_to_cpu(*(__le16 *)adapter->event_body);
+ get_unaligned_le16(adapter->event_body);
mwifiex_reset_connect_state(priv, reason_code, true);
}
break;
adapter->dbg.num_event_link_lost++;
if (priv->media_connected) {
reason_code =
- le16_to_cpu(*(__le16 *)adapter->event_body);
+ get_unaligned_le16(adapter->event_body);
mwifiex_reset_connect_state(priv, reason_code, true);
}
break;
adapter->event_body);
break;
case EVENT_AMSDU_AGGR_CTRL:
- ctrl = le16_to_cpu(*(__le16 *)adapter->event_body);
+ ctrl = get_unaligned_le16(adapter->event_body);
mwifiex_dbg(adapter, EVENT,
"event: AMSDU_AGGR_CTRL %d\n", ctrl);
*buf++ = qosinfo; /* U-APSD no in use */
}
+static void mwifiex_tdls_add_bss_co_2040(struct sk_buff *skb)
+{
+ struct ieee_types_bss_co_2040 *bssco;
+
+ bssco = (void *)skb_put(skb, sizeof(struct ieee_types_bss_co_2040));
+ bssco->ieee_hdr.element_id = WLAN_EID_BSS_COEX_2040;
+ bssco->ieee_hdr.len = sizeof(struct ieee_types_bss_co_2040) -
+ sizeof(struct ieee_types_header);
+ bssco->bss_2040co = 0x01;
+}
+
+static void mwifiex_tdls_add_supported_chan(struct sk_buff *skb)
+{
+ struct ieee_types_generic *supp_chan;
+ u8 chan_supp[] = {1, 11};
+
+ supp_chan = (void *)skb_put(skb, (sizeof(struct ieee_types_header) +
+ sizeof(chan_supp)));
+ supp_chan->ieee_hdr.element_id = WLAN_EID_SUPPORTED_CHANNELS;
+ supp_chan->ieee_hdr.len = sizeof(chan_supp);
+ memcpy(supp_chan->data, chan_supp, sizeof(chan_supp));
+}
+
+static void mwifiex_tdls_add_oper_class(struct sk_buff *skb)
+{
+ struct ieee_types_generic *reg_class;
+ u8 rc_list[] = {1,
+ 1, 2, 3, 4, 12, 22, 23, 24, 25, 27, 28, 29, 30, 32, 33};
+ reg_class = (void *)skb_put(skb, (sizeof(struct ieee_types_header) +
+ sizeof(rc_list)));
+ reg_class->ieee_hdr.element_id = WLAN_EID_SUPPORTED_REGULATORY_CLASSES;
+ reg_class->ieee_hdr.len = sizeof(rc_list);
+ memcpy(reg_class->data, rc_list, sizeof(rc_list));
+}
+
static int mwifiex_prep_tdls_encap_data(struct mwifiex_private *priv,
const u8 *peer, u8 action_code,
u8 dialog_token,
}
mwifiex_tdls_add_ext_capab(priv, skb);
- mwifiex_tdls_add_qos_capab(skb);
+ mwifiex_tdls_add_bss_co_2040(skb);
+ mwifiex_tdls_add_supported_chan(skb);
+ mwifiex_tdls_add_oper_class(skb);
mwifiex_add_wmm_info_ie(priv, skb, 0);
break;
}
mwifiex_tdls_add_ext_capab(priv, skb);
- mwifiex_tdls_add_qos_capab(skb);
+ mwifiex_tdls_add_bss_co_2040(skb);
+ mwifiex_tdls_add_supported_chan(skb);
+ mwifiex_tdls_add_oper_class(skb);
mwifiex_add_wmm_info_ie(priv, skb, 0);
break;
sizeof(struct ieee_types_bss_co_2040) +
sizeof(struct ieee80211_ht_operation) +
sizeof(struct ieee80211_tdls_lnkie) +
+ (2 * (sizeof(struct ieee_types_header))) +
+ MWIFIEX_SUPPORTED_CHANNELS +
+ MWIFIEX_OPERATING_CLASSES +
sizeof(struct ieee80211_wmm_param_ie) +
extra_ies_len;
}
mwifiex_tdls_add_ext_capab(priv, skb);
+ mwifiex_tdls_add_bss_co_2040(skb);
+ mwifiex_tdls_add_supported_chan(skb);
mwifiex_tdls_add_qos_capab(skb);
+ mwifiex_tdls_add_oper_class(skb);
break;
default:
mwifiex_dbg(priv->adapter, ERROR, "Unknown TDLS action frame type\n");
struct mwifiex_sta_node *sta_ptr;
u8 *peer, *pos, *end;
u8 i, action, basic;
- __le16 cap = 0;
+ u16 cap = 0;
int ie_len = 0;
if (len < (sizeof(struct ethhdr) + 3))
pos = buf + sizeof(struct ethhdr) + 4;
/* payload 1+ category 1 + action 1 + dialog 1 */
- cap = cpu_to_le16(*(u16 *)pos);
+ cap = get_unaligned_le16(pos);
ie_len = len - sizeof(struct ethhdr) - TDLS_REQ_FIX_LEN;
pos += 2;
break;
return;
/* payload 1+ category 1 + action 1 + dialog 1 + status code 2*/
pos = buf + sizeof(struct ethhdr) + 6;
- cap = cpu_to_le16(*(u16 *)pos);
+ cap = get_unaligned_le16(pos);
ie_len = len - sizeof(struct ethhdr) - TDLS_RESP_FIX_LEN;
pos += 2;
break;
if (!sta_ptr)
return;
- sta_ptr->tdls_cap.capab = cap;
+ sta_ptr->tdls_cap.capab = cpu_to_le16(cap);
for (end = pos + ie_len; pos + 1 < end; pos += 2 + pos[1]) {
if (pos + 2 + pos[1] > end)
case WLAN_EID_AID:
if (priv->adapter->is_hw_11ac_capable)
sta_ptr->tdls_cap.aid =
- le16_to_cpu(*(__le16 *)(pos + 2));
+ get_unaligned_le16((pos + 2));
default:
break;
}
"AP EVENT: event id: %#x\n", eventcause);
break;
case EVENT_AMSDU_AGGR_CTRL:
- ctrl = le16_to_cpu(*(__le16 *)adapter->event_body);
+ ctrl = get_unaligned_le16(adapter->event_body);
mwifiex_dbg(adapter, EVENT,
"event: AMSDU_AGGR_CTRL %d\n", ctrl);
}
}
- usb_fill_bulk_urb(ctx->urb, card->udev,
- usb_rcvbulkpipe(card->udev, ctx->ep), ctx->skb->data,
- size, mwifiex_usb_rx_complete, (void *)ctx);
+ if (card->rx_cmd_ep == ctx->ep &&
+ card->rx_cmd_ep_type == USB_ENDPOINT_XFER_INT)
+ usb_fill_int_urb(ctx->urb, card->udev,
+ usb_rcvintpipe(card->udev, ctx->ep),
+ ctx->skb->data, size, mwifiex_usb_rx_complete,
+ (void *)ctx, card->rx_cmd_interval);
+ else
+ usb_fill_bulk_urb(ctx->urb, card->udev,
+ usb_rcvbulkpipe(card->udev, ctx->ep),
+ ctx->skb->data, size, mwifiex_usb_rx_complete,
+ (void *)ctx);
if (card->rx_cmd_ep == ctx->ep)
atomic_inc(&card->rx_cmd_urb_pending);
epd = &iface_desc->endpoint[i].desc;
if (usb_endpoint_dir_in(epd) &&
usb_endpoint_num(epd) == MWIFIEX_USB_EP_CMD_EVENT &&
- usb_endpoint_xfer_bulk(epd)) {
- pr_debug("info: bulk IN: max pkt size: %d, addr: %d\n",
+ (usb_endpoint_xfer_bulk(epd) ||
+ usb_endpoint_xfer_int(epd))) {
+ card->rx_cmd_ep_type = usb_endpoint_type(epd);
+ card->rx_cmd_interval = epd->bInterval;
+ pr_debug("info: Rx CMD/EVT:: max pkt size: %d, addr: %d, ep_type: %d\n",
le16_to_cpu(epd->wMaxPacketSize),
- epd->bEndpointAddress);
+ epd->bEndpointAddress, card->rx_cmd_ep_type);
card->rx_cmd_ep = usb_endpoint_num(epd);
atomic_set(&card->rx_cmd_urb_pending, 0);
}
}
if (usb_endpoint_dir_out(epd) &&
usb_endpoint_num(epd) == MWIFIEX_USB_EP_CMD_EVENT &&
- usb_endpoint_xfer_bulk(epd)) {
+ (usb_endpoint_xfer_bulk(epd) ||
+ usb_endpoint_xfer_int(epd))) {
+ card->tx_cmd_ep_type = usb_endpoint_type(epd);
+ card->tx_cmd_interval = epd->bInterval;
pr_debug("info: bulk OUT: max pkt size: %d, addr: %d\n",
le16_to_cpu(epd->wMaxPacketSize),
epd->bEndpointAddress);
+ pr_debug("info: Tx CMD:: max pkt size: %d, addr: %d, ep_type: %d\n",
+ le16_to_cpu(epd->wMaxPacketSize),
+ epd->bEndpointAddress, card->tx_cmd_ep_type);
card->tx_cmd_ep = usb_endpoint_num(epd);
atomic_set(&card->tx_cmd_urb_pending, 0);
card->bulk_out_maxpktsize =
context->skb = skb;
tx_urb = context->urb;
- usb_fill_bulk_urb(tx_urb, card->udev, usb_sndbulkpipe(card->udev, ep),
- data, skb->len, mwifiex_usb_tx_complete,
- (void *)context);
+ if (ep == card->tx_cmd_ep &&
+ card->tx_cmd_ep_type == USB_ENDPOINT_XFER_INT)
+ usb_fill_int_urb(tx_urb, card->udev,
+ usb_sndintpipe(card->udev, ep), data,
+ skb->len, mwifiex_usb_tx_complete,
+ (void *)context, card->tx_cmd_interval);
+ else
+ usb_fill_bulk_urb(tx_urb, card->udev,
+ usb_sndbulkpipe(card->udev, ep), data,
+ skb->len, mwifiex_usb_tx_complete,
+ (void *)context);
tx_urb->transfer_flags |= URB_ZERO_PACKET;
struct urb_context tx_cmd;
u8 mc_resync_flag;
struct usb_tx_data_port port[MWIFIEX_TX_DATA_PORT];
+ int rx_cmd_ep_type;
+ u8 rx_cmd_interval;
+ int tx_cmd_ep_type;
+ u8 tx_cmd_interval;
};
struct fw_header {
struct fw_sync_header {
__le32 cmd;
__le32 seq_num;
-};
+} __packed;
struct fw_data {
struct fw_header fw_hdr;
__le32 seq_num;
u8 data[1];
-};
+} __packed;
#endif /*_MWIFIEX_USB_H */
val = *((u8 *)addr);
break;
case 2:
- val = *((u16 *)addr);
+ val = get_unaligned((u16 *)addr);
break;
case 4:
- val = *((u32 *)addr);
+ val = get_unaligned((u32 *)addr);
break;
case 8:
- val = *((long long *)addr);
+ val = get_unaligned((long long *)addr);
break;
default:
val = -1;
int mwifiex_debug_info_to_buffer(struct mwifiex_private *priv, char *buf,
struct mwifiex_debug_info *info);
+static inline void le16_unaligned_add_cpu(__le16 *var, u16 val)
+{
+ put_unaligned_le16(get_unaligned_le16(var) + val, var);
+}
+
#endif /* !_MWIFIEX_UTIL_H_ */
config RT2800SOC
tristate "Ralink WiSoC support"
- depends on SOC_RT288X || SOC_RT305X
+ depends on SOC_RT288X || SOC_RT305X || SOC_MT7620
select RT2X00_LIB_SOC
select RT2X00_LIB_MMIO
select RT2X00_LIB_CRYPTO
#define RF5372 0x5372
#define RF5390 0x5390
#define RF5392 0x5392
+#define RF7620 0x7620
/*
* Chipset revisions.
#define RF_CSR_CFG_BUSY FIELD32(0x00020000)
/*
+ * MT7620 RF registers (reversed order)
+ */
+#define RF_CSR_CFG_DATA_MT7620 FIELD32(0x0000ff00)
+#define RF_CSR_CFG_REGNUM_MT7620 FIELD32(0x03ff0000)
+#define RF_CSR_CFG_WRITE_MT7620 FIELD32(0x00000010)
+#define RF_CSR_CFG_BUSY_MT7620 FIELD32(0x00000001)
+
+/* undocumented registers for calibration of new MAC */
+#define RF_CONTROL0 0x0518
+#define RF_BYPASS0 0x051c
+#define RF_CONTROL1 0x0520
+#define RF_BYPASS1 0x0524
+#define RF_CONTROL2 0x0528
+#define RF_BYPASS2 0x052c
+#define RF_CONTROL3 0x0530
+#define RF_BYPASS3 0x0534
+
+/*
* EFUSE_CSR: RT30x0 EEPROM
*/
#define EFUSE_CTRL 0x0580
#define AUTOWAKEUP_CFG_AUTOWAKE FIELD32(0x00008000)
/*
+ * MIMO_PS_CFG: MIMO Power-save Configuration
+ */
+#define MIMO_PS_CFG 0x1210
+#define MIMO_PS_CFG_MMPS_BB_EN FIELD32(0x00000001)
+#define MIMO_PS_CFG_MMPS_RX_ANT_NUM FIELD32(0x00000006)
+#define MIMO_PS_CFG_MMPS_RF_EN FIELD32(0x00000008)
+#define MIMO_PS_CFG_RX_STBY_POL FIELD32(0x00000010)
+#define MIMO_PS_CFG_RX_RX_STBY0 FIELD32(0x00000020)
+
+/*
* EDCA_AC0_CFG:
*/
#define EDCA_AC0_CFG 0x1300
#define TX_PWR_CFG_0_OFDM6_CH1 FIELD32(0x00f00000)
#define TX_PWR_CFG_0_OFDM12_CH0 FIELD32(0x0f000000)
#define TX_PWR_CFG_0_OFDM12_CH1 FIELD32(0xf0000000)
+/* bits for new 2T devices */
+#define TX_PWR_CFG_0B_1MBS_2MBS FIELD32(0x000000ff)
+#define TX_PWR_CFG_0B_5MBS_11MBS FIELD32(0x0000ff00)
+#define TX_PWR_CFG_0B_6MBS_9MBS FIELD32(0x00ff0000)
+#define TX_PWR_CFG_0B_12MBS_18MBS FIELD32(0xff000000)
+
/*
* TX_PWR_CFG_1:
#define TX_PWR_CFG_1_MCS0_CH1 FIELD32(0x00f00000)
#define TX_PWR_CFG_1_MCS2_CH0 FIELD32(0x0f000000)
#define TX_PWR_CFG_1_MCS2_CH1 FIELD32(0xf0000000)
+/* bits for new 2T devices */
+#define TX_PWR_CFG_1B_24MBS_36MBS FIELD32(0x000000ff)
+#define TX_PWR_CFG_1B_48MBS FIELD32(0x0000ff00)
+#define TX_PWR_CFG_1B_MCS0_MCS1 FIELD32(0x00ff0000)
+#define TX_PWR_CFG_1B_MCS2_MCS3 FIELD32(0xff000000)
/*
* TX_PWR_CFG_2:
#define TX_PWR_CFG_2_MCS8_CH1 FIELD32(0x00f00000)
#define TX_PWR_CFG_2_MCS10_CH0 FIELD32(0x0f000000)
#define TX_PWR_CFG_2_MCS10_CH1 FIELD32(0xf0000000)
+/* bits for new 2T devices */
+#define TX_PWR_CFG_2B_MCS4_MCS5 FIELD32(0x000000ff)
+#define TX_PWR_CFG_2B_MCS6_MCS7 FIELD32(0x0000ff00)
+#define TX_PWR_CFG_2B_MCS8_MCS9 FIELD32(0x00ff0000)
+#define TX_PWR_CFG_2B_MCS10_MCS11 FIELD32(0xff000000)
/*
* TX_PWR_CFG_3:
#define TX_PWR_CFG_3_STBC0_CH1 FIELD32(0x00f00000)
#define TX_PWR_CFG_3_STBC2_CH0 FIELD32(0x0f000000)
#define TX_PWR_CFG_3_STBC2_CH1 FIELD32(0xf0000000)
+/* bits for new 2T devices */
+#define TX_PWR_CFG_3B_MCS12_MCS13 FIELD32(0x000000ff)
+#define TX_PWR_CFG_3B_MCS14 FIELD32(0x0000ff00)
+#define TX_PWR_CFG_3B_STBC_MCS0_MCS1 FIELD32(0x00ff0000)
+#define TX_PWR_CFG_3B_STBC_MCS2_MSC3 FIELD32(0xff000000)
/*
* TX_PWR_CFG_4:
#define TX_PWR_CFG_4_UKNOWN7 FIELD32(0x00000f00)
#define TX_PWR_CFG_4_UKNOWN8 FIELD32(0x0000f000)
/* bits for 3T devices */
-#define TX_PWR_CFG_3_STBC4_CH0 FIELD32(0x0000000f)
-#define TX_PWR_CFG_3_STBC4_CH1 FIELD32(0x000000f0)
-#define TX_PWR_CFG_3_STBC6_CH0 FIELD32(0x00000f00)
-#define TX_PWR_CFG_3_STBC6_CH1 FIELD32(0x0000f000)
+#define TX_PWR_CFG_4_STBC4_CH0 FIELD32(0x0000000f)
+#define TX_PWR_CFG_4_STBC4_CH1 FIELD32(0x000000f0)
+#define TX_PWR_CFG_4_STBC6_CH0 FIELD32(0x00000f00)
+#define TX_PWR_CFG_4_STBC6_CH1 FIELD32(0x0000f000)
+/* bits for new 2T devices */
+#define TX_PWR_CFG_4B_STBC_MCS4_MCS5 FIELD32(0x000000ff)
+#define TX_PWR_CFG_4B_STBC_MCS6 FIELD32(0x0000ff00)
/*
* TX_PIN_CFG:
#define TX_PIN_CFG_RFTR_POL FIELD32(0x00020000)
#define TX_PIN_CFG_TRSW_EN FIELD32(0x00040000)
#define TX_PIN_CFG_TRSW_POL FIELD32(0x00080000)
+#define TX_PIN_CFG_RFRX_EN FIELD32(0x00100000)
+#define TX_PIN_CFG_RFRX_POL FIELD32(0x00200000)
#define TX_PIN_CFG_PA_PE_A2_EN FIELD32(0x01000000)
#define TX_PIN_CFG_PA_PE_G2_EN FIELD32(0x02000000)
#define TX_PIN_CFG_PA_PE_A2_POL FIELD32(0x04000000)
#define TX_PWR_CFG_4_EXT_STBC4_CH2 FIELD32(0x0000000f)
#define TX_PWR_CFG_4_EXT_STBC6_CH2 FIELD32(0x00000f00)
+/* TXn_RF_GAIN_CORRECT: RF Gain Correction for each RF_ALC[3:2]
+ * Unit: 0.1 dB, Range: -3.2 dB to 3.1 dB
+ */
+#define TX0_RF_GAIN_CORRECT 0x13a0
+#define TX0_RF_GAIN_CORRECT_GAIN_CORR_0 FIELD32(0x0000003f)
+#define TX0_RF_GAIN_CORRECT_GAIN_CORR_1 FIELD32(0x00003f00)
+#define TX0_RF_GAIN_CORRECT_GAIN_CORR_2 FIELD32(0x003f0000)
+#define TX0_RF_GAIN_CORRECT_GAIN_CORR_3 FIELD32(0x3f000000)
+
+#define TX1_RF_GAIN_CORRECT 0x13a4
+#define TX1_RF_GAIN_CORRECT_GAIN_CORR_0 FIELD32(0x0000003f)
+#define TX1_RF_GAIN_CORRECT_GAIN_CORR_1 FIELD32(0x00003f00)
+#define TX1_RF_GAIN_CORRECT_GAIN_CORR_2 FIELD32(0x003f0000)
+#define TX1_RF_GAIN_CORRECT_GAIN_CORR_3 FIELD32(0x3f000000)
+
+/* TXn_RF_GAIN_ATTEN: TXn RF Gain Attenuation Level
+ * Format: 7-bit, signed value
+ * Unit: 0.5 dB, Range: -20 dB to -5 dB
+ */
+#define TX0_RF_GAIN_ATTEN 0x13a8
+#define TX0_RF_GAIN_ATTEN_LEVEL_0 FIELD32(0x0000007f)
+#define TX0_RF_GAIN_ATTEN_LEVEL_1 FIELD32(0x00007f00)
+#define TX0_RF_GAIN_ATTEN_LEVEL_2 FIELD32(0x007f0000)
+#define TX0_RF_GAIN_ATTEN_LEVEL_3 FIELD32(0x7f000000)
+#define TX1_RF_GAIN_ATTEN 0x13ac
+#define TX1_RF_GAIN_ATTEN_LEVEL_0 FIELD32(0x0000007f)
+#define TX1_RF_GAIN_ATTEN_LEVEL_1 FIELD32(0x00007f00)
+#define TX1_RF_GAIN_ATTEN_LEVEL_2 FIELD32(0x007f0000)
+#define TX1_RF_GAIN_ATTEN_LEVEL_3 FIELD32(0x7f000000)
+
+/* TX_ALC_CFG_0: TX Automatic Level Control Configuration 0
+ * TX_ALC_LIMIT_n: TXn upper limit
+ * TX_ALC_CH_INIT_n: TXn channel initial transmission gain
+ * Unit: 0.5 dB, Range: 0 to 23.5 dB
+ */
+#define TX_ALC_CFG_0 0x13b0
+#define TX_ALC_CFG_0_CH_INIT_0 FIELD32(0x0000003f)
+#define TX_ALC_CFG_0_CH_INIT_1 FIELD32(0x00003f00)
+#define TX_ALC_CFG_0_LIMIT_0 FIELD32(0x003f0000)
+#define TX_ALC_CFG_0_LIMIT_1 FIELD32(0x3f000000)
+
+/* TX_ALC_CFG_1: TX Automatic Level Control Configuration 1
+ * TX_TEMP_COMP: TX Power Temperature Compensation
+ * Unit: 0.5 dB, Range: -10 dB to 10 dB
+ * TXn_GAIN_FINE: TXn Gain Fine Adjustment
+ * Unit: 0.1 dB, Range: -0.8 dB to 0.7 dB
+ * RF_TOS_DLY: Sets the RF_TOS_EN assertion delay after
+ * deassertion of PA_PE.
+ * Unit: 0.25 usec
+ * TXn_RF_GAIN_ATTEN: TXn RF gain attentuation selector
+ * RF_TOS_TIMEOUT: time-out value for RF_TOS_ENABLE
+ * deassertion if RF_TOS_DONE is missing.
+ * Unit: 0.25 usec
+ * RF_TOS_ENABLE: TX offset calibration enable
+ * ROS_BUSY_EN: RX offset calibration busy enable
+ */
+#define TX_ALC_CFG_1 0x13b4
+#define TX_ALC_CFG_1_TX_TEMP_COMP FIELD32(0x0000003f)
+#define TX_ALC_CFG_1_TX0_GAIN_FINE FIELD32(0x00000f00)
+#define TX_ALC_CFG_1_TX1_GAIN_FINE FIELD32(0x0000f000)
+#define TX_ALC_CFG_1_RF_TOS_DLY FIELD32(0x00070000)
+#define TX_ALC_CFG_1_TX0_RF_GAIN_ATTEN FIELD32(0x00300000)
+#define TX_ALC_CFG_1_TX1_RF_GAIN_ATTEN FIELD32(0x00c00000)
+#define TX_ALC_CFG_1_RF_TOS_TIMEOUT FIELD32(0x3f000000)
+#define TX_ALC_CFG_1_RF_TOS_ENABLE FIELD32(0x40000000)
+#define TX_ALC_CFG_1_ROS_BUSY_EN FIELD32(0x80000000)
+
+/* TXn_BB_GAIN_ATTEN: TXn RF Gain Attenuation Level
+ * Format: 5-bit signed values
+ * Unit: 0.5 dB, Range: -8 dB to 7 dB
+ */
+#define TX0_BB_GAIN_ATTEN 0x13c0
+#define TX0_BB_GAIN_ATTEN_LEVEL_0 FIELD32(0x0000001f)
+#define TX0_BB_GAIN_ATTEN_LEVEL_1 FIELD32(0x00001f00)
+#define TX0_BB_GAIN_ATTEN_LEVEL_2 FIELD32(0x001f0000)
+#define TX0_BB_GAIN_ATTEN_LEVEL_3 FIELD32(0x1f000000)
+#define TX1_BB_GAIN_ATTEN 0x13c4
+#define TX1_BB_GAIN_ATTEN_LEVEL_0 FIELD32(0x0000001f)
+#define TX1_BB_GAIN_ATTEN_LEVEL_1 FIELD32(0x00001f00)
+#define TX1_BB_GAIN_ATTEN_LEVEL_2 FIELD32(0x001f0000)
+#define TX1_BB_GAIN_ATTEN_LEVEL_3 FIELD32(0x1f000000)
+
+/* TX_ALC_VGA3: TX Automatic Level Correction Variable Gain Amplifier 3 */
+#define TX_ALC_VGA3 0x13c8
+#define TX_ALC_VGA3_TX0_ALC_VGA3 FIELD32(0x0000001f)
+#define TX_ALC_VGA3_TX1_ALC_VGA3 FIELD32(0x00001f00)
+#define TX_ALC_VGA3_TX0_ALC_VGA2 FIELD32(0x001f0000)
+#define TX_ALC_VGA3_TX1_ALC_VGA2 FIELD32(0x1f000000)
+
/* TX_PWR_CFG_7 */
#define TX_PWR_CFG_7 0x13d4
#define TX_PWR_CFG_7_OFDM54_CH0 FIELD32(0x0000000f)
#define TX_PWR_CFG_7_MCS7_CH0 FIELD32(0x000f0000)
#define TX_PWR_CFG_7_MCS7_CH1 FIELD32(0x00f00000)
#define TX_PWR_CFG_7_MCS7_CH2 FIELD32(0x0f000000)
+/* bits for new 2T devices */
+#define TX_PWR_CFG_7B_54MBS FIELD32(0x000000ff)
+#define TX_PWR_CFG_7B_MCS7 FIELD32(0x00ff0000)
+
/* TX_PWR_CFG_8 */
#define TX_PWR_CFG_8 0x13d8
#define TX_PWR_CFG_8_MCS23_CH0 FIELD32(0x000f0000)
#define TX_PWR_CFG_8_MCS23_CH1 FIELD32(0x00f00000)
#define TX_PWR_CFG_8_MCS23_CH2 FIELD32(0x0f000000)
+/* bits for new 2T devices */
+#define TX_PWR_CFG_8B_MCS15 FIELD32(0x000000ff)
+
/* TX_PWR_CFG_9 */
#define TX_PWR_CFG_9 0x13dc
#define TX_PWR_CFG_9_STBC7_CH0 FIELD32(0x0000000f)
#define TX_PWR_CFG_9_STBC7_CH1 FIELD32(0x000000f0)
#define TX_PWR_CFG_9_STBC7_CH2 FIELD32(0x00000f00)
+/* bits for new 2T devices */
+#define TX_PWR_CFG_9B_STBC_MCS7 FIELD32(0x000000ff)
/*
* RX_FILTER_CFG: RX configuration register.
#define TX_STA_FIFO_WCID FIELD32(0x0000ff00)
#define TX_STA_FIFO_SUCCESS_RATE FIELD32(0xffff0000)
#define TX_STA_FIFO_MCS FIELD32(0x007f0000)
+#define TX_STA_FIFO_BW FIELD32(0x00800000)
+#define TX_STA_FIFO_SGI FIELD32(0x01000000)
#define TX_STA_FIFO_PHYMODE FIELD32(0xc0000000)
/*
#define RFCSR1_TX1_PD FIELD8(0x20)
#define RFCSR1_RX2_PD FIELD8(0x40)
#define RFCSR1_TX2_PD FIELD8(0x80)
+#define RFCSR1_TX2_EN_MT7620 FIELD8(0x02)
/*
* RFCSR 2:
*/
#define RFCSR2_RESCAL_EN FIELD8(0x80)
+#define RFCSR2_RX2_EN_MT7620 FIELD8(0x02)
+#define RFCSR2_TX2_EN_MT7620 FIELD8(0x20)
/*
* RFCSR 3:
#define RFCSR3_BIT5 FIELD8(0x20)
/*
+ * RFCSR 4:
+ * VCOCAL_EN used by MT7620
+ */
+#define RFCSR4_VCOCAL_EN FIELD8(0x80)
+
+/*
* FRCSR 5:
*/
#define RFCSR5_R1 FIELD8(0x0c)
*/
#define RFCSR13_TX_POWER FIELD8(0x1f)
#define RFCSR13_DR0 FIELD8(0xe0)
+#define RFCSR13_RDIV_MT7620 FIELD8(0x03)
/*
* RFCSR 15:
* RFCSR 16:
*/
#define RFCSR16_TXMIXER_GAIN FIELD8(0x07)
+#define RFCSR16_RF_PLL_FREQ_SEL_MT7620 FIELD8(0x0F)
+#define RFCSR16_SDM_MODE_MT7620 FIELD8(0xE0)
/*
* RFCSR 17:
/* RFCSR 18 */
#define RFCSR18_XO_TUNE_BYPASS FIELD8(0x40)
+/* RFCSR 19 */
+#define RFCSR19_K FIELD8(0x03)
/*
* RFCSR 20:
* RFCSR 21:
*/
#define RFCSR21_RX_LO2_EN FIELD8(0x08)
+#define RFCSR21_BIT1 FIELD8(0x01)
+#define RFCSR21_BIT8 FIELD8(0x80)
/*
* RFCSR 22:
*/
#define RFCSR22_BASEBAND_LOOPBACK FIELD8(0x01)
+#define RFCSR22_FREQPLAN_D_MT7620 FIELD8(0x07)
/*
* RFCSR 23:
#define RFCSR27_R4 FIELD8(0x40)
/*
+ * RFCSR 28:
+ */
+#define RFCSR28_CH11_HT40 FIELD8(0x04)
+
+/*
* RFCSR 29:
*/
#define RFCSR29_ADC6_TEST FIELD8(0x01)
*/
#define RFCSR42_BIT1 FIELD8(0x01)
#define RFCSR42_BIT4 FIELD8(0x08)
+#define RFCSR42_TX2_EN_MT7620 FIELD8(0x40)
/*
* RFCSR 49:
EEPROM_TSSI_BOUND_BG5,
EEPROM_TXPOWER_A1,
EEPROM_TXPOWER_A2,
+ EEPROM_TXPOWER_INIT,
EEPROM_TSSI_BOUND_A1,
EEPROM_TSSI_BOUND_A2,
EEPROM_TSSI_BOUND_A3,
*/
#define BCN_TBTT_OFFSET 64
-/*
- * Hardware has 255 WCID table entries. First 32 entries are reserved for
- * shared keys. Since parts of the pairwise key table might be shared with
- * the beacon frame buffers 6 & 7 we could only use the first 222 entries.
- */
-#define WCID_START 33
-#define WCID_END 222
-#define STA_IDS_SIZE (WCID_END - WCID_START + 2)
-
-/*
- * RT2800 driver data structure
- */
-struct rt2800_drv_data {
- u8 calibration_bw20;
- u8 calibration_bw40;
- u8 bbp25;
- u8 bbp26;
- u8 txmixer_gain_24g;
- u8 txmixer_gain_5g;
- u8 max_psdu;
- unsigned int tbtt_tick;
- unsigned int ampdu_factor_cnt[4];
- DECLARE_BITMAP(sta_ids, STA_IDS_SIZE);
-};
-
#endif /* RT2800_H */
rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
#define WAIT_FOR_RFCSR(__dev, __reg) \
rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
+#define WAIT_FOR_RFCSR_MT7620(__dev, __reg) \
+ rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY_MT7620, \
+ (__reg))
#define WAIT_FOR_RF(__dev, __reg) \
rt2800_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
#define WAIT_FOR_MCU(__dev, __reg) \
* Wait until the RFCSR becomes available, afterwards we
* can safely write the new data into the register.
*/
- if (WAIT_FOR_RFCSR(rt2x00dev, ®)) {
- reg = 0;
- rt2x00_set_field32(®, RF_CSR_CFG_DATA, value);
- rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 1);
- rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1);
+ switch (rt2x00dev->chip.rt) {
+ case RT6352:
+ if (WAIT_FOR_RFCSR_MT7620(rt2x00dev, ®)) {
+ reg = 0;
+ rt2x00_set_field32(®, RF_CSR_CFG_DATA_MT7620, value);
+ rt2x00_set_field32(®, RF_CSR_CFG_REGNUM_MT7620,
+ word);
+ rt2x00_set_field32(®, RF_CSR_CFG_WRITE_MT7620, 1);
+ rt2x00_set_field32(®, RF_CSR_CFG_BUSY_MT7620, 1);
+
+ rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
+ }
+ break;
- rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
+ default:
+ if (WAIT_FOR_RFCSR(rt2x00dev, ®)) {
+ reg = 0;
+ rt2x00_set_field32(®, RF_CSR_CFG_DATA, value);
+ rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word);
+ rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 1);
+ rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1);
+
+ rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
+ }
+ break;
}
mutex_unlock(&rt2x00dev->csr_mutex);
}
+static void rt2800_rfcsr_write_bank(struct rt2x00_dev *rt2x00dev, const u8 bank,
+ const unsigned int reg, const u8 value)
+{
+ rt2800_rfcsr_write(rt2x00dev, (reg | (bank << 6)), value);
+}
+
+static void rt2800_rfcsr_write_chanreg(struct rt2x00_dev *rt2x00dev,
+ const unsigned int reg, const u8 value)
+{
+ rt2800_rfcsr_write_bank(rt2x00dev, 4, reg, value);
+ rt2800_rfcsr_write_bank(rt2x00dev, 6, reg, value);
+}
+
+static void rt2800_rfcsr_write_dccal(struct rt2x00_dev *rt2x00dev,
+ const unsigned int reg, const u8 value)
+{
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, reg, value);
+ rt2800_rfcsr_write_bank(rt2x00dev, 7, reg, value);
+}
+
static void rt2800_rfcsr_read(struct rt2x00_dev *rt2x00dev,
const unsigned int word, u8 *value)
{
* doesn't become available in time, reg will be 0xffffffff
* which means we return 0xff to the caller.
*/
- if (WAIT_FOR_RFCSR(rt2x00dev, ®)) {
- reg = 0;
- rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word);
- rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 0);
- rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1);
+ switch (rt2x00dev->chip.rt) {
+ case RT6352:
+ if (WAIT_FOR_RFCSR_MT7620(rt2x00dev, ®)) {
+ reg = 0;
+ rt2x00_set_field32(®, RF_CSR_CFG_REGNUM_MT7620,
+ word);
+ rt2x00_set_field32(®, RF_CSR_CFG_WRITE_MT7620, 0);
+ rt2x00_set_field32(®, RF_CSR_CFG_BUSY_MT7620, 1);
- rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
+ rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
- WAIT_FOR_RFCSR(rt2x00dev, ®);
- }
+ WAIT_FOR_RFCSR_MT7620(rt2x00dev, ®);
+ }
+
+ *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA_MT7620);
+ break;
+
+ default:
+ if (WAIT_FOR_RFCSR(rt2x00dev, ®)) {
+ reg = 0;
+ rt2x00_set_field32(®, RF_CSR_CFG_REGNUM, word);
+ rt2x00_set_field32(®, RF_CSR_CFG_WRITE, 0);
+ rt2x00_set_field32(®, RF_CSR_CFG_BUSY, 1);
- *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA);
+ rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
+
+ WAIT_FOR_RFCSR(rt2x00dev, ®);
+ }
+
+ *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA);
+ break;
+ }
mutex_unlock(&rt2x00dev->csr_mutex);
}
+static void rt2800_rfcsr_read_bank(struct rt2x00_dev *rt2x00dev, const u8 bank,
+ const unsigned int reg, u8 *value)
+{
+ rt2800_rfcsr_read(rt2x00dev, (reg | (bank << 6)), value);
+}
+
static void rt2800_rf_write(struct rt2x00_dev *rt2x00dev,
const unsigned int word, const u32 value)
{
[EEPROM_TSSI_BOUND_BG5] = 0x003b,
[EEPROM_TXPOWER_A1] = 0x003c,
[EEPROM_TXPOWER_A2] = 0x0053,
+ [EEPROM_TXPOWER_INIT] = 0x0068,
[EEPROM_TSSI_BOUND_A1] = 0x006a,
[EEPROM_TSSI_BOUND_A2] = 0x006b,
[EEPROM_TSSI_BOUND_A3] = 0x006c,
break;
case RT5592:
+ case RT6352:
*txwi_size = TXWI_DESC_SIZE_5WORDS;
*rxwi_size = RXWI_DESC_SIZE_6WORDS;
break;
}
EXPORT_SYMBOL_GPL(rt2800_process_rxwi);
-void rt2800_txdone_entry(struct queue_entry *entry, u32 status, __le32 *txwi)
+static void rt2800_rate_from_status(struct skb_frame_desc *skbdesc,
+ u32 status, enum nl80211_band band)
+{
+ u8 flags = 0;
+ u8 idx = rt2x00_get_field32(status, TX_STA_FIFO_MCS);
+
+ switch (rt2x00_get_field32(status, TX_STA_FIFO_PHYMODE)) {
+ case RATE_MODE_HT_GREENFIELD:
+ flags |= IEEE80211_TX_RC_GREEN_FIELD;
+ /* fall through */
+ case RATE_MODE_HT_MIX:
+ flags |= IEEE80211_TX_RC_MCS;
+ break;
+ case RATE_MODE_OFDM:
+ if (band == NL80211_BAND_2GHZ)
+ idx += 4;
+ break;
+ case RATE_MODE_CCK:
+ if (idx >= 8)
+ idx -= 8;
+ break;
+ }
+
+ if (rt2x00_get_field32(status, TX_STA_FIFO_BW))
+ flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
+
+ if (rt2x00_get_field32(status, TX_STA_FIFO_SGI))
+ flags |= IEEE80211_TX_RC_SHORT_GI;
+
+ skbdesc->tx_rate_idx = idx;
+ skbdesc->tx_rate_flags = flags;
+}
+
+void rt2800_txdone_entry(struct queue_entry *entry, u32 status, __le32 *txwi,
+ bool match)
{
struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
+ struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
struct txdone_entry_desc txdesc;
u32 word;
u16 mcs, real_mcs;
- int aggr, ampdu;
+ int aggr, ampdu, wcid, ack_req;
/*
* Obtain the status about this packet.
real_mcs = rt2x00_get_field32(status, TX_STA_FIFO_MCS);
aggr = rt2x00_get_field32(status, TX_STA_FIFO_TX_AGGRE);
+ wcid = rt2x00_get_field32(status, TX_STA_FIFO_WCID);
+ ack_req = rt2x00_get_field32(status, TX_STA_FIFO_TX_ACK_REQUIRED);
/*
* If a frame was meant to be sent as a single non-aggregated MPDU
* Hence, replace the requested rate with the real tx rate to not
* confuse the rate control algortihm by providing clearly wrong
* data.
- */
- if (unlikely(aggr == 1 && ampdu == 0 && real_mcs != mcs)) {
- skbdesc->tx_rate_idx = real_mcs;
+ *
+ * FIXME: if we do not find matching entry, we tell that frame was
+ * posted without any retries. We need to find a way to fix that
+ * and provide retry count.
+ */
+ if (unlikely((aggr == 1 && ampdu == 0 && real_mcs != mcs)) || !match) {
+ rt2800_rate_from_status(skbdesc, status, rt2x00dev->curr_band);
mcs = real_mcs;
}
if (aggr == 1 || ampdu == 1)
__set_bit(TXDONE_AMPDU, &txdesc.flags);
+ if (!ack_req)
+ __set_bit(TXDONE_NO_ACK_REQ, &txdesc.flags);
+
/*
* Ralink has a retry mechanism using a global fallback
* table. We setup this fallback table to try the immediate
if (txdesc.retry)
__set_bit(TXDONE_FALLBACK, &txdesc.flags);
- rt2x00lib_txdone(entry, &txdesc);
+ if (!match) {
+ /* RCU assures non-null sta will not be freed by mac80211. */
+ rcu_read_lock();
+ if (likely(wcid >= WCID_START && wcid <= WCID_END))
+ skbdesc->sta = drv_data->wcid_to_sta[wcid - WCID_START];
+ else
+ skbdesc->sta = NULL;
+ rt2x00lib_txdone_nomatch(entry, &txdesc);
+ rcu_read_unlock();
+ } else {
+ rt2x00lib_txdone(entry, &txdesc);
+ }
}
EXPORT_SYMBOL_GPL(rt2800_txdone_entry);
return 0;
__set_bit(wcid - WCID_START, drv_data->sta_ids);
+ drv_data->wcid_to_sta[wcid - WCID_START] = sta;
/*
* Clean up WCID attributes and write STA address to the device.
* get renewed when the WCID is reused.
*/
rt2800_config_wcid(rt2x00dev, NULL, wcid);
+ drv_data->wcid_to_sta[wcid - WCID_START] = NULL;
__clear_bit(wcid - WCID_START, drv_data->sta_ids);
return 0;
rt2800_rfcsr_write(rt2x00dev, 59,
r59_nonbt_rev[idx]);
} else if (rt2x00_rt(rt2x00dev, RT5390) ||
- rt2x00_rt(rt2x00dev, RT5392)) {
+ rt2x00_rt(rt2x00dev, RT5392) ||
+ rt2x00_rt(rt2x00dev, RT6352)) {
static const char r59_non_bt[] = {0x8f, 0x8f,
0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8d,
0x8a, 0x88, 0x88, 0x87, 0x87, 0x86};
rt2800_bbp_write(rt2x00dev, 196, (rf->channel <= 14) ? 0x19 : 0x7F);
}
+static void rt2800_config_channel_rf7620(struct rt2x00_dev *rt2x00dev,
+ struct ieee80211_conf *conf,
+ struct rf_channel *rf,
+ struct channel_info *info)
+{
+ struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
+ u8 rx_agc_fc, tx_agc_fc;
+ u8 rfcsr;
+
+ /* Frequeny plan setting */
+ /* Rdiv setting (set 0x03 if Xtal==20)
+ * R13[1:0]
+ */
+ rt2800_rfcsr_read(rt2x00dev, 13, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR13_RDIV_MT7620,
+ rt2800_clk_is_20mhz(rt2x00dev) ? 3 : 0);
+ rt2800_rfcsr_write(rt2x00dev, 13, rfcsr);
+
+ /* N setting
+ * R20[7:0] in rf->rf1
+ * R21[0] always 0
+ */
+ rt2800_rfcsr_read(rt2x00dev, 20, &rfcsr);
+ rfcsr = (rf->rf1 & 0x00ff);
+ rt2800_rfcsr_write(rt2x00dev, 20, rfcsr);
+
+ rt2800_rfcsr_read(rt2x00dev, 21, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR21_BIT1, 0);
+ rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
+
+ /* K setting (always 0)
+ * R16[3:0] (RF PLL freq selection)
+ */
+ rt2800_rfcsr_read(rt2x00dev, 16, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR16_RF_PLL_FREQ_SEL_MT7620, 0);
+ rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+
+ /* D setting (always 0)
+ * R22[2:0] (D=15, R22[2:0]=<111>)
+ */
+ rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR22_FREQPLAN_D_MT7620, 0);
+ rt2800_rfcsr_write(rt2x00dev, 22, rfcsr);
+
+ /* Ksd setting
+ * Ksd: R17<7:0> in rf->rf2
+ * R18<7:0> in rf->rf3
+ * R19<1:0> in rf->rf4
+ */
+ rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
+ rfcsr = rf->rf2;
+ rt2800_rfcsr_write(rt2x00dev, 17, rfcsr);
+
+ rt2800_rfcsr_read(rt2x00dev, 18, &rfcsr);
+ rfcsr = rf->rf3;
+ rt2800_rfcsr_write(rt2x00dev, 18, rfcsr);
+
+ rt2800_rfcsr_read(rt2x00dev, 19, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR19_K, rf->rf4);
+ rt2800_rfcsr_write(rt2x00dev, 19, rfcsr);
+
+ /* Default: XO=20MHz , SDM mode */
+ rt2800_rfcsr_read(rt2x00dev, 16, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR16_SDM_MODE_MT7620, 0x80);
+ rt2800_rfcsr_write(rt2x00dev, 16, rfcsr);
+
+ rt2800_rfcsr_read(rt2x00dev, 21, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR21_BIT8, 1);
+ rt2800_rfcsr_write(rt2x00dev, 21, rfcsr);
+
+ rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR1_TX2_EN_MT7620,
+ rt2x00dev->default_ant.tx_chain_num != 1);
+ rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
+
+ rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR2_TX2_EN_MT7620,
+ rt2x00dev->default_ant.tx_chain_num != 1);
+ rt2x00_set_field8(&rfcsr, RFCSR2_RX2_EN_MT7620,
+ rt2x00dev->default_ant.rx_chain_num != 1);
+ rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
+
+ rt2800_rfcsr_read(rt2x00dev, 42, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR42_TX2_EN_MT7620,
+ rt2x00dev->default_ant.tx_chain_num != 1);
+ rt2800_rfcsr_write(rt2x00dev, 42, rfcsr);
+
+ /* RF for DC Cal BW */
+ if (conf_is_ht40(conf)) {
+ rt2800_rfcsr_write_dccal(rt2x00dev, 6, 0x10);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 7, 0x10);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 8, 0x04);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x10);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x10);
+ } else {
+ rt2800_rfcsr_write_dccal(rt2x00dev, 6, 0x20);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 7, 0x20);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 8, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x20);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x20);
+ }
+
+ if (conf_is_ht40(conf)) {
+ rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x08);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x08);
+ } else {
+ rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x28);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x28);
+ }
+
+ rt2800_rfcsr_read(rt2x00dev, 28, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR28_CH11_HT40,
+ conf_is_ht40(conf) && (rf->channel == 11));
+ rt2800_rfcsr_write(rt2x00dev, 28, rfcsr);
+
+ if (!test_bit(DEVICE_STATE_SCANNING, &rt2x00dev->flags)) {
+ if (conf_is_ht40(conf)) {
+ rx_agc_fc = drv_data->rx_calibration_bw40;
+ tx_agc_fc = drv_data->tx_calibration_bw40;
+ } else {
+ rx_agc_fc = drv_data->rx_calibration_bw20;
+ tx_agc_fc = drv_data->tx_calibration_bw20;
+ }
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 6, &rfcsr);
+ rfcsr &= (~0x3F);
+ rfcsr |= rx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 6, rfcsr);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 7, &rfcsr);
+ rfcsr &= (~0x3F);
+ rfcsr |= rx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 7, rfcsr);
+ rt2800_rfcsr_read_bank(rt2x00dev, 7, 6, &rfcsr);
+ rfcsr &= (~0x3F);
+ rfcsr |= rx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 7, 6, rfcsr);
+ rt2800_rfcsr_read_bank(rt2x00dev, 7, 7, &rfcsr);
+ rfcsr &= (~0x3F);
+ rfcsr |= rx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 7, 7, rfcsr);
+
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 58, &rfcsr);
+ rfcsr &= (~0x3F);
+ rfcsr |= tx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 58, rfcsr);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 59, &rfcsr);
+ rfcsr &= (~0x3F);
+ rfcsr |= tx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 59, rfcsr);
+ rt2800_rfcsr_read_bank(rt2x00dev, 7, 58, &rfcsr);
+ rfcsr &= (~0x3F);
+ rfcsr |= tx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 7, 58, rfcsr);
+ rt2800_rfcsr_read_bank(rt2x00dev, 7, 59, &rfcsr);
+ rfcsr &= (~0x3F);
+ rfcsr |= tx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 7, 59, rfcsr);
+ }
+}
+
+static void rt2800_config_alc(struct rt2x00_dev *rt2x00dev,
+ struct ieee80211_channel *chan,
+ int power_level) {
+ u16 eeprom, target_power, max_power;
+ u32 mac_sys_ctrl, mac_status;
+ u32 reg;
+ u8 bbp;
+ int i;
+
+ /* hardware unit is 0.5dBm, limited to 23.5dBm */
+ power_level *= 2;
+ if (power_level > 0x2f)
+ power_level = 0x2f;
+
+ max_power = chan->max_power * 2;
+ if (max_power > 0x2f)
+ max_power = 0x2f;
+
+ rt2800_register_read(rt2x00dev, TX_ALC_CFG_0, ®);
+ rt2x00_set_field32(®, TX_ALC_CFG_0_CH_INIT_0, power_level);
+ rt2x00_set_field32(®, TX_ALC_CFG_0_CH_INIT_1, power_level);
+ rt2x00_set_field32(®, TX_ALC_CFG_0_LIMIT_0, max_power);
+ rt2x00_set_field32(®, TX_ALC_CFG_0_LIMIT_1, max_power);
+
+ rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
+ if (rt2x00_get_field16(eeprom, EEPROM_NIC_CONF1_INTERNAL_TX_ALC)) {
+ /* init base power by eeprom target power */
+ rt2800_eeprom_read(rt2x00dev, EEPROM_TXPOWER_INIT,
+ &target_power);
+ rt2x00_set_field32(®, TX_ALC_CFG_0_CH_INIT_0, target_power);
+ rt2x00_set_field32(®, TX_ALC_CFG_0_CH_INIT_1, target_power);
+ }
+ rt2800_register_write(rt2x00dev, TX_ALC_CFG_0, reg);
+
+ rt2800_register_read(rt2x00dev, TX_ALC_CFG_1, ®);
+ rt2x00_set_field32(®, TX_ALC_CFG_1_TX_TEMP_COMP, 0);
+ rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
+
+ /* Save MAC SYS CTRL registers */
+ rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &mac_sys_ctrl);
+ /* Disable Tx/Rx */
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
+ /* Check MAC Tx/Rx idle */
+ for (i = 0; i < 10000; i++) {
+ rt2800_register_read(rt2x00dev, MAC_STATUS_CFG,
+ &mac_status);
+ if (mac_status & 0x3)
+ usleep_range(50, 200);
+ else
+ break;
+ }
+
+ if (i == 10000)
+ rt2x00_warn(rt2x00dev, "Wait MAC Status to MAX !!!\n");
+
+ if (chan->center_freq > 2457) {
+ rt2800_bbp_read(rt2x00dev, 30, &bbp);
+ bbp = 0x40;
+ rt2800_bbp_write(rt2x00dev, 30, bbp);
+ rt2800_rfcsr_write(rt2x00dev, 39, 0);
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ rt2800_rfcsr_write(rt2x00dev, 42, 0xfb);
+ else
+ rt2800_rfcsr_write(rt2x00dev, 42, 0x7b);
+ } else {
+ rt2800_bbp_read(rt2x00dev, 30, &bbp);
+ bbp = 0x1f;
+ rt2800_bbp_write(rt2x00dev, 30, bbp);
+ rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev))
+ rt2800_rfcsr_write(rt2x00dev, 42, 0xdb);
+ else
+ rt2800_rfcsr_write(rt2x00dev, 42, 0x5b);
+ }
+ rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, mac_sys_ctrl);
+}
+
static void rt2800_bbp_write_with_rx_chain(struct rt2x00_dev *rt2x00dev,
const unsigned int word,
const u8 value)
struct channel_info *info)
{
u32 reg;
- unsigned int tx_pin;
+ u32 tx_pin;
u8 bbp, rfcsr;
info->default_power1 = rt2800_txpower_to_dev(rt2x00dev, rf->channel,
case RF5592:
rt2800_config_channel_rf55xx(rt2x00dev, conf, rf, info);
break;
+ case RF7620:
+ rt2800_config_channel_rf7620(rt2x00dev, conf, rf, info);
+ break;
default:
rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info);
}
if (rf->channel <= 14) {
if (!rt2x00_rt(rt2x00dev, RT5390) &&
- !rt2x00_rt(rt2x00dev, RT5392)) {
+ !rt2x00_rt(rt2x00dev, RT5392) &&
+ !rt2x00_rt(rt2x00dev, RT6352)) {
if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
rt2800_bbp_write(rt2x00dev, 82, 0x62);
rt2800_bbp_write(rt2x00dev, 75, 0x46);
rt2800_bbp_write(rt2x00dev, 82, 0x94);
else if (rt2x00_rt(rt2x00dev, RT3593))
rt2800_bbp_write(rt2x00dev, 82, 0x82);
- else
+ else if (!rt2x00_rt(rt2x00dev, RT6352))
rt2800_bbp_write(rt2x00dev, 82, 0xf2);
if (rt2x00_rt(rt2x00dev, RT3593))
if (rt2x00_rt(rt2x00dev, RT3572))
rt2800_rfcsr_write(rt2x00dev, 8, 0);
- tx_pin = 0;
+ rt2800_register_read(rt2x00dev, TX_PIN_CFG, &tx_pin);
switch (rt2x00dev->default_ant.tx_chain_num) {
case 3:
rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
+ rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFRX_EN, 1); /* mt7620 */
rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
usleep_range(1000, 1500);
}
- if (rt2x00_rt(rt2x00dev, RT5592)) {
+ if (rt2x00_rt(rt2x00dev, RT5592) || rt2x00_rt(rt2x00dev, RT6352)) {
rt2800_bbp_write(rt2x00dev, 195, 141);
rt2800_bbp_write(rt2x00dev, 196, conf_is_ht40(conf) ? 0x10 : 0x1a);
(unsigned long) regs[i]);
}
+static void rt2800_config_txpower_rt6352(struct rt2x00_dev *rt2x00dev,
+ struct ieee80211_channel *chan,
+ int power_level)
+{
+ u32 reg, pwreg;
+ u16 eeprom;
+ u32 data, gdata;
+ u8 t, i;
+ enum nl80211_band band = chan->band;
+ int delta;
+
+ /* Warn user if bw_comp is set in EEPROM */
+ delta = rt2800_get_txpower_bw_comp(rt2x00dev, band);
+
+ if (delta)
+ rt2x00_warn(rt2x00dev, "ignoring EEPROM HT40 power delta: %d\n",
+ delta);
+
+ /* populate TX_PWR_CFG_0 up to TX_PWR_CFG_4 from EEPROM for HT20, limit
+ * value to 0x3f and replace 0x20 by 0x21 as this is what the vendor
+ * driver does as well, though it looks kinda wrong.
+ * Maybe some misunderstanding of what a signed 8-bit value is? Maybe
+ * the hardware has a problem handling 0x20, and as the code initially
+ * used a fixed offset between HT20 and HT40 rates they had to work-
+ * around that issue and most likely just forgot about it later on.
+ * Maybe we should use rt2800_get_txpower_bw_comp() here as well,
+ * however, the corresponding EEPROM value is not respected by the
+ * vendor driver, so maybe this is rather being taken care of the
+ * TXALC and the driver doesn't need to handle it...?
+ * Though this is all very awkward, just do as they did, as that's what
+ * board vendors expected when they populated the EEPROM...
+ */
+ for (i = 0; i < 5; i++) {
+ rt2800_eeprom_read_from_array(rt2x00dev, EEPROM_TXPOWER_BYRATE,
+ i * 2, &eeprom);
+
+ data = eeprom;
+
+ t = eeprom & 0x3f;
+ if (t == 32)
+ t++;
+
+ gdata = t;
+
+ t = (eeprom & 0x3f00) >> 8;
+ if (t == 32)
+ t++;
+
+ gdata |= (t << 8);
+
+ rt2800_eeprom_read_from_array(rt2x00dev, EEPROM_TXPOWER_BYRATE,
+ (i * 2) + 1, &eeprom);
+
+ t = eeprom & 0x3f;
+ if (t == 32)
+ t++;
+
+ gdata |= (t << 16);
+
+ t = (eeprom & 0x3f00) >> 8;
+ if (t == 32)
+ t++;
+
+ gdata |= (t << 24);
+ data |= (eeprom << 16);
+
+ if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags)) {
+ /* HT20 */
+ if (data != 0xffffffff)
+ rt2800_register_write(rt2x00dev,
+ TX_PWR_CFG_0 + (i * 4),
+ data);
+ } else {
+ /* HT40 */
+ if (gdata != 0xffffffff)
+ rt2800_register_write(rt2x00dev,
+ TX_PWR_CFG_0 + (i * 4),
+ gdata);
+ }
+ }
+
+ /* Aparently Ralink ran out of space in the BYRATE calibration section
+ * of the EERPOM which is copied to the corresponding TX_PWR_CFG_x
+ * registers. As recent 2T chips use 8-bit instead of 4-bit values for
+ * power-offsets more space would be needed. Ralink decided to keep the
+ * EEPROM layout untouched and rather have some shared values covering
+ * multiple bitrates.
+ * Populate the registers not covered by the EEPROM in the same way the
+ * vendor driver does.
+ */
+
+ /* For OFDM 54MBS use value from OFDM 48MBS */
+ pwreg = 0;
+ rt2800_register_read(rt2x00dev, TX_PWR_CFG_1, ®);
+ t = rt2x00_get_field32(reg, TX_PWR_CFG_1B_48MBS);
+ rt2x00_set_field32(&pwreg, TX_PWR_CFG_7B_54MBS, t);
+
+ /* For MCS 7 use value from MCS 6 */
+ rt2800_register_read(rt2x00dev, TX_PWR_CFG_2, ®);
+ t = rt2x00_get_field32(reg, TX_PWR_CFG_2B_MCS6_MCS7);
+ rt2x00_set_field32(&pwreg, TX_PWR_CFG_7B_MCS7, t);
+ rt2800_register_write(rt2x00dev, TX_PWR_CFG_7, pwreg);
+
+ /* For MCS 15 use value from MCS 14 */
+ pwreg = 0;
+ rt2800_register_read(rt2x00dev, TX_PWR_CFG_3, ®);
+ t = rt2x00_get_field32(reg, TX_PWR_CFG_3B_MCS14);
+ rt2x00_set_field32(&pwreg, TX_PWR_CFG_8B_MCS15, t);
+ rt2800_register_write(rt2x00dev, TX_PWR_CFG_8, pwreg);
+
+ /* For STBC MCS 7 use value from STBC MCS 6 */
+ pwreg = 0;
+ rt2800_register_read(rt2x00dev, TX_PWR_CFG_4, ®);
+ t = rt2x00_get_field32(reg, TX_PWR_CFG_4B_STBC_MCS6);
+ rt2x00_set_field32(&pwreg, TX_PWR_CFG_9B_STBC_MCS7, t);
+ rt2800_register_write(rt2x00dev, TX_PWR_CFG_9, pwreg);
+
+ rt2800_config_alc(rt2x00dev, chan, power_level);
+
+ /* TODO: temperature compensation code! */
+}
+
/*
* We configure transmit power using MAC TX_PWR_CFG_{0,...,N} registers and
* BBP R1 register. TX_PWR_CFG_X allow to configure per rate TX power values,
{
if (rt2x00_rt(rt2x00dev, RT3593))
rt2800_config_txpower_rt3593(rt2x00dev, chan, power_level);
+ else if (rt2x00_rt(rt2x00dev, RT6352))
+ rt2800_config_txpower_rt6352(rt2x00dev, chan, power_level);
else
rt2800_config_txpower_rt28xx(rt2x00dev, chan, power_level);
}
{
u32 tx_pin;
u8 rfcsr;
+ unsigned long min_sleep = 0;
/*
* A voltage-controlled oscillator(VCO) is an electronic oscillator
rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr);
rt2x00_set_field8(&rfcsr, RFCSR3_VCOCAL_EN, 1);
rt2800_rfcsr_write(rt2x00dev, 3, rfcsr);
+ min_sleep = 1000;
+ break;
+ case RF7620:
+ rt2800_rfcsr_write(rt2x00dev, 5, 0x40);
+ rt2800_rfcsr_write(rt2x00dev, 4, 0x0C);
+ rt2800_rfcsr_read(rt2x00dev, 4, &rfcsr);
+ rt2x00_set_field8(&rfcsr, RFCSR4_VCOCAL_EN, 1);
+ rt2800_rfcsr_write(rt2x00dev, 4, rfcsr);
+ min_sleep = 2000;
break;
default:
WARN_ONCE(1, "Not supported RF chipet %x for VCO recalibration",
return;
}
- usleep_range(1000, 1500);
+ if (min_sleep > 0)
+ usleep_range(min_sleep, min_sleep * 2);
rt2800_register_read(rt2x00dev, TX_PIN_CFG, &tx_pin);
if (rt2x00dev->rf_channel <= 14) {
}
rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
+ if (rt2x00_rt(rt2x00dev, RT6352)) {
+ if (rt2x00dev->default_ant.tx_chain_num == 1) {
+ rt2800_bbp_write(rt2x00dev, 91, 0x07);
+ rt2800_bbp_write(rt2x00dev, 95, 0x1A);
+ rt2800_bbp_write(rt2x00dev, 195, 128);
+ rt2800_bbp_write(rt2x00dev, 196, 0xA0);
+ rt2800_bbp_write(rt2x00dev, 195, 170);
+ rt2800_bbp_write(rt2x00dev, 196, 0x12);
+ rt2800_bbp_write(rt2x00dev, 195, 171);
+ rt2800_bbp_write(rt2x00dev, 196, 0x10);
+ } else {
+ rt2800_bbp_write(rt2x00dev, 91, 0x06);
+ rt2800_bbp_write(rt2x00dev, 95, 0x9A);
+ rt2800_bbp_write(rt2x00dev, 195, 128);
+ rt2800_bbp_write(rt2x00dev, 196, 0xE0);
+ rt2800_bbp_write(rt2x00dev, 195, 170);
+ rt2800_bbp_write(rt2x00dev, 196, 0x30);
+ rt2800_bbp_write(rt2x00dev, 195, 171);
+ rt2800_bbp_write(rt2x00dev, 196, 0x30);
+ }
+
+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
+ rt2800_bbp_write(rt2x00dev, 75, 0x60);
+ rt2800_bbp_write(rt2x00dev, 76, 0x44);
+ rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+ rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+ }
+
+ /* On 11A, We should delay and wait RF/BBP to be stable
+ * and the appropriate time should be 1000 micro seconds
+ * 2005/06/05 - On 11G, we also need this delay time.
+ * Otherwise it's difficult to pass the WHQL.
+ */
+ usleep_range(1000, 1500);
+ }
}
EXPORT_SYMBOL_GPL(rt2800_vco_calibration);
rt2x00_rt(rt2x00dev, RT3593) ||
rt2x00_rt(rt2x00dev, RT5390) ||
rt2x00_rt(rt2x00dev, RT5392) ||
- rt2x00_rt(rt2x00dev, RT5592))
+ rt2x00_rt(rt2x00dev, RT5592) ||
+ rt2x00_rt(rt2x00dev, RT6352))
vgc = 0x1c + (2 * rt2x00dev->lna_gain);
else
vgc = 0x2e + rt2x00dev->lna_gain;
0x00000000);
}
} else if (rt2x00_rt(rt2x00dev, RT5390) ||
- rt2x00_rt(rt2x00dev, RT5392)) {
+ rt2x00_rt(rt2x00dev, RT5392) ||
+ rt2x00_rt(rt2x00dev, RT6352)) {
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
} else if (rt2x00_rt(rt2x00dev, RT5350)) {
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
+ } else if (rt2x00_rt(rt2x00dev, RT6352)) {
+ rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000401);
+ rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x000C0000);
+ rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
+ rt2800_register_write(rt2x00dev, MIMO_PS_CFG, 0x00000002);
+ rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0x00150F0F);
+ rt2800_register_write(rt2x00dev, TX_ALC_VGA3, 0x06060606);
+ rt2800_register_write(rt2x00dev, TX0_BB_GAIN_ATTEN, 0x0);
+ rt2800_register_write(rt2x00dev, TX1_BB_GAIN_ATTEN, 0x0);
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN, 0x6C6C666C);
+ rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN, 0x6C6C666C);
+ rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
+ 0x3630363A);
+ rt2800_register_write(rt2x00dev, TX1_RF_GAIN_CORRECT,
+ 0x3630363A);
+ rt2800_register_read(rt2x00dev, TX_ALC_CFG_1, ®);
+ rt2x00_set_field32(®, TX_ALC_CFG_1_ROS_BUSY_EN, 0);
+ rt2800_register_write(rt2x00dev, TX_ALC_CFG_1, reg);
} else {
rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
rt2800_bbp_write(rt2x00dev, 103, 0xc0);
}
+static void rt2800_bbp_glrt_write(struct rt2x00_dev *rt2x00dev,
+ const u8 reg, const u8 value)
+{
+ rt2800_bbp_write(rt2x00dev, 195, reg);
+ rt2800_bbp_write(rt2x00dev, 196, value);
+}
+
+static void rt2800_bbp_dcoc_write(struct rt2x00_dev *rt2x00dev,
+ const u8 reg, const u8 value)
+{
+ rt2800_bbp_write(rt2x00dev, 158, reg);
+ rt2800_bbp_write(rt2x00dev, 159, value);
+}
+
+static void rt2800_bbp_dcoc_read(struct rt2x00_dev *rt2x00dev,
+ const u8 reg, u8 *value)
+{
+ rt2800_bbp_write(rt2x00dev, 158, reg);
+ rt2800_bbp_read(rt2x00dev, 159, value);
+}
+
+static void rt2800_init_bbp_6352(struct rt2x00_dev *rt2x00dev)
+{
+ u8 bbp;
+
+ /* Apply Maximum Likelihood Detection (MLD) for 2 stream case */
+ rt2800_bbp_read(rt2x00dev, 105, &bbp);
+ rt2x00_set_field8(&bbp, BBP105_MLD,
+ rt2x00dev->default_ant.rx_chain_num == 2);
+ rt2800_bbp_write(rt2x00dev, 105, bbp);
+
+ /* Avoid data loss and CRC errors */
+ rt2800_bbp4_mac_if_ctrl(rt2x00dev);
+
+ /* Fix I/Q swap issue */
+ rt2800_bbp_read(rt2x00dev, 1, &bbp);
+ bbp |= 0x04;
+ rt2800_bbp_write(rt2x00dev, 1, bbp);
+
+ /* BBP for G band */
+ rt2800_bbp_write(rt2x00dev, 3, 0x08);
+ rt2800_bbp_write(rt2x00dev, 4, 0x00); /* rt2800_bbp4_mac_if_ctrl? */
+ rt2800_bbp_write(rt2x00dev, 6, 0x08);
+ rt2800_bbp_write(rt2x00dev, 14, 0x09);
+ rt2800_bbp_write(rt2x00dev, 15, 0xFF);
+ rt2800_bbp_write(rt2x00dev, 16, 0x01);
+ rt2800_bbp_write(rt2x00dev, 20, 0x06);
+ rt2800_bbp_write(rt2x00dev, 21, 0x00);
+ rt2800_bbp_write(rt2x00dev, 22, 0x00);
+ rt2800_bbp_write(rt2x00dev, 27, 0x00);
+ rt2800_bbp_write(rt2x00dev, 28, 0x00);
+ rt2800_bbp_write(rt2x00dev, 30, 0x00);
+ rt2800_bbp_write(rt2x00dev, 31, 0x48);
+ rt2800_bbp_write(rt2x00dev, 47, 0x40);
+ rt2800_bbp_write(rt2x00dev, 62, 0x00);
+ rt2800_bbp_write(rt2x00dev, 63, 0x00);
+ rt2800_bbp_write(rt2x00dev, 64, 0x00);
+ rt2800_bbp_write(rt2x00dev, 65, 0x2C);
+ rt2800_bbp_write(rt2x00dev, 66, 0x1C);
+ rt2800_bbp_write(rt2x00dev, 67, 0x20);
+ rt2800_bbp_write(rt2x00dev, 68, 0xDD);
+ rt2800_bbp_write(rt2x00dev, 69, 0x10);
+ rt2800_bbp_write(rt2x00dev, 70, 0x05);
+ rt2800_bbp_write(rt2x00dev, 73, 0x18);
+ rt2800_bbp_write(rt2x00dev, 74, 0x0F);
+ rt2800_bbp_write(rt2x00dev, 75, 0x60);
+ rt2800_bbp_write(rt2x00dev, 76, 0x44);
+ rt2800_bbp_write(rt2x00dev, 77, 0x59);
+ rt2800_bbp_write(rt2x00dev, 78, 0x1E);
+ rt2800_bbp_write(rt2x00dev, 79, 0x1C);
+ rt2800_bbp_write(rt2x00dev, 80, 0x0C);
+ rt2800_bbp_write(rt2x00dev, 81, 0x3A);
+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
+ rt2800_bbp_write(rt2x00dev, 83, 0x9A);
+ rt2800_bbp_write(rt2x00dev, 84, 0x9A);
+ rt2800_bbp_write(rt2x00dev, 86, 0x38);
+ rt2800_bbp_write(rt2x00dev, 88, 0x90);
+ rt2800_bbp_write(rt2x00dev, 91, 0x04);
+ rt2800_bbp_write(rt2x00dev, 92, 0x02);
+ rt2800_bbp_write(rt2x00dev, 95, 0x9A);
+ rt2800_bbp_write(rt2x00dev, 96, 0x00);
+ rt2800_bbp_write(rt2x00dev, 103, 0xC0);
+ rt2800_bbp_write(rt2x00dev, 104, 0x92);
+ /* FIXME BBP105 owerwrite */
+ rt2800_bbp_write(rt2x00dev, 105, 0x3C);
+ rt2800_bbp_write(rt2x00dev, 106, 0x12);
+ rt2800_bbp_write(rt2x00dev, 109, 0x00);
+ rt2800_bbp_write(rt2x00dev, 134, 0x10);
+ rt2800_bbp_write(rt2x00dev, 135, 0xA6);
+ rt2800_bbp_write(rt2x00dev, 137, 0x04);
+ rt2800_bbp_write(rt2x00dev, 142, 0x30);
+ rt2800_bbp_write(rt2x00dev, 143, 0xF7);
+ rt2800_bbp_write(rt2x00dev, 160, 0xEC);
+ rt2800_bbp_write(rt2x00dev, 161, 0xC4);
+ rt2800_bbp_write(rt2x00dev, 162, 0x77);
+ rt2800_bbp_write(rt2x00dev, 163, 0xF9);
+ rt2800_bbp_write(rt2x00dev, 164, 0x00);
+ rt2800_bbp_write(rt2x00dev, 165, 0x00);
+ rt2800_bbp_write(rt2x00dev, 186, 0x00);
+ rt2800_bbp_write(rt2x00dev, 187, 0x00);
+ rt2800_bbp_write(rt2x00dev, 188, 0x00);
+ rt2800_bbp_write(rt2x00dev, 186, 0x00);
+ rt2800_bbp_write(rt2x00dev, 187, 0x01);
+ rt2800_bbp_write(rt2x00dev, 188, 0x00);
+ rt2800_bbp_write(rt2x00dev, 189, 0x00);
+
+ rt2800_bbp_write(rt2x00dev, 91, 0x06);
+ rt2800_bbp_write(rt2x00dev, 92, 0x04);
+ rt2800_bbp_write(rt2x00dev, 93, 0x54);
+ rt2800_bbp_write(rt2x00dev, 99, 0x50);
+ rt2800_bbp_write(rt2x00dev, 148, 0x84);
+ rt2800_bbp_write(rt2x00dev, 167, 0x80);
+ rt2800_bbp_write(rt2x00dev, 178, 0xFF);
+ rt2800_bbp_write(rt2x00dev, 106, 0x13);
+
+ /* BBP for G band GLRT function (BBP_128 ~ BBP_221) */
+ rt2800_bbp_glrt_write(rt2x00dev, 0, 0x00);
+ rt2800_bbp_glrt_write(rt2x00dev, 1, 0x14);
+ rt2800_bbp_glrt_write(rt2x00dev, 2, 0x20);
+ rt2800_bbp_glrt_write(rt2x00dev, 3, 0x0A);
+ rt2800_bbp_glrt_write(rt2x00dev, 10, 0x16);
+ rt2800_bbp_glrt_write(rt2x00dev, 11, 0x06);
+ rt2800_bbp_glrt_write(rt2x00dev, 12, 0x02);
+ rt2800_bbp_glrt_write(rt2x00dev, 13, 0x07);
+ rt2800_bbp_glrt_write(rt2x00dev, 14, 0x05);
+ rt2800_bbp_glrt_write(rt2x00dev, 15, 0x09);
+ rt2800_bbp_glrt_write(rt2x00dev, 16, 0x20);
+ rt2800_bbp_glrt_write(rt2x00dev, 17, 0x08);
+ rt2800_bbp_glrt_write(rt2x00dev, 18, 0x4A);
+ rt2800_bbp_glrt_write(rt2x00dev, 19, 0x00);
+ rt2800_bbp_glrt_write(rt2x00dev, 20, 0x00);
+ rt2800_bbp_glrt_write(rt2x00dev, 128, 0xE0);
+ rt2800_bbp_glrt_write(rt2x00dev, 129, 0x1F);
+ rt2800_bbp_glrt_write(rt2x00dev, 130, 0x4F);
+ rt2800_bbp_glrt_write(rt2x00dev, 131, 0x32);
+ rt2800_bbp_glrt_write(rt2x00dev, 132, 0x08);
+ rt2800_bbp_glrt_write(rt2x00dev, 133, 0x28);
+ rt2800_bbp_glrt_write(rt2x00dev, 134, 0x19);
+ rt2800_bbp_glrt_write(rt2x00dev, 135, 0x0A);
+ rt2800_bbp_glrt_write(rt2x00dev, 138, 0x16);
+ rt2800_bbp_glrt_write(rt2x00dev, 139, 0x10);
+ rt2800_bbp_glrt_write(rt2x00dev, 140, 0x10);
+ rt2800_bbp_glrt_write(rt2x00dev, 141, 0x1A);
+ rt2800_bbp_glrt_write(rt2x00dev, 142, 0x36);
+ rt2800_bbp_glrt_write(rt2x00dev, 143, 0x2C);
+ rt2800_bbp_glrt_write(rt2x00dev, 144, 0x26);
+ rt2800_bbp_glrt_write(rt2x00dev, 145, 0x24);
+ rt2800_bbp_glrt_write(rt2x00dev, 146, 0x42);
+ rt2800_bbp_glrt_write(rt2x00dev, 147, 0x40);
+ rt2800_bbp_glrt_write(rt2x00dev, 148, 0x30);
+ rt2800_bbp_glrt_write(rt2x00dev, 149, 0x29);
+ rt2800_bbp_glrt_write(rt2x00dev, 150, 0x4C);
+ rt2800_bbp_glrt_write(rt2x00dev, 151, 0x46);
+ rt2800_bbp_glrt_write(rt2x00dev, 152, 0x3D);
+ rt2800_bbp_glrt_write(rt2x00dev, 153, 0x40);
+ rt2800_bbp_glrt_write(rt2x00dev, 154, 0x3E);
+ rt2800_bbp_glrt_write(rt2x00dev, 155, 0x38);
+ rt2800_bbp_glrt_write(rt2x00dev, 156, 0x3D);
+ rt2800_bbp_glrt_write(rt2x00dev, 157, 0x2F);
+ rt2800_bbp_glrt_write(rt2x00dev, 158, 0x3C);
+ rt2800_bbp_glrt_write(rt2x00dev, 159, 0x34);
+ rt2800_bbp_glrt_write(rt2x00dev, 160, 0x2C);
+ rt2800_bbp_glrt_write(rt2x00dev, 161, 0x2F);
+ rt2800_bbp_glrt_write(rt2x00dev, 162, 0x3C);
+ rt2800_bbp_glrt_write(rt2x00dev, 163, 0x35);
+ rt2800_bbp_glrt_write(rt2x00dev, 164, 0x2E);
+ rt2800_bbp_glrt_write(rt2x00dev, 165, 0x2F);
+ rt2800_bbp_glrt_write(rt2x00dev, 166, 0x49);
+ rt2800_bbp_glrt_write(rt2x00dev, 167, 0x41);
+ rt2800_bbp_glrt_write(rt2x00dev, 168, 0x36);
+ rt2800_bbp_glrt_write(rt2x00dev, 169, 0x39);
+ rt2800_bbp_glrt_write(rt2x00dev, 170, 0x30);
+ rt2800_bbp_glrt_write(rt2x00dev, 171, 0x30);
+ rt2800_bbp_glrt_write(rt2x00dev, 172, 0x0E);
+ rt2800_bbp_glrt_write(rt2x00dev, 173, 0x0D);
+ rt2800_bbp_glrt_write(rt2x00dev, 174, 0x28);
+ rt2800_bbp_glrt_write(rt2x00dev, 175, 0x21);
+ rt2800_bbp_glrt_write(rt2x00dev, 176, 0x1C);
+ rt2800_bbp_glrt_write(rt2x00dev, 177, 0x16);
+ rt2800_bbp_glrt_write(rt2x00dev, 178, 0x50);
+ rt2800_bbp_glrt_write(rt2x00dev, 179, 0x4A);
+ rt2800_bbp_glrt_write(rt2x00dev, 180, 0x43);
+ rt2800_bbp_glrt_write(rt2x00dev, 181, 0x50);
+ rt2800_bbp_glrt_write(rt2x00dev, 182, 0x10);
+ rt2800_bbp_glrt_write(rt2x00dev, 183, 0x10);
+ rt2800_bbp_glrt_write(rt2x00dev, 184, 0x10);
+ rt2800_bbp_glrt_write(rt2x00dev, 185, 0x10);
+ rt2800_bbp_glrt_write(rt2x00dev, 200, 0x7D);
+ rt2800_bbp_glrt_write(rt2x00dev, 201, 0x14);
+ rt2800_bbp_glrt_write(rt2x00dev, 202, 0x32);
+ rt2800_bbp_glrt_write(rt2x00dev, 203, 0x2C);
+ rt2800_bbp_glrt_write(rt2x00dev, 204, 0x36);
+ rt2800_bbp_glrt_write(rt2x00dev, 205, 0x4C);
+ rt2800_bbp_glrt_write(rt2x00dev, 206, 0x43);
+ rt2800_bbp_glrt_write(rt2x00dev, 207, 0x2C);
+ rt2800_bbp_glrt_write(rt2x00dev, 208, 0x2E);
+ rt2800_bbp_glrt_write(rt2x00dev, 209, 0x36);
+ rt2800_bbp_glrt_write(rt2x00dev, 210, 0x30);
+ rt2800_bbp_glrt_write(rt2x00dev, 211, 0x6E);
+
+ /* BBP for G band DCOC function */
+ rt2800_bbp_dcoc_write(rt2x00dev, 140, 0x0C);
+ rt2800_bbp_dcoc_write(rt2x00dev, 141, 0x00);
+ rt2800_bbp_dcoc_write(rt2x00dev, 142, 0x10);
+ rt2800_bbp_dcoc_write(rt2x00dev, 143, 0x10);
+ rt2800_bbp_dcoc_write(rt2x00dev, 144, 0x10);
+ rt2800_bbp_dcoc_write(rt2x00dev, 145, 0x10);
+ rt2800_bbp_dcoc_write(rt2x00dev, 146, 0x08);
+ rt2800_bbp_dcoc_write(rt2x00dev, 147, 0x40);
+ rt2800_bbp_dcoc_write(rt2x00dev, 148, 0x04);
+ rt2800_bbp_dcoc_write(rt2x00dev, 149, 0x04);
+ rt2800_bbp_dcoc_write(rt2x00dev, 150, 0x08);
+ rt2800_bbp_dcoc_write(rt2x00dev, 151, 0x08);
+ rt2800_bbp_dcoc_write(rt2x00dev, 152, 0x03);
+ rt2800_bbp_dcoc_write(rt2x00dev, 153, 0x03);
+ rt2800_bbp_dcoc_write(rt2x00dev, 154, 0x03);
+ rt2800_bbp_dcoc_write(rt2x00dev, 155, 0x02);
+ rt2800_bbp_dcoc_write(rt2x00dev, 156, 0x40);
+ rt2800_bbp_dcoc_write(rt2x00dev, 157, 0x40);
+ rt2800_bbp_dcoc_write(rt2x00dev, 158, 0x64);
+ rt2800_bbp_dcoc_write(rt2x00dev, 159, 0x64);
+
+ rt2800_bbp4_mac_if_ctrl(rt2x00dev);
+}
+
static void rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
{
unsigned int i;
case RT5592:
rt2800_init_bbp_5592(rt2x00dev);
return;
+ case RT6352:
+ rt2800_init_bbp_6352(rt2x00dev);
+ break;
}
for (i = 0; i < EEPROM_BBP_SIZE; i++) {
rt2800_led_open_drain_enable(rt2x00dev);
}
+static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
+ bool set_bw, bool is_ht40)
+{
+ u8 bbp_val;
+
+ rt2800_bbp_read(rt2x00dev, 21, &bbp_val);
+ bbp_val |= 0x1;
+ rt2800_bbp_write(rt2x00dev, 21, bbp_val);
+ usleep_range(100, 200);
+
+ if (set_bw) {
+ rt2800_bbp_read(rt2x00dev, 4, &bbp_val);
+ rt2x00_set_field8(&bbp_val, BBP4_BANDWIDTH, 2 * is_ht40);
+ rt2800_bbp_write(rt2x00dev, 4, bbp_val);
+ usleep_range(100, 200);
+ }
+
+ rt2800_bbp_read(rt2x00dev, 21, &bbp_val);
+ bbp_val &= (~0x1);
+ rt2800_bbp_write(rt2x00dev, 21, bbp_val);
+ usleep_range(100, 200);
+}
+
+static int rt2800_rf_lp_config(struct rt2x00_dev *rt2x00dev, bool btxcal)
+{
+ u8 rf_val;
+
+ if (btxcal)
+ rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x04);
+ else
+ rt2800_register_write(rt2x00dev, RF_CONTROL0, 0x02);
+
+ rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x06);
+
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 17, &rf_val);
+ rf_val |= 0x80;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, rf_val);
+
+ if (btxcal) {
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0xC1);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0x20);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x02);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 3, &rf_val);
+ rf_val &= (~0x3F);
+ rf_val |= 0x3F;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 3, rf_val);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 4, &rf_val);
+ rf_val &= (~0x3F);
+ rf_val |= 0x3F;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, rf_val);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 5, 0x31);
+ } else {
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0xF1);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0x18);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x02);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 3, &rf_val);
+ rf_val &= (~0x3F);
+ rf_val |= 0x34;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 3, rf_val);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 4, &rf_val);
+ rf_val &= (~0x3F);
+ rf_val |= 0x34;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, rf_val);
+ }
+
+ return 0;
+}
+
+static char rt2800_lp_tx_filter_bw_cal(struct rt2x00_dev *rt2x00dev)
+{
+ unsigned int cnt;
+ u8 bbp_val;
+ char cal_val;
+
+ rt2800_bbp_dcoc_write(rt2x00dev, 0, 0x82);
+
+ cnt = 0;
+ do {
+ usleep_range(500, 2000);
+ rt2800_bbp_read(rt2x00dev, 159, &bbp_val);
+ if (bbp_val == 0x02 || cnt == 20)
+ break;
+
+ cnt++;
+ } while (cnt < 20);
+
+ rt2800_bbp_dcoc_read(rt2x00dev, 0x39, &bbp_val);
+ cal_val = bbp_val & 0x7F;
+ if (cal_val >= 0x40)
+ cal_val -= 128;
+
+ return cal_val;
+}
+
+static void rt2800_bw_filter_calibration(struct rt2x00_dev *rt2x00dev,
+ bool btxcal)
+{
+ struct rt2800_drv_data *drv_data = rt2x00dev->drv_data;
+ u8 tx_agc_fc = 0, rx_agc_fc = 0, cmm_agc_fc;
+ u8 filter_target;
+ u8 tx_filter_target_20m = 0x09, tx_filter_target_40m = 0x02;
+ u8 rx_filter_target_20m = 0x27, rx_filter_target_40m = 0x31;
+ int loop = 0, is_ht40, cnt;
+ u8 bbp_val, rf_val;
+ char cal_r32_init, cal_r32_val, cal_diff;
+ u8 saverfb5r00, saverfb5r01, saverfb5r03, saverfb5r04, saverfb5r05;
+ u8 saverfb5r06, saverfb5r07;
+ u8 saverfb5r08, saverfb5r17, saverfb5r18, saverfb5r19, saverfb5r20;
+ u8 saverfb5r37, saverfb5r38, saverfb5r39, saverfb5r40, saverfb5r41;
+ u8 saverfb5r42, saverfb5r43, saverfb5r44, saverfb5r45, saverfb5r46;
+ u8 saverfb5r58, saverfb5r59;
+ u8 savebbp159r0, savebbp159r2, savebbpr23;
+ u32 MAC_RF_CONTROL0, MAC_RF_BYPASS0;
+
+ /* Save MAC registers */
+ rt2800_register_read(rt2x00dev, RF_CONTROL0, &MAC_RF_CONTROL0);
+ rt2800_register_read(rt2x00dev, RF_BYPASS0, &MAC_RF_BYPASS0);
+
+ /* save BBP registers */
+ rt2800_bbp_read(rt2x00dev, 23, &savebbpr23);
+
+ rt2800_bbp_dcoc_read(rt2x00dev, 0, &savebbp159r0);
+ rt2800_bbp_dcoc_read(rt2x00dev, 2, &savebbp159r2);
+
+ /* Save RF registers */
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 0, &saverfb5r00);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 1, &saverfb5r01);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 3, &saverfb5r03);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 4, &saverfb5r04);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 5, &saverfb5r05);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 6, &saverfb5r06);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 7, &saverfb5r07);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 8, &saverfb5r08);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 17, &saverfb5r17);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 18, &saverfb5r18);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 19, &saverfb5r19);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 20, &saverfb5r20);
+
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 37, &saverfb5r37);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 38, &saverfb5r38);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 39, &saverfb5r39);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 40, &saverfb5r40);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 41, &saverfb5r41);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 42, &saverfb5r42);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 43, &saverfb5r43);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 44, &saverfb5r44);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 45, &saverfb5r45);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 46, &saverfb5r46);
+
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 58, &saverfb5r58);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 59, &saverfb5r59);
+
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 0, &rf_val);
+ rf_val |= 0x3;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 0, rf_val);
+
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 1, &rf_val);
+ rf_val |= 0x1;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, rf_val);
+
+ cnt = 0;
+ do {
+ usleep_range(500, 2000);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 1, &rf_val);
+ if (((rf_val & 0x1) == 0x00) || (cnt == 40))
+ break;
+ cnt++;
+ } while (cnt < 40);
+
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 0, &rf_val);
+ rf_val &= (~0x3);
+ rf_val |= 0x1;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 0, rf_val);
+
+ /* I-3 */
+ rt2800_bbp_read(rt2x00dev, 23, &bbp_val);
+ bbp_val &= (~0x1F);
+ bbp_val |= 0x10;
+ rt2800_bbp_write(rt2x00dev, 23, bbp_val);
+
+ do {
+ /* I-4,5,6,7,8,9 */
+ if (loop == 0) {
+ is_ht40 = false;
+
+ if (btxcal)
+ filter_target = tx_filter_target_20m;
+ else
+ filter_target = rx_filter_target_20m;
+ } else {
+ is_ht40 = true;
+
+ if (btxcal)
+ filter_target = tx_filter_target_40m;
+ else
+ filter_target = rx_filter_target_40m;
+ }
+
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 8, &rf_val);
+ rf_val &= (~0x04);
+ if (loop == 1)
+ rf_val |= 0x4;
+
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 8, rf_val);
+
+ rt2800_bbp_core_soft_reset(rt2x00dev, true, is_ht40);
+
+ rt2800_rf_lp_config(rt2x00dev, btxcal);
+ if (btxcal) {
+ tx_agc_fc = 0;
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 58, &rf_val);
+ rf_val &= (~0x7F);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 58, rf_val);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 59, &rf_val);
+ rf_val &= (~0x7F);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 59, rf_val);
+ } else {
+ rx_agc_fc = 0;
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 6, &rf_val);
+ rf_val &= (~0x7F);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 6, rf_val);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 7, &rf_val);
+ rf_val &= (~0x7F);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 7, rf_val);
+ }
+
+ usleep_range(1000, 2000);
+
+ rt2800_bbp_dcoc_read(rt2x00dev, 2, &bbp_val);
+ bbp_val &= (~0x6);
+ rt2800_bbp_dcoc_write(rt2x00dev, 2, bbp_val);
+
+ rt2800_bbp_core_soft_reset(rt2x00dev, false, is_ht40);
+
+ cal_r32_init = rt2800_lp_tx_filter_bw_cal(rt2x00dev);
+
+ rt2800_bbp_dcoc_read(rt2x00dev, 2, &bbp_val);
+ bbp_val |= 0x6;
+ rt2800_bbp_dcoc_write(rt2x00dev, 2, bbp_val);
+do_cal:
+ if (btxcal) {
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 58, &rf_val);
+ rf_val &= (~0x7F);
+ rf_val |= tx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 58, rf_val);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 59, &rf_val);
+ rf_val &= (~0x7F);
+ rf_val |= tx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 59, rf_val);
+ } else {
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 6, &rf_val);
+ rf_val &= (~0x7F);
+ rf_val |= rx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 6, rf_val);
+ rt2800_rfcsr_read_bank(rt2x00dev, 5, 7, &rf_val);
+ rf_val &= (~0x7F);
+ rf_val |= rx_agc_fc;
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 7, rf_val);
+ }
+
+ usleep_range(500, 1000);
+
+ rt2800_bbp_core_soft_reset(rt2x00dev, false, is_ht40);
+
+ cal_r32_val = rt2800_lp_tx_filter_bw_cal(rt2x00dev);
+
+ cal_diff = cal_r32_init - cal_r32_val;
+
+ if (btxcal)
+ cmm_agc_fc = tx_agc_fc;
+ else
+ cmm_agc_fc = rx_agc_fc;
+
+ if (((cal_diff > filter_target) && (cmm_agc_fc == 0)) ||
+ ((cal_diff < filter_target) && (cmm_agc_fc == 0x3f))) {
+ if (btxcal)
+ tx_agc_fc = 0;
+ else
+ rx_agc_fc = 0;
+ } else if ((cal_diff <= filter_target) && (cmm_agc_fc < 0x3f)) {
+ if (btxcal)
+ tx_agc_fc++;
+ else
+ rx_agc_fc++;
+ goto do_cal;
+ }
+
+ if (btxcal) {
+ if (loop == 0)
+ drv_data->tx_calibration_bw20 = tx_agc_fc;
+ else
+ drv_data->tx_calibration_bw40 = tx_agc_fc;
+ } else {
+ if (loop == 0)
+ drv_data->rx_calibration_bw20 = rx_agc_fc;
+ else
+ drv_data->rx_calibration_bw40 = rx_agc_fc;
+ }
+
+ loop++;
+ } while (loop <= 1);
+
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 0, saverfb5r00);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, saverfb5r01);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 3, saverfb5r03);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r04);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 5, saverfb5r05);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 6, saverfb5r06);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 7, saverfb5r07);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 8, saverfb5r08);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, saverfb5r17);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, saverfb5r18);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, saverfb5r19);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, saverfb5r20);
+
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 37, saverfb5r37);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 38, saverfb5r38);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 39, saverfb5r39);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 40, saverfb5r40);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 41, saverfb5r41);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 42, saverfb5r42);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 43, saverfb5r43);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 44, saverfb5r44);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 45, saverfb5r45);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 46, saverfb5r46);
+
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 58, saverfb5r58);
+ rt2800_rfcsr_write_bank(rt2x00dev, 5, 59, saverfb5r59);
+
+ rt2800_bbp_write(rt2x00dev, 23, savebbpr23);
+
+ rt2800_bbp_dcoc_write(rt2x00dev, 0, savebbp159r0);
+ rt2800_bbp_dcoc_write(rt2x00dev, 2, savebbp159r2);
+
+ rt2800_bbp_read(rt2x00dev, 4, &bbp_val);
+ rt2x00_set_field8(&bbp_val, BBP4_BANDWIDTH,
+ 2 * test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags));
+ rt2800_bbp_write(rt2x00dev, 4, bbp_val);
+
+ rt2800_register_write(rt2x00dev, RF_CONTROL0, MAC_RF_CONTROL0);
+ rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0);
+}
+
+static void rt2800_init_rfcsr_6352(struct rt2x00_dev *rt2x00dev)
+{
+ /* Initialize RF central register to default value */
+ rt2800_rfcsr_write(rt2x00dev, 0, 0x02);
+ rt2800_rfcsr_write(rt2x00dev, 1, 0x03);
+ rt2800_rfcsr_write(rt2x00dev, 2, 0x33);
+ rt2800_rfcsr_write(rt2x00dev, 3, 0xFF);
+ rt2800_rfcsr_write(rt2x00dev, 4, 0x0C);
+ rt2800_rfcsr_write(rt2x00dev, 5, 0x40);
+ rt2800_rfcsr_write(rt2x00dev, 6, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 8, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 9, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 10, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 11, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 12, rt2x00dev->freq_offset);
+ rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 14, 0x40);
+ rt2800_rfcsr_write(rt2x00dev, 15, 0x22);
+ rt2800_rfcsr_write(rt2x00dev, 16, 0x4C);
+ rt2800_rfcsr_write(rt2x00dev, 17, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 18, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 19, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 20, 0xA0);
+ rt2800_rfcsr_write(rt2x00dev, 21, 0x12);
+ rt2800_rfcsr_write(rt2x00dev, 22, 0x07);
+ rt2800_rfcsr_write(rt2x00dev, 23, 0x13);
+ rt2800_rfcsr_write(rt2x00dev, 24, 0xFE);
+ rt2800_rfcsr_write(rt2x00dev, 25, 0x24);
+ rt2800_rfcsr_write(rt2x00dev, 26, 0x7A);
+ rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 29, 0x05);
+ rt2800_rfcsr_write(rt2x00dev, 30, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 31, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 32, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 34, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 35, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 36, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 37, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 38, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 39, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 40, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 41, 0xD0);
+ rt2800_rfcsr_write(rt2x00dev, 42, 0x5B);
+ rt2800_rfcsr_write(rt2x00dev, 43, 0x00);
+
+ rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
+ if (rt2800_clk_is_20mhz(rt2x00dev))
+ rt2800_rfcsr_write(rt2x00dev, 13, 0x03);
+ else
+ rt2800_rfcsr_write(rt2x00dev, 13, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 14, 0x7C);
+ rt2800_rfcsr_write(rt2x00dev, 16, 0x80);
+ rt2800_rfcsr_write(rt2x00dev, 17, 0x99);
+ rt2800_rfcsr_write(rt2x00dev, 18, 0x99);
+ rt2800_rfcsr_write(rt2x00dev, 19, 0x09);
+ rt2800_rfcsr_write(rt2x00dev, 20, 0x50);
+ rt2800_rfcsr_write(rt2x00dev, 21, 0xB0);
+ rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 23, 0x06);
+ rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 25, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 26, 0x5D);
+ rt2800_rfcsr_write(rt2x00dev, 27, 0x00);
+ rt2800_rfcsr_write(rt2x00dev, 28, 0x61);
+ rt2800_rfcsr_write(rt2x00dev, 29, 0xB5);
+ rt2800_rfcsr_write(rt2x00dev, 43, 0x02);
+
+ rt2800_rfcsr_write(rt2x00dev, 28, 0x62);
+ rt2800_rfcsr_write(rt2x00dev, 29, 0xAD);
+ rt2800_rfcsr_write(rt2x00dev, 39, 0x80);
+
+ /* Initialize RF channel register to default value */
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 0, 0x03);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 1, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 2, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 3, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 4, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 5, 0x08);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 6, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 7, 0x51);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x53);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x16);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x61);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 12, 0x22);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 13, 0x3D);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 15, 0x13);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 16, 0x22);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x02);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x01);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x52);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 22, 0x80);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 23, 0xB3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 24, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 25, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 26, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 27, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x5C);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0x6B);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 30, 0x6B);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 31, 0x31);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x5D);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 33, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xE6);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 35, 0x55);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 37, 0xBB);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 39, 0xB3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 40, 0x03);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 41, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 42, 0x00);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xB3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xD3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x07);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x68);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xEF);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1C);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x07);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xA8);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0x85);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x10);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x07);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6A);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0x85);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x10);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 62, 0x1C);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 63, 0x00);
+
+ rt2800_rfcsr_write_bank(rt2x00dev, 6, 45, 0xC5);
+
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x47);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x71);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x33);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x0E);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x23);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA4);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 20, 0x02);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 21, 0x12);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x1C);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 29, 0xEB);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 32, 0x7D);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 34, 0xD6);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 36, 0x08);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 38, 0xB4);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xB3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xD5);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x69);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFF);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x20);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xFF);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x1C);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x20);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xF7);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x09);
+
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 10, 0x51);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x06);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 19, 0xA7);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 28, 0x2C);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x64);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 8, 0x51);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 9, 0x36);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 11, 0x53);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x16);
+
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x6C);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xFC);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x1F);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x66);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0x6B);
+
+ /* Initialize RF channel register for DRQFN */
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0xD3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0xE3);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0xE5);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0x28);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0x68);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xF7);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x02);
+ rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xC7);
+
+ /* Initialize RF DC calibration register to default value */
+ rt2800_rfcsr_write_dccal(rt2x00dev, 0, 0x47);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 1, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 2, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 6, 0x10);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 7, 0x10);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 8, 0x04);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 9, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 10, 0x07);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 11, 0x01);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 12, 0x07);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 13, 0x07);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 14, 0x07);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 15, 0x20);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 16, 0x22);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 18, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 19, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 20, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 21, 0xF1);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 22, 0x11);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 23, 0x02);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 24, 0x41);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 25, 0x20);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 26, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 27, 0xD7);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 28, 0xA2);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 29, 0x20);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 30, 0x49);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 31, 0x20);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 32, 0x04);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 33, 0xF1);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 34, 0xA1);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 35, 0x01);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 41, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 42, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 43, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 44, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 45, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 46, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 47, 0x3E);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 48, 0x3D);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 49, 0x3E);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 50, 0x3D);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 51, 0x3E);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 52, 0x3D);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 53, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 54, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 55, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 56, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 57, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 58, 0x10);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 59, 0x10);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 60, 0x0A);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 61, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 62, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 63, 0x00);
+
+ rt2800_rfcsr_write_dccal(rt2x00dev, 3, 0x08);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 4, 0x04);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x20);
+
+ rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
+ rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
+
+ rt2800_bw_filter_calibration(rt2x00dev, true);
+ rt2800_bw_filter_calibration(rt2x00dev, false);
+}
+
static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
{
if (rt2800_is_305x_soc(rt2x00dev)) {
case RT5592:
rt2800_init_rfcsr_5592(rt2x00dev);
break;
+ case RT6352:
+ rt2800_init_rfcsr_6352(rt2x00dev);
+ break;
}
}
*/
if (rt2x00_rt(rt2x00dev, RT3290) ||
rt2x00_rt(rt2x00dev, RT5390) ||
- rt2x00_rt(rt2x00dev, RT5392))
+ rt2x00_rt(rt2x00dev, RT5392) ||
+ rt2x00_rt(rt2x00dev, RT6352))
rt2800_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &rf);
else if (rt2x00_rt(rt2x00dev, RT3352))
rf = RF3322;
case RF5390:
case RF5392:
case RF5592:
+ case RF7620:
break;
default:
rt2x00_err(rt2x00dev, "Invalid RF chipset 0x%04x detected\n",
{196, 83, 0, 12, 1},
};
+static const struct rf_channel rf_vals_7620[] = {
+ {1, 0x50, 0x99, 0x99, 1},
+ {2, 0x50, 0x44, 0x44, 2},
+ {3, 0x50, 0xEE, 0xEE, 2},
+ {4, 0x50, 0x99, 0x99, 3},
+ {5, 0x51, 0x44, 0x44, 0},
+ {6, 0x51, 0xEE, 0xEE, 0},
+ {7, 0x51, 0x99, 0x99, 1},
+ {8, 0x51, 0x44, 0x44, 2},
+ {9, 0x51, 0xEE, 0xEE, 2},
+ {10, 0x51, 0x99, 0x99, 3},
+ {11, 0x52, 0x44, 0x44, 0},
+ {12, 0x52, 0xEE, 0xEE, 0},
+ {13, 0x52, 0x99, 0x99, 1},
+ {14, 0x52, 0x33, 0x33, 3},
+};
+
static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
{
struct hw_mode_spec *spec = &rt2x00dev->spec;
spec->channels = rf_vals_3x;
break;
+ case RF7620:
+ spec->num_channels = ARRAY_SIZE(rf_vals_7620);
+ spec->channels = rf_vals_7620;
+ break;
+
case RF3052:
case RF3053:
spec->num_channels = ARRAY_SIZE(rf_vals_3x);
case RF5390:
case RF5392:
case RF5592:
+ case RF7620:
__set_bit(CAPABILITY_VCO_RECALIBRATION, &rt2x00dev->cap_flags);
break;
}
return -ENODEV;
}
+ if (rt == RT5390 && rt2x00_is_soc(rt2x00dev))
+ rt = RT6352;
+
rt2x00_set_rt(rt2x00dev, rt, rev);
return 0;
#ifndef RT2800LIB_H
#define RT2800LIB_H
+/*
+ * Hardware has 255 WCID table entries. First 32 entries are reserved for
+ * shared keys. Since parts of the pairwise key table might be shared with
+ * the beacon frame buffers 6 & 7 we could only use the first 222 entries.
+ */
+#define WCID_START 33
+#define WCID_END 222
+#define STA_IDS_SIZE (WCID_END - WCID_START + 2)
+
+/* RT2800 driver data structure */
+struct rt2800_drv_data {
+ u8 calibration_bw20;
+ u8 calibration_bw40;
+ char rx_calibration_bw20;
+ char rx_calibration_bw40;
+ char tx_calibration_bw20;
+ char tx_calibration_bw40;
+ u8 bbp25;
+ u8 bbp26;
+ u8 txmixer_gain_24g;
+ u8 txmixer_gain_5g;
+ u8 max_psdu;
+ unsigned int tbtt_tick;
+ unsigned int ampdu_factor_cnt[4];
+ DECLARE_BITMAP(sta_ids, STA_IDS_SIZE);
+ struct ieee80211_sta *wcid_to_sta[STA_IDS_SIZE];
+};
+
struct rt2800_ops {
void (*register_read)(struct rt2x00_dev *rt2x00dev,
const unsigned int offset, u32 *value);
struct txentry_desc *txdesc);
void rt2800_process_rxwi(struct queue_entry *entry, struct rxdone_entry_desc *txdesc);
-void rt2800_txdone_entry(struct queue_entry *entry, u32 status, __le32* txwi);
+void rt2800_txdone_entry(struct queue_entry *entry, u32 status, __le32 *txwi,
+ bool match);
void rt2800_write_beacon(struct queue_entry *entry, struct txentry_desc *txdesc);
void rt2800_clear_beacon(struct queue_entry *entry);
{
if (test_bit(ENTRY_DATA_STATUS_SET, &entry->flags)) {
rt2800_txdone_entry(entry, entry->status,
- rt2800mmio_get_txwi(entry));
+ rt2800mmio_get_txwi(entry), true);
return false;
}
/*
* TX control handlers
*/
-static enum txdone_entry_desc_flags
-rt2800usb_txdone_entry_check(struct queue_entry *entry, u32 reg)
+static bool rt2800usb_txdone_entry_check(struct queue_entry *entry, u32 reg)
{
__le32 *txwi;
u32 word;
* frame.
*/
if (test_bit(ENTRY_DATA_IO_FAILED, &entry->flags))
- return TXDONE_FAILURE;
+ return false;
wcid = rt2x00_get_field32(reg, TX_STA_FIFO_WCID);
ack = rt2x00_get_field32(reg, TX_STA_FIFO_TX_ACK_REQUIRED);
rt2x00_dbg(entry->queue->rt2x00dev,
"TX status report missed for queue %d entry %d\n",
entry->queue->qid, entry->entry_idx);
- return TXDONE_UNKNOWN;
+ return false;
}
- return TXDONE_SUCCESS;
+ return true;
}
static void rt2800usb_txdone(struct rt2x00_dev *rt2x00dev)
struct queue_entry *entry;
u32 reg;
u8 qid;
- enum txdone_entry_desc_flags done_status;
+ bool match;
while (kfifo_get(&rt2x00dev->txstatus_fifo, ®)) {
/*
break;
}
- done_status = rt2800usb_txdone_entry_check(entry, reg);
- if (likely(done_status == TXDONE_SUCCESS))
- rt2800_txdone_entry(entry, reg, rt2800usb_get_txwi(entry));
- else
- rt2x00lib_txdone_noinfo(entry, done_status);
+ match = rt2800usb_txdone_entry_check(entry, reg);
+ rt2800_txdone_entry(entry, reg, rt2800usb_get_txwi(entry), match);
}
}
#define RT5390 0x5390 /* 2.4GHz */
#define RT5392 0x5392 /* 2.4GHz */
#define RT5592 0x5592
+#define RT6352 0x6352 /* WSOC 2.4GHz */
u16 rf;
u16 rev;
* rt2x00debug_dump_frame - Dump a frame to userspace through debugfs.
* @rt2x00dev: Pointer to &struct rt2x00_dev.
* @type: The type of frame that is being dumped.
- * @skb: The skb containing the frame to be dumped.
+ * @entry: The queue entry containing the frame to be dumped.
*/
#ifdef CONFIG_RT2X00_LIB_DEBUGFS
void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
void rt2x00lib_dmadone(struct queue_entry *entry);
void rt2x00lib_txdone(struct queue_entry *entry,
struct txdone_entry_desc *txdesc);
+void rt2x00lib_txdone_nomatch(struct queue_entry *entry,
+ struct txdone_entry_desc *txdesc);
void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status);
void rt2x00lib_rxdone(struct queue_entry *entry, gfp_t gfp);
return ret;
}
-void rt2x00lib_txdone(struct queue_entry *entry,
- struct txdone_entry_desc *txdesc)
+static void rt2x00lib_fill_tx_status(struct rt2x00_dev *rt2x00dev,
+ struct ieee80211_tx_info *tx_info,
+ struct skb_frame_desc *skbdesc,
+ struct txdone_entry_desc *txdesc,
+ bool success)
{
- struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
- struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
- struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
- unsigned int header_length, i;
u8 rate_idx, rate_flags, retry_rates;
- u8 skbdesc_flags = skbdesc->flags;
- bool success;
-
- /*
- * Unmap the skb.
- */
- rt2x00queue_unmap_skb(entry);
-
- /*
- * Remove the extra tx headroom from the skb.
- */
- skb_pull(entry->skb, rt2x00dev->extra_tx_headroom);
-
- /*
- * Signal that the TX descriptor is no longer in the skb.
- */
- skbdesc->flags &= ~SKBDESC_DESC_IN_SKB;
-
- /*
- * Determine the length of 802.11 header.
- */
- header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
-
- /*
- * Remove L2 padding which was added during
- */
- if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_L2PAD))
- rt2x00queue_remove_l2pad(entry->skb, header_length);
-
- /*
- * If the IV/EIV data was stripped from the frame before it was
- * passed to the hardware, we should now reinsert it again because
- * mac80211 will expect the same data to be present it the
- * frame as it was passed to us.
- */
- if (rt2x00_has_cap_hw_crypto(rt2x00dev))
- rt2x00crypto_tx_insert_iv(entry->skb, header_length);
-
- /*
- * Send frame to debugfs immediately, after this call is completed
- * we are going to overwrite the skb->cb array.
- */
- rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TXDONE, entry);
-
- /*
- * Determine if the frame has been successfully transmitted and
- * remove BARs from our check list while checking for their
- * TX status.
- */
- success =
- rt2x00lib_txdone_bar_status(entry) ||
- test_bit(TXDONE_SUCCESS, &txdesc->flags) ||
- test_bit(TXDONE_UNKNOWN, &txdesc->flags);
-
- /*
- * Update TX statistics.
- */
- rt2x00dev->link.qual.tx_success += success;
- rt2x00dev->link.qual.tx_failed += !success;
+ int i;
rate_idx = skbdesc->tx_rate_idx;
rate_flags = skbdesc->tx_rate_flags;
if (i < (IEEE80211_TX_MAX_RATES - 1))
tx_info->status.rates[i].idx = -1; /* terminate */
+ if (test_bit(TXDONE_NO_ACK_REQ, &txdesc->flags))
+ tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
+
if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) {
if (success)
tx_info->flags |= IEEE80211_TX_STAT_ACK;
*/
if (test_bit(TXDONE_AMPDU, &txdesc->flags) ||
tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
- tx_info->flags |= IEEE80211_TX_STAT_AMPDU;
+ tx_info->flags |= IEEE80211_TX_STAT_AMPDU |
+ IEEE80211_TX_CTL_AMPDU;
tx_info->status.ampdu_len = 1;
tx_info->status.ampdu_ack_len = success ? 1 : 0;
else
rt2x00dev->low_level_stats.dot11RTSFailureCount++;
}
+}
- /*
- * Only send the status report to mac80211 when it's a frame
- * that originated in mac80211. If this was a extra frame coming
- * through a mac80211 library call (RTS/CTS) then we should not
- * send the status report back.
- */
- if (!(skbdesc_flags & SKBDESC_NOT_MAC80211)) {
- if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_TASKLET_CONTEXT))
- ieee80211_tx_status(rt2x00dev->hw, entry->skb);
- else
- ieee80211_tx_status_ni(rt2x00dev->hw, entry->skb);
- } else
- dev_kfree_skb_any(entry->skb);
-
+static void rt2x00lib_clear_entry(struct rt2x00_dev *rt2x00dev,
+ struct queue_entry *entry)
+{
/*
* Make this entry available for reuse.
*/
rt2x00queue_unpause_queue(entry->queue);
spin_unlock_bh(&entry->queue->tx_lock);
}
+
+void rt2x00lib_txdone_nomatch(struct queue_entry *entry,
+ struct txdone_entry_desc *txdesc)
+{
+ struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
+ struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
+ struct ieee80211_tx_info txinfo = {};
+ bool success;
+
+ /*
+ * Unmap the skb.
+ */
+ rt2x00queue_unmap_skb(entry);
+
+ /*
+ * Signal that the TX descriptor is no longer in the skb.
+ */
+ skbdesc->flags &= ~SKBDESC_DESC_IN_SKB;
+
+ /*
+ * Send frame to debugfs immediately, after this call is completed
+ * we are going to overwrite the skb->cb array.
+ */
+ rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TXDONE, entry);
+
+ /*
+ * Determine if the frame has been successfully transmitted and
+ * remove BARs from our check list while checking for their
+ * TX status.
+ */
+ success =
+ rt2x00lib_txdone_bar_status(entry) ||
+ test_bit(TXDONE_SUCCESS, &txdesc->flags);
+
+ if (!test_bit(TXDONE_UNKNOWN, &txdesc->flags)) {
+ /*
+ * Update TX statistics.
+ */
+ rt2x00dev->link.qual.tx_success += success;
+ rt2x00dev->link.qual.tx_failed += !success;
+
+ rt2x00lib_fill_tx_status(rt2x00dev, &txinfo, skbdesc, txdesc,
+ success);
+ ieee80211_tx_status_noskb(rt2x00dev->hw, skbdesc->sta, &txinfo);
+ }
+
+ dev_kfree_skb_any(entry->skb);
+ rt2x00lib_clear_entry(rt2x00dev, entry);
+}
+EXPORT_SYMBOL_GPL(rt2x00lib_txdone_nomatch);
+
+void rt2x00lib_txdone(struct queue_entry *entry,
+ struct txdone_entry_desc *txdesc)
+{
+ struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
+ struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
+ struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
+ u8 skbdesc_flags = skbdesc->flags;
+ unsigned int header_length;
+ bool success;
+
+ /*
+ * Unmap the skb.
+ */
+ rt2x00queue_unmap_skb(entry);
+
+ /*
+ * Remove the extra tx headroom from the skb.
+ */
+ skb_pull(entry->skb, rt2x00dev->extra_tx_headroom);
+
+ /*
+ * Signal that the TX descriptor is no longer in the skb.
+ */
+ skbdesc->flags &= ~SKBDESC_DESC_IN_SKB;
+
+ /*
+ * Determine the length of 802.11 header.
+ */
+ header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
+
+ /*
+ * Remove L2 padding which was added during
+ */
+ if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_L2PAD))
+ rt2x00queue_remove_l2pad(entry->skb, header_length);
+
+ /*
+ * If the IV/EIV data was stripped from the frame before it was
+ * passed to the hardware, we should now reinsert it again because
+ * mac80211 will expect the same data to be present it the
+ * frame as it was passed to us.
+ */
+ if (rt2x00_has_cap_hw_crypto(rt2x00dev))
+ rt2x00crypto_tx_insert_iv(entry->skb, header_length);
+
+ /*
+ * Send frame to debugfs immediately, after this call is completed
+ * we are going to overwrite the skb->cb array.
+ */
+ rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TXDONE, entry);
+
+ /*
+ * Determine if the frame has been successfully transmitted and
+ * remove BARs from our check list while checking for their
+ * TX status.
+ */
+ success =
+ rt2x00lib_txdone_bar_status(entry) ||
+ test_bit(TXDONE_SUCCESS, &txdesc->flags) ||
+ test_bit(TXDONE_UNKNOWN, &txdesc->flags);
+
+ /*
+ * Update TX statistics.
+ */
+ rt2x00dev->link.qual.tx_success += success;
+ rt2x00dev->link.qual.tx_failed += !success;
+
+ rt2x00lib_fill_tx_status(rt2x00dev, tx_info, skbdesc, txdesc, success);
+
+ /*
+ * Only send the status report to mac80211 when it's a frame
+ * that originated in mac80211. If this was a extra frame coming
+ * through a mac80211 library call (RTS/CTS) then we should not
+ * send the status report back.
+ */
+ if (!(skbdesc_flags & SKBDESC_NOT_MAC80211)) {
+ if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_TASKLET_CONTEXT))
+ ieee80211_tx_status(rt2x00dev->hw, entry->skb);
+ else
+ ieee80211_tx_status_ni(rt2x00dev->hw, entry->skb);
+ } else {
+ dev_kfree_skb_any(entry->skb);
+ }
+
+ rt2x00lib_clear_entry(rt2x00dev, entry);
+}
EXPORT_SYMBOL_GPL(rt2x00lib_txdone);
void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status)
/*
* Determine IFS values
- * - Use TXOP_BACKOFF for management frames except beacons
+ * - Use TXOP_BACKOFF for probe and management frames except beacons
* - Use TXOP_SIFS for fragment bursts
* - Use TXOP_HTTXOP for everything else
*
* Note: rt2800 devices won't use CTS protection (if used)
* for frames not transmitted with TXOP_HTTXOP
*/
- if (ieee80211_is_mgmt(hdr->frame_control) &&
- !ieee80211_is_beacon(hdr->frame_control))
+ if ((ieee80211_is_mgmt(hdr->frame_control) &&
+ !ieee80211_is_beacon(hdr->frame_control)) ||
+ (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
txdesc->u.ht.txop = TXOP_BACKOFF;
else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
txdesc->u.ht.txop = TXOP_SIFS;
* of the scope of the skb->data pointer.
* @iv: IV/EIV data used during encryption/decryption.
* @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
- * @entry: The entry to which this sk buffer belongs.
+ * @sta: The station where sk buffer was sent.
*/
struct skb_frame_desc {
u8 flags;
__le32 iv[2];
dma_addr_t skb_dma;
+ struct ieee80211_sta *sta;
};
/**
TXDONE_FAILURE,
TXDONE_EXCESSIVE_RETRY,
TXDONE_AMPDU,
+ TXDONE_NO_ACK_REQ,
};
/**
(7 << 13 /* RX FIFO threshold NONE */) |
(7 << 10 /* MAX RX DMA */) |
RTL818X_RX_CONF_RX_AUTORESETPHY |
- RTL818X_RX_CONF_ONLYERLPKT |
- RTL818X_RX_CONF_MULTICAST;
+ RTL818X_RX_CONF_ONLYERLPKT;
priv->rx_conf = reg;
rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
priv->rx_conf ^= RTL818X_RX_CONF_FCS;
if (changed_flags & FIF_CONTROL)
priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
- if (changed_flags & FIF_OTHER_BSS)
- priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
- if (*total_flags & FIF_ALLMULTI || multicast > 0)
- priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
+ if (*total_flags & FIF_OTHER_BSS ||
+ *total_flags & FIF_ALLMULTI || multicast > 0)
+ priv->rx_conf |= RTL818X_RX_CONF_MONITOR;
else
- priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
+ priv->rx_conf &= ~RTL818X_RX_CONF_MONITOR;
*total_flags = 0;
*total_flags |= FIF_FCSFAIL;
if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
*total_flags |= FIF_CONTROL;
- if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
+ if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) {
*total_flags |= FIF_OTHER_BSS;
- if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
*total_flags |= FIF_ALLMULTI;
+ }
rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
}
static struct coex_sta_8192e_2ant glcoex_sta_8192e_2ant;
static struct coex_sta_8192e_2ant *coex_sta = &glcoex_sta_8192e_2ant;
-static const char *const GLBtInfoSrc8192e2Ant[] = {
+static const char *const glbt_info_src_8192e_2ant[] = {
"BT Info[wifi fw]",
"BT Info[bt rsp]",
"BT Info[bt auto report]",
* local function proto type if needed
**************************************************************/
/**************************************************************
- * local function start with halbtc8192e2ant_
+ * local function start with btc8192e2ant_
**************************************************************/
-static u8 halbtc8192e2ant_btrssi_state(struct btc_coexist *btcoexist,
- u8 level_num, u8 rssi_thresh,
- u8 rssi_thresh1)
+static u8 btc8192e2ant_bt_rssi_state(struct btc_coexist *btcoexist,
+ u8 level_num, u8 rssi_thresh,
+ u8 rssi_thresh1)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- int btrssi = 0;
- u8 btrssi_state = coex_sta->pre_bt_rssi_state;
+ int bt_rssi = 0;
+ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
- btrssi = coex_sta->bt_rssi;
+ bt_rssi = coex_sta->bt_rssi;
if (level_num == 2) {
if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
(coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- if (btrssi >=
+ if (bt_rssi >=
(rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
- btrssi_state = BTC_RSSI_STATE_HIGH;
+ bt_rssi_state = BTC_RSSI_STATE_HIGH;
else
- btrssi_state = BTC_RSSI_STATE_STAY_LOW;
+ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
} else {
- if (btrssi < rssi_thresh)
- btrssi_state = BTC_RSSI_STATE_LOW;
+ if (bt_rssi < rssi_thresh)
+ bt_rssi_state = BTC_RSSI_STATE_LOW;
else
- btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
+ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
}
} else if (level_num == 3) {
if (rssi_thresh > rssi_thresh1) {
"[BTCoex], BT Rssi thresh error!!\n");
return coex_sta->pre_bt_rssi_state;
}
+
if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
(coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- if (btrssi >=
+ if (bt_rssi >=
(rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
- btrssi_state = BTC_RSSI_STATE_MEDIUM;
+ bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
else
- btrssi_state = BTC_RSSI_STATE_STAY_LOW;
+ bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
} else if ((coex_sta->pre_bt_rssi_state ==
BTC_RSSI_STATE_MEDIUM) ||
(coex_sta->pre_bt_rssi_state ==
BTC_RSSI_STATE_STAY_MEDIUM)) {
- if (btrssi >= (rssi_thresh1 +
+ if (bt_rssi >= (rssi_thresh1 +
BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
- btrssi_state = BTC_RSSI_STATE_HIGH;
- else if (btrssi < rssi_thresh)
- btrssi_state = BTC_RSSI_STATE_LOW;
+ bt_rssi_state = BTC_RSSI_STATE_HIGH;
+ else if (bt_rssi < rssi_thresh)
+ bt_rssi_state = BTC_RSSI_STATE_LOW;
else
- btrssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
+ bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
} else {
- if (btrssi < rssi_thresh1)
- btrssi_state = BTC_RSSI_STATE_MEDIUM;
+ if (bt_rssi < rssi_thresh1)
+ bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
else
- btrssi_state = BTC_RSSI_STATE_STAY_HIGH;
+ bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
}
}
- coex_sta->pre_bt_rssi_state = btrssi_state;
+ coex_sta->pre_bt_rssi_state = bt_rssi_state;
- return btrssi_state;
+ return bt_rssi_state;
}
-static u8 halbtc8192e2ant_wifirssi_state(struct btc_coexist *btcoexist,
- u8 index, u8 level_num, u8 rssi_thresh,
- u8 rssi_thresh1)
+static u8 btc8192e2ant_wifi_rssi_state(struct btc_coexist *btcoexist,
+ u8 index, u8 level_num, u8 rssi_thresh,
+ u8 rssi_thresh1)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- int wifirssi = 0;
- u8 wifirssi_state = coex_sta->pre_wifi_rssi_state[index];
+ int wifi_rssi = 0;
+ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
- btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
+ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
if (level_num == 2) {
if ((coex_sta->pre_wifi_rssi_state[index] ==
BTC_RSSI_STATE_LOW) ||
(coex_sta->pre_wifi_rssi_state[index] ==
BTC_RSSI_STATE_STAY_LOW)) {
- if (wifirssi >= (rssi_thresh +
- BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
- wifirssi_state = BTC_RSSI_STATE_HIGH;
+ if (wifi_rssi >=
+ (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
+ wifi_rssi_state = BTC_RSSI_STATE_HIGH;
else
- wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
+ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
} else {
- if (wifirssi < rssi_thresh)
- wifirssi_state = BTC_RSSI_STATE_LOW;
+ if (wifi_rssi < rssi_thresh)
+ wifi_rssi_state = BTC_RSSI_STATE_LOW;
else
- wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
+ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
}
} else if (level_num == 3) {
if (rssi_thresh > rssi_thresh1) {
BTC_RSSI_STATE_LOW) ||
(coex_sta->pre_wifi_rssi_state[index] ==
BTC_RSSI_STATE_STAY_LOW)) {
- if (wifirssi >= (rssi_thresh +
- BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
- wifirssi_state = BTC_RSSI_STATE_MEDIUM;
+ if (wifi_rssi >=
+ (rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
+ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
else
- wifirssi_state = BTC_RSSI_STATE_STAY_LOW;
+ wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
} else if ((coex_sta->pre_wifi_rssi_state[index] ==
BTC_RSSI_STATE_MEDIUM) ||
(coex_sta->pre_wifi_rssi_state[index] ==
BTC_RSSI_STATE_STAY_MEDIUM)) {
- if (wifirssi >= (rssi_thresh1 +
+ if (wifi_rssi >= (rssi_thresh1 +
BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT))
- wifirssi_state = BTC_RSSI_STATE_HIGH;
- else if (wifirssi < rssi_thresh)
- wifirssi_state = BTC_RSSI_STATE_LOW;
+ wifi_rssi_state = BTC_RSSI_STATE_HIGH;
+ else if (wifi_rssi < rssi_thresh)
+ wifi_rssi_state = BTC_RSSI_STATE_LOW;
else
- wifirssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
+ wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
} else {
- if (wifirssi < rssi_thresh1)
- wifirssi_state = BTC_RSSI_STATE_MEDIUM;
+ if (wifi_rssi < rssi_thresh1)
+ wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
else
- wifirssi_state = BTC_RSSI_STATE_STAY_HIGH;
+ wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
}
}
- coex_sta->pre_wifi_rssi_state[index] = wifirssi_state;
+ coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
- return wifirssi_state;
+ return wifi_rssi_state;
}
-static void btc8192e2ant_monitor_bt_enable_dis(struct btc_coexist *btcoexist)
+static void btc8192e2ant_monitor_bt_enable_disable(struct btc_coexist
+ *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
static bool pre_bt_disabled;
}
}
-static u32 halbtc8192e2ant_decidera_mask(struct btc_coexist *btcoexist,
- u8 sstype, u32 ra_masktype)
+static u32 btc8192e2ant_decide_ra_mask(struct btc_coexist *btcoexist,
+ u8 ss_type, u32 ra_mask_type)
{
- u32 disra_mask = 0x0;
+ u32 dis_ra_mask = 0x0;
- switch (ra_masktype) {
+ switch (ra_mask_type) {
case 0: /* normal mode */
- if (sstype == 2)
- disra_mask = 0x0; /* enable 2ss */
+ if (ss_type == 2)
+ dis_ra_mask = 0x0; /* enable 2ss */
else
- disra_mask = 0xfff00000;/* disable 2ss */
+ dis_ra_mask = 0xfff00000; /* disable 2ss */
break;
case 1: /* disable cck 1/2 */
- if (sstype == 2)
- disra_mask = 0x00000003;/* enable 2ss */
+ if (ss_type == 2)
+ dis_ra_mask = 0x00000003; /* enable 2ss */
else
- disra_mask = 0xfff00003;/* disable 2ss */
+ dis_ra_mask = 0xfff00003; /* disable 2ss */
break;
case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
- if (sstype == 2)
- disra_mask = 0x0001f1f7;/* enable 2ss */
+ if (ss_type == 2)
+ dis_ra_mask = 0x0001f1f7; /* enable 2ss */
else
- disra_mask = 0xfff1f1f7;/* disable 2ss */
+ dis_ra_mask = 0xfff1f1f7; /* disable 2ss */
break;
default:
break;
}
- return disra_mask;
+ return dis_ra_mask;
}
-static void halbtc8192e2ant_Updatera_mask(struct btc_coexist *btcoexist,
- bool force_exec, u32 dis_ratemask)
+static void btc8192e2ant_update_ra_mask(struct btc_coexist *btcoexist,
+ bool force_exec, u32 dis_rate_mask)
{
- coex_dm->curra_mask = dis_ratemask;
+ coex_dm->cur_ra_mask = dis_rate_mask;
- if (force_exec || (coex_dm->prera_mask != coex_dm->curra_mask))
- btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
- &coex_dm->curra_mask);
- coex_dm->prera_mask = coex_dm->curra_mask;
+ if (force_exec || (coex_dm->pre_ra_mask != coex_dm->cur_ra_mask))
+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
+ &coex_dm->cur_ra_mask);
+ coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
}
-static void btc8192e2ant_autorate_fallback_retry(struct btc_coexist *btcoexist,
- bool force_exec, u8 type)
+static void btc8192e2ant_auto_rate_fallback_retry(struct btc_coexist *btcoexist,
+ bool force_exec, u8 type)
{
- bool wifi_under_bmode = false;
+ bool wifi_under_b_mode = false;
- coex_dm->cur_arfrtype = type;
+ coex_dm->cur_arfr_type = type;
- if (force_exec || (coex_dm->pre_arfrtype != coex_dm->cur_arfrtype)) {
- switch (coex_dm->cur_arfrtype) {
+ if (force_exec || (coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
+ switch (coex_dm->cur_arfr_type) {
case 0: /* normal mode */
btcoexist->btc_write_4byte(btcoexist, 0x430,
coex_dm->backup_arfr_cnt1);
case 1:
btcoexist->btc_get(btcoexist,
BTC_GET_BL_WIFI_UNDER_B_MODE,
- &wifi_under_bmode);
- if (wifi_under_bmode) {
+ &wifi_under_b_mode);
+ if (wifi_under_b_mode) {
btcoexist->btc_write_4byte(btcoexist, 0x430,
0x0);
btcoexist->btc_write_4byte(btcoexist, 0x434,
}
}
- coex_dm->pre_arfrtype = coex_dm->cur_arfrtype;
+ coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
}
-static void halbtc8192e2ant_retrylimit(struct btc_coexist *btcoexist,
- bool force_exec, u8 type)
+static void btc8192e2ant_retry_limit(struct btc_coexist *btcoexist,
+ bool force_exec, u8 type)
{
- coex_dm->cur_retrylimit_type = type;
+ coex_dm->cur_retry_limit_type = type;
- if (force_exec || (coex_dm->pre_retrylimit_type !=
- coex_dm->cur_retrylimit_type)) {
- switch (coex_dm->cur_retrylimit_type) {
+ if (force_exec || (coex_dm->pre_retry_limit_type !=
+ coex_dm->cur_retry_limit_type)) {
+ switch (coex_dm->cur_retry_limit_type) {
case 0: /* normal mode */
- btcoexist->btc_write_2byte(btcoexist, 0x42a,
- coex_dm->backup_retrylimit);
- break;
+ btcoexist->btc_write_2byte(btcoexist, 0x42a,
+ coex_dm->backup_retry_limit);
+ break;
case 1: /* retry limit = 8 */
- btcoexist->btc_write_2byte(btcoexist, 0x42a,
- 0x0808);
- break;
+ btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808);
+ break;
default:
- break;
+ break;
}
}
- coex_dm->pre_retrylimit_type = coex_dm->cur_retrylimit_type;
+ coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
}
-static void halbtc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
- bool force_exec, u8 type)
+static void btc8192e2ant_ampdu_maxtime(struct btc_coexist *btcoexist,
+ bool force_exec, u8 type)
{
- coex_dm->cur_ampdutime_type = type;
+ coex_dm->cur_ampdu_time_type = type;
- if (force_exec || (coex_dm->pre_ampdutime_type !=
- coex_dm->cur_ampdutime_type)) {
- switch (coex_dm->cur_ampdutime_type) {
+ if (force_exec || (coex_dm->pre_ampdu_time_type !=
+ coex_dm->cur_ampdu_time_type)) {
+ switch (coex_dm->cur_ampdu_time_type) {
case 0: /* normal mode */
btcoexist->btc_write_1byte(btcoexist, 0x456,
coex_dm->backup_ampdu_maxtime);
break;
- case 1: /* AMPDU timw = 0x38 * 32us */
+ case 1: /* AMPDU time = 0x38 * 32us */
btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
break;
default:
}
}
- coex_dm->pre_ampdutime_type = coex_dm->cur_ampdutime_type;
+ coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
}
-static void halbtc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
- bool force_exec, u8 ra_masktype,
- u8 arfr_type, u8 retrylimit_type,
- u8 ampdutime_type)
+static void btc8192e2ant_limited_tx(struct btc_coexist *btcoexist,
+ bool force_exec, u8 ra_mask_type,
+ u8 arfr_type, u8 retry_limit_type,
+ u8 ampdu_time_type)
{
- u32 disra_mask = 0x0;
+ u32 dis_ra_mask = 0x0;
- coex_dm->curra_masktype = ra_masktype;
- disra_mask = halbtc8192e2ant_decidera_mask(btcoexist,
- coex_dm->cur_sstype,
- ra_masktype);
- halbtc8192e2ant_Updatera_mask(btcoexist, force_exec, disra_mask);
-btc8192e2ant_autorate_fallback_retry(btcoexist, force_exec, arfr_type);
- halbtc8192e2ant_retrylimit(btcoexist, force_exec, retrylimit_type);
- halbtc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdutime_type);
+ coex_dm->cur_ra_mask_type = ra_mask_type;
+ dis_ra_mask =
+ btc8192e2ant_decide_ra_mask(btcoexist, coex_dm->cur_ss_type,
+ ra_mask_type);
+ btc8192e2ant_update_ra_mask(btcoexist, force_exec, dis_ra_mask);
+ btc8192e2ant_auto_rate_fallback_retry(btcoexist, force_exec, arfr_type);
+ btc8192e2ant_retry_limit(btcoexist, force_exec, retry_limit_type);
+ btc8192e2ant_ampdu_maxtime(btcoexist, force_exec, ampdu_time_type);
}
-static void halbtc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
- bool force_exec, bool rej_ap_agg_pkt,
- bool bt_ctrl_agg_buf_size,
- u8 agg_buf_size)
+static void btc8192e2ant_limited_rx(struct btc_coexist *btcoexist,
+ bool force_exec, bool rej_ap_agg_pkt,
+ bool bt_ctrl_agg_buf_size,
+ u8 agg_buf_size)
{
bool reject_rx_agg = rej_ap_agg_pkt;
bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
}
-static void halbtc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
+static void btc8192e2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
reg_hp_tx = u32tmp & MASKLWORD;
- reg_hp_rx = (u32tmp & MASKHWORD)>>16;
+ reg_hp_rx = (u32tmp & MASKHWORD) >> 16;
u32tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
reg_lp_tx = u32tmp & MASKLWORD;
- reg_lp_rx = (u32tmp & MASKHWORD)>>16;
+ reg_lp_rx = (u32tmp & MASKHWORD) >> 16;
coex_sta->high_priority_tx = reg_hp_tx;
coex_sta->high_priority_rx = reg_hp_rx;
btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
}
-static void halbtc8192e2ant_querybt_info(struct btc_coexist *btcoexist)
+static void btc8192e2ant_query_bt_info(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
coex_sta->c2h_bt_info_req_sent = true;
- h2c_parameter[0] |= BIT0; /* trigger */
+ h2c_parameter[0] |= BIT0; /* trigger */
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
}
-static void halbtc8192e2ant_update_btlink_info(struct btc_coexist *btcoexist)
+static void btc8192e2ant_update_bt_link_info(struct btc_coexist *btcoexist)
{
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- bool bt_hson = false;
+ bool bt_hs_on = false;
- btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
+ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
bt_link_info->sco_exist = coex_sta->sco_exist;
bt_link_info->hid_exist = coex_sta->hid_exist;
/* work around for HS mode. */
- if (bt_hson) {
+ if (bt_hs_on) {
bt_link_info->pan_exist = true;
bt_link_info->bt_link_exist = true;
}
bt_link_info->hid_only = false;
}
-static u8 halbtc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
+static u8 btc8192e2ant_action_algorithm(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
struct btc_stack_info *stack_info = &btcoexist->stack_info;
- bool bt_hson = false;
+ bool bt_hs_on = false;
u8 algorithm = BT_8192E_2ANT_COEX_ALGO_UNDEFINED;
- u8 numdiffprofile = 0;
+ u8 num_of_diff_profile = 0;
- btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
+ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
if (!bt_link_info->bt_link_exist) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
}
if (bt_link_info->sco_exist)
- numdiffprofile++;
+ num_of_diff_profile++;
if (bt_link_info->hid_exist)
- numdiffprofile++;
+ num_of_diff_profile++;
if (bt_link_info->pan_exist)
- numdiffprofile++;
+ num_of_diff_profile++;
if (bt_link_info->a2dp_exist)
- numdiffprofile++;
+ num_of_diff_profile++;
- if (numdiffprofile == 1) {
+ if (num_of_diff_profile == 1) {
if (bt_link_info->sco_exist) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"SCO only\n");
"A2DP only\n");
algorithm = BT_8192E_2ANT_COEX_ALGO_A2DP;
} else if (bt_link_info->pan_exist) {
- if (bt_hson) {
+ if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
"PAN(HS) only\n");
}
}
}
- } else if (numdiffprofile == 2) {
+ } else if (num_of_diff_profile == 2) {
if (bt_link_info->sco_exist) {
if (bt_link_info->hid_exist) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"SCO + A2DP ==> SCO\n");
algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
} else if (bt_link_info->pan_exist) {
- if (bt_hson) {
+ if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
"SCO + PAN(HS)\n");
}
} else if (bt_link_info->hid_exist &&
bt_link_info->pan_exist) {
- if (bt_hson) {
+ if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
"HID + PAN(HS)\n");
}
} else if (bt_link_info->pan_exist &&
bt_link_info->a2dp_exist) {
- if (bt_hson) {
+ if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
"A2DP + PAN(HS)\n");
}
}
}
- } else if (numdiffprofile == 3) {
+ } else if (num_of_diff_profile == 3) {
if (bt_link_info->sco_exist) {
if (bt_link_info->hid_exist &&
bt_link_info->a2dp_exist) {
algorithm = BT_8192E_2ANT_COEX_ALGO_PANEDR_HID;
} else if (bt_link_info->hid_exist &&
bt_link_info->pan_exist) {
- if (bt_hson) {
+ if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
"SCO + HID + PAN(HS)\n");
}
} else if (bt_link_info->pan_exist &&
bt_link_info->a2dp_exist) {
- if (bt_hson) {
+ if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
"SCO + A2DP + PAN(HS)\n");
if (bt_link_info->hid_exist &&
bt_link_info->pan_exist &&
bt_link_info->a2dp_exist) {
- if (bt_hson) {
+ if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
"HID + A2DP + PAN(HS)\n");
}
}
}
- } else if (numdiffprofile >= 3) {
+ } else if (num_of_diff_profile >= 3) {
if (bt_link_info->sco_exist) {
if (bt_link_info->hid_exist &&
bt_link_info->pan_exist &&
bt_link_info->a2dp_exist) {
- if (bt_hson) {
+ if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
"ErrorSCO+HID+A2DP+PAN(HS)\n");
return algorithm;
}
-static void halbtc8192e2ant_setfw_dac_swinglevel(struct btc_coexist *btcoexist,
- u8 dac_swinglvl)
+static void btc8192e2ant_set_fw_dac_swing_level(struct btc_coexist *btcoexist,
+ u8 dac_swing_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
/* There are several type of dacswing
* 0x18/ 0x10/ 0xc/ 0x8/ 0x4/ 0x6
*/
- h2c_parameter[0] = dac_swinglvl;
+ h2c_parameter[0] = dac_swing_lvl;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swinglvl);
+ "[BTCoex], Set Dac Swing Level = 0x%x\n", dac_swing_lvl);
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], FW write 0x64 = 0x%x\n", h2c_parameter[0]);
btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
}
-static void halbtc8192e2ant_set_fwdec_btpwr(struct btc_coexist *btcoexist,
- u8 dec_btpwr_lvl)
+static void btc8192e2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist,
+ u8 dec_bt_pwr_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
- h2c_parameter[0] = dec_btpwr_lvl;
+ h2c_parameter[0] = dec_bt_pwr_lvl;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex] decrease Bt Power level = %d, FW write 0x62 = 0x%x\n",
- dec_btpwr_lvl, h2c_parameter[0]);
+ dec_bt_pwr_lvl, h2c_parameter[0]);
btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
}
-static void halbtc8192e2ant_dec_btpwr(struct btc_coexist *btcoexist,
- bool force_exec, u8 dec_btpwr_lvl)
+static void btc8192e2ant_dec_bt_pwr(struct btc_coexist *btcoexist,
+ bool force_exec, u8 dec_bt_pwr_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], %s Dec BT power level = %d\n",
- force_exec ? "force to" : "", dec_btpwr_lvl);
- coex_dm->cur_dec_bt_pwr = dec_btpwr_lvl;
+ force_exec ? "force to" : "", dec_bt_pwr_lvl);
+ coex_dm->cur_dec_bt_pwr = dec_bt_pwr_lvl;
if (!force_exec) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], preBtDecPwrLvl=%d, curBtDecPwrLvl=%d\n",
coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
}
- halbtc8192e2ant_set_fwdec_btpwr(btcoexist, coex_dm->cur_dec_bt_pwr);
+ btc8192e2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr);
coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
}
-static void halbtc8192e2ant_set_bt_autoreport(struct btc_coexist *btcoexist,
- bool enable_autoreport)
+static void btc8192e2ant_set_bt_auto_report(struct btc_coexist *btcoexist,
+ bool enable_auto_report)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
h2c_parameter[0] = 0;
- if (enable_autoreport)
+ if (enable_auto_report)
h2c_parameter[0] |= BIT0;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n",
- (enable_autoreport ? "Enabled!!" : "Disabled!!"),
+ (enable_auto_report ? "Enabled!!" : "Disabled!!"),
h2c_parameter[0]);
btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
}
-static void halbtc8192e2ant_bt_autoreport(struct btc_coexist *btcoexist,
- bool force_exec,
- bool enable_autoreport)
+static void btc8192e2ant_bt_auto_report(struct btc_coexist *btcoexist,
+ bool force_exec,
+ bool enable_auto_report)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], %s BT Auto report = %s\n",
(force_exec ? "force to" : ""),
- ((enable_autoreport) ? "Enabled" : "Disabled"));
- coex_dm->cur_bt_auto_report = enable_autoreport;
+ ((enable_auto_report) ? "Enabled" : "Disabled"));
+ coex_dm->cur_bt_auto_report = enable_auto_report;
if (!force_exec) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
return;
}
- halbtc8192e2ant_set_bt_autoreport(btcoexist,
- coex_dm->cur_bt_auto_report);
+ btc8192e2ant_set_bt_auto_report(btcoexist,
+ coex_dm->cur_bt_auto_report);
coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
}
-static void halbtc8192e2ant_fw_dac_swinglvl(struct btc_coexist *btcoexist,
- bool force_exec, u8 fw_dac_swinglvl)
+static void btc8192e2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist,
+ bool force_exec, u8 fw_dac_swing_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], %s set FW Dac Swing level = %d\n",
- (force_exec ? "force to" : ""), fw_dac_swinglvl);
- coex_dm->cur_fw_dac_swing_lvl = fw_dac_swinglvl;
+ (force_exec ? "force to" : ""), fw_dac_swing_lvl);
+ coex_dm->cur_fw_dac_swing_lvl = fw_dac_swing_lvl;
if (!force_exec) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
return;
}
- halbtc8192e2ant_setfw_dac_swinglevel(btcoexist,
- coex_dm->cur_fw_dac_swing_lvl);
+ btc8192e2ant_set_fw_dac_swing_level(btcoexist,
+ coex_dm->cur_fw_dac_swing_lvl);
coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
}
}
}
-static void halbtc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
- bool force_exec, bool rx_rf_shrink_on)
+static void btc8192e2ant_rf_shrink(struct btc_coexist *btcoexist,
+ bool force_exec, bool rx_rf_shrink_on)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
}
-static void halbtc8192e2ant_set_dac_swingreg(struct btc_coexist *btcoexist,
- u32 level)
+static void btc8192e2ant_set_dac_swing_reg(struct btc_coexist *btcoexist,
+ u32 level)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 val = (u8)level;
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x883, 0x3e, val);
}
-static void btc8192e2ant_setsw_full_swing(struct btc_coexist *btcoexist,
- bool sw_dac_swingon,
- u32 sw_dac_swinglvl)
+static void btc8192e2ant_set_sw_full_swing(struct btc_coexist *btcoexist,
+ bool sw_dac_swing_on,
+ u32 sw_dac_swing_lvl)
{
- if (sw_dac_swingon)
- halbtc8192e2ant_set_dac_swingreg(btcoexist, sw_dac_swinglvl);
+ if (sw_dac_swing_on)
+ btc8192e2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
else
- halbtc8192e2ant_set_dac_swingreg(btcoexist, 0x18);
+ btc8192e2ant_set_dac_swing_reg(btcoexist, 0x18);
}
-static void halbtc8192e2ant_DacSwing(struct btc_coexist *btcoexist,
- bool force_exec, bool dac_swingon,
- u32 dac_swinglvl)
+static void btc8192e2ant_dac_swing(struct btc_coexist *btcoexist,
+ bool force_exec, bool dac_swing_on,
+ u32 dac_swing_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s turn DacSwing=%s, dac_swinglvl = 0x%x\n",
+ "[BTCoex], %s turn DacSwing=%s, dac_swing_lvl = 0x%x\n",
(force_exec ? "force to" : ""),
- ((dac_swingon) ? "ON" : "OFF"), dac_swinglvl);
- coex_dm->cur_dac_swing_on = dac_swingon;
- coex_dm->cur_dac_swing_lvl = dac_swinglvl;
+ ((dac_swing_on) ? "ON" : "OFF"), dac_swing_lvl);
+ coex_dm->cur_dac_swing_on = dac_swing_on;
+ coex_dm->cur_dac_swing_lvl = dac_swing_lvl;
if (!force_exec) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
return;
}
mdelay(30);
- btc8192e2ant_setsw_full_swing(btcoexist, dac_swingon, dac_swinglvl);
+ btc8192e2ant_set_sw_full_swing(btcoexist, dac_swing_on, dac_swing_lvl);
coex_dm->pre_dac_swing_on = coex_dm->cur_dac_swing_on;
coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
}
-static void halbtc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
- bool agc_table_en)
+static void btc8192e2ant_set_agc_table(struct btc_coexist *btcoexist,
+ bool agc_table_en)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
}
}
-static void halbtc8192e2ant_AgcTable(struct btc_coexist *btcoexist,
- bool force_exec, bool agc_table_en)
+static void btc8192e2ant_agc_table(struct btc_coexist *btcoexist,
+ bool force_exec, bool agc_table_en)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
return;
}
- halbtc8192e2ant_set_agc_table(btcoexist, agc_table_en);
+ btc8192e2ant_set_agc_table(btcoexist, agc_table_en);
coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
}
-static void halbtc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
- u32 val0x6c0, u32 val0x6c4,
- u32 val0x6c8, u8 val0x6cc)
+static void btc8192e2ant_set_coex_table(struct btc_coexist *btcoexist,
+ u32 val0x6c0, u32 val0x6c4,
+ u32 val0x6c8, u8 val0x6cc)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
}
-static void halbtc8192e2ant_coex_table(struct btc_coexist *btcoexist,
- bool force_exec,
- u32 val0x6c0, u32 val0x6c4,
- u32 val0x6c8, u8 val0x6cc)
+static void btc8192e2ant_coex_table(struct btc_coexist *btcoexist,
+ bool force_exec, u32 val0x6c0, u32 val0x6c4,
+ u32 val0x6c8, u8 val0x6cc)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
(coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
return;
}
- halbtc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
- val0x6c8, val0x6cc);
+ btc8192e2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
+ val0x6cc);
coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
}
-static void btc8192e2ant_coex_tbl_w_type(struct btc_coexist *btcoexist,
- bool force_exec, u8 type)
+static void btc8192e2ant_coex_table_with_type(struct btc_coexist *btcoexist,
+ bool force_exec, u8 type)
{
switch (type) {
case 0:
- halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
- 0x5a5a5a5a, 0xffffff, 0x3);
+ btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
+ 0x5a5a5a5a, 0xffffff, 0x3);
break;
case 1:
- halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
- 0x5a5a5a5a, 0xffffff, 0x3);
+ btc8192e2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
+ 0x5a5a5a5a, 0xffffff, 0x3);
break;
case 2:
- halbtc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
- 0x5ffb5ffb, 0xffffff, 0x3);
+ btc8192e2ant_coex_table(btcoexist, force_exec, 0x55555555,
+ 0x5ffb5ffb, 0xffffff, 0x3);
break;
case 3:
- halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
- 0x5fdb5fdb, 0xffffff, 0x3);
+ btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
+ 0x5fdb5fdb, 0xffffff, 0x3);
break;
case 4:
- halbtc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
- 0x5ffb5ffb, 0xffffff, 0x3);
+ btc8192e2ant_coex_table(btcoexist, force_exec, 0xdfffdfff,
+ 0x5ffb5ffb, 0xffffff, 0x3);
break;
default:
break;
}
}
-static void halbtc8192e2ant_set_fw_ignore_wlanact(struct btc_coexist *btcoexist,
- bool enable)
+static void btc8192e2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoexist,
+ bool enable)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
}
-static void halbtc8192e2ant_IgnoreWlanAct(struct btc_coexist *btcoexist,
- bool force_exec, bool enable)
+static void btc8192e2ant_ignore_wlan_act(struct btc_coexist *btcoexist,
+ bool force_exec, bool enable)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
coex_dm->cur_ignore_wlan_act)
return;
}
- halbtc8192e2ant_set_fw_ignore_wlanact(btcoexist, enable);
+ btc8192e2ant_set_fw_ignore_wlan_act(btcoexist, enable);
coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
}
-static void halbtc8192e2ant_SetFwPstdma(struct btc_coexist *btcoexist, u8 byte1,
+static void btc8192e2ant_set_fw_ps_tdma(struct btc_coexist *btcoexist, u8 byte1,
u8 byte2, u8 byte3, u8 byte4, u8 byte5)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
}
-static void btc8192e2ant_sw_mec1(struct btc_coexist *btcoexist,
- bool shrink_rx_lpf, bool low_penalty_ra,
- bool limited_dig, bool btlan_constrain)
+static void btc8192e2ant_sw_mechanism1(struct btc_coexist *btcoexist,
+ bool shrink_rx_lpf, bool low_penalty_ra,
+ bool limited_dig, bool btlan_constrain)
{
- halbtc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
+ btc8192e2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
}
-static void btc8192e2ant_sw_mec2(struct btc_coexist *btcoexist,
- bool agc_table_shift, bool adc_backoff,
- bool sw_dac_swing, u32 dac_swinglvl)
+static void btc8192e2ant_sw_mechanism2(struct btc_coexist *btcoexist,
+ bool agc_table_shift, bool adc_backoff,
+ bool sw_dac_swing, u32 dac_swing_lvl)
{
- halbtc8192e2ant_AgcTable(btcoexist, NORMAL_EXEC, agc_table_shift);
- halbtc8192e2ant_DacSwing(btcoexist, NORMAL_EXEC, sw_dac_swing,
- dac_swinglvl);
+ btc8192e2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift);
+ btc8192e2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
+ dac_swing_lvl);
}
-static void halbtc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
- bool force_exec, bool turn_on, u8 type)
+static void btc8192e2ant_ps_tdma(struct btc_coexist *btcoexist,
+ bool force_exec, bool turn_on, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
switch (type) {
case 1:
default:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
0x1a, 0xe1, 0x90);
break;
case 2:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
0x12, 0xe1, 0x90);
break;
case 3:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
0x3, 0xf1, 0x90);
break;
case 4:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10,
0x3, 0xf1, 0x90);
break;
case 5:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
0x1a, 0x60, 0x90);
break;
case 6:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
0x12, 0x60, 0x90);
break;
case 7:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
0x3, 0x70, 0x90);
break;
case 8:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xa3, 0x10,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x10,
0x3, 0x70, 0x90);
break;
case 9:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
0x1a, 0xe1, 0x10);
break;
case 10:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
0x12, 0xe1, 0x10);
break;
case 11:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
0x3, 0xf1, 0x10);
break;
case 12:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x10,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10,
0x3, 0xf1, 0x10);
break;
case 13:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
0x1a, 0xe0, 0x10);
break;
case 14:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
0x12, 0xe0, 0x10);
break;
case 15:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1c,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
0x3, 0xf0, 0x10);
break;
case 16:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x12,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
0x3, 0xf0, 0x10);
break;
case 17:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0x61, 0x20,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x61, 0x20,
0x03, 0x10, 0x10);
break;
case 18:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x5,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
0x5, 0xe1, 0x90);
break;
case 19:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
0x25, 0xe1, 0x90);
break;
case 20:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x25,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
0x25, 0x60, 0x90);
break;
case 21:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x15,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x15,
0x03, 0x70, 0x90);
break;
case 71:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0xe3, 0x1a,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
0x1a, 0xe1, 0x90);
break;
}
switch (type) {
default:
case 0:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0x8, 0x0, 0x0,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x8, 0x0, 0x0,
0x0, 0x0);
btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x4);
break;
case 1:
- halbtc8192e2ant_SetFwPstdma(btcoexist, 0x0, 0x0, 0x0,
+ btc8192e2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
0x8, 0x0);
mdelay(5);
btcoexist->btc_write_1byte(btcoexist, 0x92c, 0x20);
coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
}
-static void halbtc8192e2ant_set_switch_sstype(struct btc_coexist *btcoexist,
- u8 sstype)
+static void btc8192e2ant_set_switch_ss_type(struct btc_coexist *btcoexist,
+ u8 ss_type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 mimops = BTC_MIMO_PS_DYNAMIC;
- u32 disra_mask = 0x0;
+ u32 dis_ra_mask = 0x0;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], REAL set SS Type = %d\n", sstype);
+ "[BTCoex], REAL set SS Type = %d\n", ss_type);
- disra_mask = halbtc8192e2ant_decidera_mask(btcoexist, sstype,
- coex_dm->curra_masktype);
- halbtc8192e2ant_Updatera_mask(btcoexist, FORCE_EXEC, disra_mask);
+ dis_ra_mask = btc8192e2ant_decide_ra_mask(btcoexist, ss_type,
+ coex_dm->cur_ra_mask_type);
+ btc8192e2ant_update_ra_mask(btcoexist, FORCE_EXEC, dis_ra_mask);
- if (sstype == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
+ if (ss_type == 1) {
+ btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
/* switch ofdm path */
btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x11);
btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x1);
btcoexist->btc_write_1byte_bitmask(btcoexist, 0xe77, 0x4, 0x1);
btcoexist->btc_write_1byte(btcoexist, 0xa07, 0x81);
mimops = BTC_MIMO_PS_STATIC;
- } else if (sstype == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
+ } else if (ss_type == 2) {
+ btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
btcoexist->btc_write_1byte(btcoexist, 0xc04, 0x33);
btcoexist->btc_write_1byte(btcoexist, 0xd04, 0x3);
btcoexist->btc_write_4byte(btcoexist, 0x90c, 0x81121313);
btcoexist->btc_set(btcoexist, BTC_SET_ACT_SEND_MIMO_PS, &mimops);
}
-static void halbtc8192e2ant_switch_sstype(struct btc_coexist *btcoexist,
- bool force_exec, u8 new_sstype)
+static void btc8192e2ant_switch_ss_type(struct btc_coexist *btcoexist,
+ bool force_exec, u8 new_ss_type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], %s Switch SS Type = %d\n",
- (force_exec ? "force to" : ""), new_sstype);
- coex_dm->cur_sstype = new_sstype;
+ (force_exec ? "force to" : ""), new_ss_type);
+ coex_dm->cur_ss_type = new_ss_type;
if (!force_exec) {
- if (coex_dm->pre_sstype == coex_dm->cur_sstype)
+ if (coex_dm->pre_ss_type == coex_dm->cur_ss_type)
return;
}
- halbtc8192e2ant_set_switch_sstype(btcoexist, coex_dm->cur_sstype);
+ btc8192e2ant_set_switch_ss_type(btcoexist, coex_dm->cur_ss_type);
- coex_dm->pre_sstype = coex_dm->cur_sstype;
+ coex_dm->pre_ss_type = coex_dm->cur_ss_type;
}
-static void halbtc8192e2ant_coex_alloff(struct btc_coexist *btcoexist)
+static void btc8192e2ant_coex_all_off(struct btc_coexist *btcoexist)
{
/* fw all off */
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
/* sw all off */
- btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
/* hw all off */
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
}
-static void halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
+static void btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
{
/* force to reset coex mechanism */
- halbtc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, FORCE_EXEC, 6);
- halbtc8192e2ant_dec_btpwr(btcoexist, FORCE_EXEC, 0);
+ btc8192e2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
+ btc8192e2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
- btc8192e2ant_coex_tbl_w_type(btcoexist, FORCE_EXEC, 0);
- halbtc8192e2ant_switch_sstype(btcoexist, FORCE_EXEC, 2);
+ btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
+ btc8192e2ant_switch_ss_type(btcoexist, FORCE_EXEC, 2);
- btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
}
-static void halbtc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
{
bool low_pwr_disable = true;
btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
&low_pwr_disable);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
- btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false, false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
}
-static bool halbtc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
+static bool btc8192e2ant_is_common_action(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
bool common = false, wifi_connected = false, wifi_busy = false;
- bool bt_hson = false, low_pwr_disable = false;
+ bool bt_hs_on = false, low_pwr_disable = false;
- btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
+ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
&wifi_connected);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
if (bt_link_info->sco_exist || bt_link_info->hid_exist)
- halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
+ btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 1, 0, 0, 0);
else
- halbtc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
+ btc8192e2ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
if (!wifi_connected) {
low_pwr_disable = false;
coex_dm->bt_status) ||
(BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
coex_dm->bt_status)) {
- halbtc8192e2ant_switch_sstype(btcoexist,
- NORMAL_EXEC, 2);
- btc8192e2ant_coex_tbl_w_type(btcoexist,
- NORMAL_EXEC, 1);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 0);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 1);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
} else {
- halbtc8192e2ant_switch_sstype(btcoexist,
- NORMAL_EXEC, 1);
- btc8192e2ant_coex_tbl_w_type(btcoexist,
- NORMAL_EXEC, 0);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 1);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 0);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
}
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
- btc8192e2ant_sw_mec1(btcoexist, false, false, false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false, false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false, false,
+ false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false, false,
+ 0x18);
common = true;
} else {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Wifi connected + BT non connected-idle!!\n");
- halbtc8192e2ant_switch_sstype(btcoexist,
- NORMAL_EXEC, 2);
- btc8192e2ant_coex_tbl_w_type(btcoexist,
- NORMAL_EXEC, 1);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 0);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
- NORMAL_EXEC, 6);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
-
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 1);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist,
+ NORMAL_EXEC, 6);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
common = true;
} else if (BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE ==
BTC_SET_ACT_DISABLE_LOW_POWER,
&low_pwr_disable);
- if (bt_hson)
+ if (bt_hs_on)
return false;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Wifi connected + BT connected-idle!!\n");
- halbtc8192e2ant_switch_sstype(btcoexist,
- NORMAL_EXEC, 2);
- btc8192e2ant_coex_tbl_w_type(btcoexist,
- NORMAL_EXEC, 1);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 0);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
- NORMAL_EXEC, 6);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
-
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_switch_ss_type(btcoexist,
+ NORMAL_EXEC, 2);
+ btc8192e2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 1);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ false, 0);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist,
+ NORMAL_EXEC, 6);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
common = true;
} else {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Wifi Connected-Idle + BT Busy!!\n");
- halbtc8192e2ant_switch_sstype(btcoexist,
- NORMAL_EXEC, 1);
- btc8192e2ant_coex_tbl_w_type(btcoexist,
- NORMAL_EXEC, 2);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 21);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist,
- NORMAL_EXEC, 6);
- halbtc8192e2ant_dec_btpwr(btcoexist,
- NORMAL_EXEC, 0);
- btc8192e2ant_sw_mec1(btcoexist, false,
- false, false, false);
- btc8192e2ant_sw_mec2(btcoexist, false,
- false, false, 0x18);
+ btc8192e2ant_switch_ss_type(btcoexist,
+ NORMAL_EXEC, 1);
+ btc8192e2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC,
+ 2);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 21);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist,
+ NORMAL_EXEC, 6);
+ btc8192e2ant_dec_bt_pwr(btcoexist,
+ NORMAL_EXEC, 0);
+ btc8192e2ant_sw_mechanism1(btcoexist, false,
+ false, false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false,
+ false, false, 0x18);
common = true;
}
}
return common;
}
-static void btc8192e_int1(struct btc_coexist *btcoexist, bool tx_pause,
- int result)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- if (tx_pause) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 1\n");
-
- if (coex_dm->cur_ps_tdma == 71) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- coex_dm->tdma_adj_type = 5;
- } else if (coex_dm->cur_ps_tdma == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- coex_dm->tdma_adj_type = 5;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 4) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- }
- if (coex_dm->cur_ps_tdma == 9) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 13);
- coex_dm->tdma_adj_type = 13;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
-
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- } else if (coex_dm->cur_ps_tdma == 13) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 8) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- coex_dm->tdma_adj_type = 5;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 13);
- coex_dm->tdma_adj_type = 13;
- }
- }
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 0\n");
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 71);
- coex_dm->tdma_adj_type = 71;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 8) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- }
- if (coex_dm->cur_ps_tdma == 13) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
-
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 71) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
- coex_dm->tdma_adj_type = 1;
- } else if (coex_dm->cur_ps_tdma == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 4) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
- coex_dm->tdma_adj_type = 1;
- } else if (coex_dm->cur_ps_tdma == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 71);
- coex_dm->tdma_adj_type = 71;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- }
- }
- }
-}
-
-static void btc8192e_int2(struct btc_coexist *btcoexist, bool tx_pause,
- int result)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- if (tx_pause) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 1\n");
- if (coex_dm->cur_ps_tdma == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 4) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- }
- if (coex_dm->cur_ps_tdma == 9) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- } else if (coex_dm->cur_ps_tdma == 13) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 8) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- }
- }
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 0\n");
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 8) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- }
- if (coex_dm->cur_ps_tdma == 13) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 4) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- }
- }
- }
-}
-
-static void btc8192e_int3(struct btc_coexist *btcoexist, bool tx_pause,
- int result)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- if (tx_pause) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 1\n");
- if (coex_dm->cur_ps_tdma == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 4) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- }
- if (coex_dm->cur_ps_tdma == 9) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- } else if (coex_dm->cur_ps_tdma == 13) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 8) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- }
- }
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 0\n");
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 8) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- }
- if (coex_dm->cur_ps_tdma == 13) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 4) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- }
- }
- }
-}
-
-static void halbtc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
- bool sco_hid, bool tx_pause,
- u8 max_interval)
+static void btc8192e2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
+ bool sco_hid, bool tx_pause,
+ u8 max_interval)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
static int up, dn, m, n, wait_cnt;
if (sco_hid) {
if (tx_pause) {
if (max_interval == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 13);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 13);
coex_dm->tdma_adj_type = 13;
} else if (max_interval == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 14);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 14);
coex_dm->tdma_adj_type = 14;
} else {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 15);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 15);
coex_dm->tdma_adj_type = 15;
}
} else {
if (max_interval == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 9);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 9);
coex_dm->tdma_adj_type = 9;
} else if (max_interval == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 10);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 10);
coex_dm->tdma_adj_type = 10;
} else {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 11);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 11);
coex_dm->tdma_adj_type = 11;
}
}
} else {
if (tx_pause) {
if (max_interval == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 5);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 5);
coex_dm->tdma_adj_type = 5;
} else if (max_interval == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 6);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 6);
coex_dm->tdma_adj_type = 6;
} else {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 7);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 7);
coex_dm->tdma_adj_type = 7;
}
} else {
if (max_interval == 1) {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 1);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 1);
coex_dm->tdma_adj_type = 1;
} else if (max_interval == 2) {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 2);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 2);
coex_dm->tdma_adj_type = 2;
} else {
- halbtc8192e2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 3);
+ btc8192e2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 3);
coex_dm->tdma_adj_type = 3;
}
}
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], max Interval = %d\n", max_interval);
- if (max_interval == 1)
- btc8192e_int1(btcoexist, tx_pause, result);
- else if (max_interval == 2)
- btc8192e_int2(btcoexist, tx_pause, result);
- else if (max_interval == 3)
- btc8192e_int3(btcoexist, tx_pause, result);
}
/* if current PsTdma not match with
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
if (!scan && !link && !roam)
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true,
- coex_dm->tdma_adj_type);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, coex_dm->tdma_adj_type);
else
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
}
/* SCO only or SCO+PAN(HS) */
-static void halbtc8192e2ant_action_sco(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_sco(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
}
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
/* sw mechanism */
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x6);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x6);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x6);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x6);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x6);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x6);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x6);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x6);
}
}
}
-static void halbtc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_sco_pan(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_STAY_LOW;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 4);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
}
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
/* sw mechanism */
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x6);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x6);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x6);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x6);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x6);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x6);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x6);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x6);
}
}
}
-static void halbtc8192e2ant_action_hid(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_hid(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
}
/* sw mechanism */
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
-static void halbtc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_a2dp(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_bw;
bool long_dist = false;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- if ((btrssi_state == BTC_RSSI_STATE_LOW ||
- btrssi_state == BTC_RSSI_STATE_STAY_LOW) &&
- (wifirssi_state == BTC_RSSI_STATE_LOW ||
- wifirssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW ||
+ bt_rssi_state == BTC_RSSI_STATE_STAY_LOW) &&
+ (wifi_rssi_state == BTC_RSSI_STATE_LOW ||
+ wifi_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], A2dp, wifi/bt rssi both LOW!!\n");
long_dist = true;
}
if (long_dist) {
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
- 0x4);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true,
+ 0x4);
} else {
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
- 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false,
+ 0x8);
}
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
if (long_dist)
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
else
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
if (long_dist) {
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 17);
coex_dm->auto_tdma_adjust = false;
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
} else {
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
- true, 1);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
- false, 1);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
- false, 1);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_tdma_duration_adjust(btcoexist, false,
+ true, 1);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_tdma_duration_adjust(btcoexist, false,
+ false, 1);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_tdma_duration_adjust(btcoexist, false,
+ false, 1);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
}
}
/* sw mechanism */
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
- false, 2);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
- false, 2);
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 2);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 2);
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
}
/* sw mechanism */
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- true, 0x6);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ true, 0x6);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- true, 0x6);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ true, 0x6);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- true, 0x6);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ true, 0x6);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- true, 0x6);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ true, 0x6);
}
}
}
-static void halbtc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_pan_edr(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 1);
}
/* sw mechanism */
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
/* PAN(HS) only */
-static void halbtc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_pan_hs(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
}
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
/* PAN(EDR)+A2DP */
-static void halbtc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
- false, 3);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, false,
- false, 3);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_tdma_duration_adjust(btcoexist, false, true, 3);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_tdma_duration_adjust(btcoexist, false, false, 3);
}
/* sw mechanism */
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, false,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
- halbtc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 10);
}
/* sw mechanism */
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
/* HID+A2DP+PAN(EDR) */
static void btc8192e2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
- halbtc8192e2ant_fw_dac_swinglvl(btcoexist, NORMAL_EXEC, 6);
+ btc8192e2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 3);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 3);
}
/* sw mechanism */
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
+static void btc8192e2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
{
- u8 wifirssi_state, btrssi_state = BTC_RSSI_STATE_HIGH;
+ u8 wifi_rssi_state, bt_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_bw;
- wifirssi_state = halbtc8192e2ant_wifirssi_state(btcoexist, 0, 2, 15, 0);
- btrssi_state = halbtc8192e2ant_btrssi_state(btcoexist, 3, 34, 42);
+ wifi_rssi_state = btc8192e2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8192e2ant_bt_rssi_state(btcoexist, 3, 34, 42);
- halbtc8192e2ant_switch_sstype(btcoexist, NORMAL_EXEC, 1);
- halbtc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+ btc8192e2ant_switch_ss_type(btcoexist, NORMAL_EXEC, 1);
+ btc8192e2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- btc8192e2ant_coex_tbl_w_type(btcoexist, NORMAL_EXEC, 3);
+ btc8192e2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 3);
- if ((btrssi_state == BTC_RSSI_STATE_LOW) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 0);
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
- } else if ((btrssi_state == BTC_RSSI_STATE_MEDIUM) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 2);
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
- } else if ((btrssi_state == BTC_RSSI_STATE_HIGH) ||
- (btrssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8192e2ant_dec_btpwr(btcoexist, NORMAL_EXEC, 4);
- halbtc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
+ if ((bt_rssi_state == BTC_RSSI_STATE_LOW) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ btc8192e2ant_tdma_duration_adjust(btcoexist, true, true, 2);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_MEDIUM) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_MEDIUM)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
+ btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
+ } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 4);
+ btc8192e2ant_tdma_duration_adjust(btcoexist, true, false, 2);
}
/* sw mechanism */
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, true, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- if ((wifirssi_state == BTC_RSSI_STATE_HIGH) ||
- (wifirssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, true, false,
- false, 0x18);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8192e2ant_sw_mec1(btcoexist, false, true,
- false, false);
- btc8192e2ant_sw_mec2(btcoexist, false, false,
- false, 0x18);
+ btc8192e2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8192e2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
+static void btc8192e2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 algorithm = 0;
return;
}
- algorithm = halbtc8192e2ant_action_algorithm(btcoexist);
+ algorithm = btc8192e2ant_action_algorithm(btcoexist);
if (coex_sta->c2h_bt_inquiry_page &&
(BT_8192E_2ANT_COEX_ALGO_PANHS != algorithm)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BT is under inquiry/page scan !!\n");
- halbtc8192e2ant_action_bt_inquiry(btcoexist);
+ btc8192e2ant_action_bt_inquiry(btcoexist);
return;
}
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
- if (halbtc8192e2ant_is_common_action(btcoexist)) {
+ if (btc8192e2ant_is_common_action(btcoexist)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant common\n");
coex_dm->auto_tdma_adjust = false;
case BT_8192E_2ANT_COEX_ALGO_SCO:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = SCO\n");
- halbtc8192e2ant_action_sco(btcoexist);
+ btc8192e2ant_action_sco(btcoexist);
break;
case BT_8192E_2ANT_COEX_ALGO_SCO_PAN:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = SCO+PAN(EDR)\n");
- halbtc8192e2ant_action_sco_pan(btcoexist);
+ btc8192e2ant_action_sco_pan(btcoexist);
break;
case BT_8192E_2ANT_COEX_ALGO_HID:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = HID\n");
- halbtc8192e2ant_action_hid(btcoexist);
+ btc8192e2ant_action_hid(btcoexist);
break;
case BT_8192E_2ANT_COEX_ALGO_A2DP:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = A2DP\n");
- halbtc8192e2ant_action_a2dp(btcoexist);
+ btc8192e2ant_action_a2dp(btcoexist);
break;
case BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = A2DP+PAN(HS)\n");
- halbtc8192e2ant_action_a2dp_pan_hs(btcoexist);
+ btc8192e2ant_action_a2dp_pan_hs(btcoexist);
break;
case BT_8192E_2ANT_COEX_ALGO_PANEDR:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = PAN(EDR)\n");
- halbtc8192e2ant_action_pan_edr(btcoexist);
+ btc8192e2ant_action_pan_edr(btcoexist);
break;
case BT_8192E_2ANT_COEX_ALGO_PANHS:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = HS mode\n");
- halbtc8192e2ant_action_pan_hs(btcoexist);
+ btc8192e2ant_action_pan_hs(btcoexist);
break;
case BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = PAN+A2DP\n");
- halbtc8192e2ant_action_pan_edr_a2dp(btcoexist);
+ btc8192e2ant_action_pan_edr_a2dp(btcoexist);
break;
case BT_8192E_2ANT_COEX_ALGO_PANEDR_HID:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = PAN(EDR)+HID\n");
- halbtc8192e2ant_action_pan_edr_hid(btcoexist);
+ btc8192e2ant_action_pan_edr_hid(btcoexist);
break;
case BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
case BT_8192E_2ANT_COEX_ALGO_HID_A2DP:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = HID+A2DP\n");
- halbtc8192e2ant_action_hid_a2dp(btcoexist);
+ btc8192e2ant_action_hid_a2dp(btcoexist);
break;
default:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"Action 2-Ant, algorithm = unknown!!\n");
- /* halbtc8192e2ant_coex_alloff(btcoexist); */
+ /* btc8192e2ant_coex_all_off(btcoexist); */
break;
}
coex_dm->pre_algorithm = coex_dm->cur_algorithm;
}
}
-static void halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist,
- bool backup)
+static void btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist,
+ bool backup)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u16 u16tmp = 0;
0x430);
coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
0x434);
- coex_dm->backup_retrylimit = btcoexist->btc_read_2byte(
+ coex_dm->backup_retry_limit = btcoexist->btc_read_2byte(
btcoexist,
0x42a);
coex_dm->backup_ampdu_maxtime = btcoexist->btc_read_1byte(
else
btcoexist->btc_write_4byte(btcoexist, 0x64, 0x30030004);
- btc8192e2ant_coex_tbl_w_type(btcoexist, FORCE_EXEC, 0);
+ btc8192e2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
/* antenna switch control parameter */
btcoexist->btc_write_4byte(btcoexist, 0x858, 0x55555555);
u16tmp |= BIT9;
btcoexist->btc_write_2byte(btcoexist, 0x40, u16tmp);
- /* enable PTA I2C mailbox */
+ /* enable PTA I2C mailbox */
u8tmp = btcoexist->btc_read_1byte(btcoexist, 0x101);
u8tmp |= BIT4;
btcoexist->btc_write_1byte(btcoexist, 0x101, u8tmp);
btcoexist->btc_write_1byte(btcoexist, 0x7, u8tmp);
}
-/*************************************************************
- * work around function start with wa_halbtc8192e2ant_
- *************************************************************/
-
/************************************************************
- * extern function start with EXhalbtc8192e2ant_
+ * extern function start with ex_btc8192e2ant_
************************************************************/
-void ex_halbtc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
+void ex_btc8192e2ant_init_hwconfig(struct btc_coexist *btcoexist)
{
- halbtc8192e2ant_init_hwconfig(btcoexist, true);
+ btc8192e2ant_init_hwconfig(btcoexist, true);
}
-void ex_halbtc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
+void ex_btc8192e2ant_init_coex_dm(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Coex Mechanism Init!!\n");
- halbtc8192e2ant_init_coex_dm(btcoexist);
+ btc8192e2ant_init_coex_dm(btcoexist);
}
-void ex_halbtc8192e2ant_display_coex_info(struct btc_coexist *btcoexist)
+void ex_btc8192e2ant_display_coex_info(struct btc_coexist *btcoexist)
{
struct btc_board_info *board_info = &btcoexist->board_info;
struct btc_stack_info *stack_info = &btcoexist->stack_info;
u16 u16tmp[4];
u32 u32tmp[4];
bool roam = false, scan = false, link = false, wifi_under_5g = false;
- bool bt_hson = false, wifi_busy = false;
- int wifirssi = 0, bt_hs_rssi = 0;
+ bool bt_hs_on = false, wifi_busy = false;
+ int wifi_rssi = 0, bt_hs_rssi = 0;
u32 wifi_bw, wifi_traffic_dir;
u8 wifi_dot11_chnl, wifi_hs_chnl;
u32 fw_ver = 0, bt_patch_ver = 0;
glcoex_ver_date_8192e_2ant, glcoex_ver_8192e_2ant,
fw_ver, bt_patch_ver, bt_patch_ver);
- btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hson);
+ btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_DOT11_CHNL,
&wifi_dot11_chnl);
btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_HS_CHNL, &wifi_hs_chnl);
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d(%d)",
"Dot11 channel / HsMode(HsChnl)",
- wifi_dot11_chnl, bt_hson, wifi_hs_chnl);
+ wifi_dot11_chnl, bt_hs_on, wifi_hs_chnl);
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %3ph ",
"H2C Wifi inform bt chnl Info", coex_dm->wifi_chnl_info);
- btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifirssi);
+ btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi);
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d",
- "Wifi rssi/ HS rssi", wifirssi, bt_hs_rssi);
+ "Wifi rssi/ HS rssi", wifi_rssi, bt_hs_rssi);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
if (coex_sta->bt_info_c2h_cnt[i]) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
"\r\n %-35s = %7ph(%d)",
- GLBtInfoSrc8192e2Ant[i],
+ glbt_info_src_8192e_2ant[i],
coex_sta->bt_info_c2h[i],
coex_sta->bt_info_c2h_cnt[i]);
}
btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x ", "SS Type",
- coex_dm->cur_sstype);
+ coex_dm->cur_ss_type);
/* Sw mechanism */
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = 0x%x/0x%x/0x%x/0x%x",
"backup ARFR1/ARFR2/RL/AMaxTime", coex_dm->backup_arfr_cnt1,
- coex_dm->backup_arfr_cnt2, coex_dm->backup_retrylimit,
+ coex_dm->backup_arfr_cnt2, coex_dm->backup_retry_limit,
coex_dm->backup_ampdu_maxtime);
u32tmp[0] = btcoexist->btc_read_4byte(btcoexist, 0x430);
"0x774(lp rx[31:16]/tx[15:0])",
coex_sta->low_priority_rx, coex_sta->low_priority_tx);
#if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 1)
- halbtc8192e2ant_monitor_bt_ctr(btcoexist);
+ btc8192e2ant_monitor_bt_ctr(btcoexist);
#endif
btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
}
-void ex_halbtc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], IPS ENTER notify\n");
coex_sta->under_ips = true;
- halbtc8192e2ant_coex_alloff(btcoexist);
+ btc8192e2ant_coex_all_off(btcoexist);
} else if (BTC_IPS_LEAVE == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], IPS LEAVE notify\n");
}
}
-void ex_halbtc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
}
}
-void ex_halbtc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
"[BTCoex], SCAN FINISH notify\n");
}
-void ex_halbtc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
"[BTCoex], CONNECT FINISH notify\n");
}
-void ex_halbtc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
- u8 type)
+void ex_btc8192e2ant_media_status_notify(struct btc_coexist *btcoexist,
+ u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[3] = {0};
btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
}
-void ex_halbtc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
- u8 type)
+void ex_btc8192e2ant_special_packet_notify(struct btc_coexist *btcoexist,
+ u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
"[BTCoex], DHCP Packet notify\n");
}
-void ex_halbtc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
- u8 *tmp_buf, u8 length)
+void ex_btc8192e2ant_bt_info_notify(struct btc_coexist *btcoexist,
+ u8 *tmp_buf, u8 length)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 bt_info = 0;
}
if (BT_INFO_SRC_8192E_2ANT_WIFI_FW != rsp_source) {
- coex_sta->bt_retry_cnt = /* [3:0] */
+ /* [3:0] */
+ coex_sta->bt_retry_cnt =
coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
coex_sta->bt_rssi =
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
&wifi_connected);
if (wifi_connected)
- ex_halbtc8192e2ant_media_status_notify(
+ ex_btc8192e2ant_media_status_notify(
btcoexist,
BTC_MEDIA_CONNECT);
else
- ex_halbtc8192e2ant_media_status_notify(
+ ex_btc8192e2ant_media_status_notify(
btcoexist,
BTC_MEDIA_DISCONNECT);
}
!btcoexist->stop_coex_dm) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"bit3, BT NOT ignore Wlan active!\n");
- halbtc8192e2ant_IgnoreWlanAct(btcoexist,
- FORCE_EXEC,
- false);
+ btc8192e2ant_ignore_wlan_act(btcoexist,
+ FORCE_EXEC,
+ false);
}
} else {
/* BT already NOT ignore Wlan active,
if ((coex_sta->bt_info_ext & BIT4)) {
/* BT auto report already enabled, do nothing */
} else {
- halbtc8192e2ant_bt_autoreport(btcoexist, FORCE_EXEC,
- true);
+ btc8192e2ant_bt_auto_report(btcoexist, FORCE_EXEC,
+ true);
}
#endif
}
coex_sta->sco_exist = false;
}
- halbtc8192e2ant_update_btlink_info(btcoexist);
+ btc8192e2ant_update_bt_link_info(btcoexist);
- if (!(bt_info&BT_INFO_8192E_2ANT_B_CONNECTION)) {
+ if (!(bt_info & BT_INFO_8192E_2ANT_B_CONNECTION)) {
coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BT Non-Connected idle!!!\n");
coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], bt_infoNotify(), BT Connected-idle!!!\n");
- } else if ((bt_info&BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
- (bt_info&BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
+ } else if ((bt_info & BT_INFO_8192E_2ANT_B_SCO_ESCO) ||
+ (bt_info & BT_INFO_8192E_2ANT_B_SCO_BUSY)) {
coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_SCO_BUSY;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], bt_infoNotify(), BT SCO busy!!!\n");
- } else if (bt_info&BT_INFO_8192E_2ANT_B_ACL_BUSY) {
+ } else if (bt_info & BT_INFO_8192E_2ANT_B_ACL_BUSY) {
coex_dm->bt_status = BT_8192E_2ANT_BT_STATUS_ACL_BUSY;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], bt_infoNotify(), BT ACL busy!!!\n");
coex_dm->limited_dig = limited_dig;
btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
- halbtc8192e2ant_run_coexist_mechanism(btcoexist);
-}
-
-void ex_halbtc8192e2ant_stack_operation_notify(struct btc_coexist *btcoexist,
- u8 type)
-{
+ btc8192e2ant_run_coexist_mechanism(btcoexist);
}
void ex_halbtc8192e2ant_halt_notify(struct btc_coexist *btcoexist)
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD, "[BTCoex], Halt notify\n");
- halbtc8192e2ant_IgnoreWlanAct(btcoexist, FORCE_EXEC, true);
- ex_halbtc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
+ btc8192e2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
+ ex_btc8192e2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
}
-void ex_halbtc8192e2ant_periodical(struct btc_coexist *btcoexist)
+void ex_btc8192e2ant_periodical(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
static u8 dis_ver_info_cnt;
}
#if (BT_AUTO_REPORT_ONLY_8192E_2ANT == 0)
- halbtc8192e2ant_querybt_info(btcoexist);
- halbtc8192e2ant_monitor_bt_ctr(btcoexist);
- btc8192e2ant_monitor_bt_enable_dis(btcoexist);
+ btc8192e2ant_query_bt_info(btcoexist);
+ btc8192e2ant_monitor_bt_ctr(btcoexist);
+ btc8192e2ant_monitor_bt_enable_disable(btcoexist);
#else
- if (halbtc8192e2ant_iswifi_status_changed(btcoexist) ||
+ if (btc8192e2ant_is_wifi_status_changed(btcoexist) ||
coex_dm->auto_tdma_adjust)
- halbtc8192e2ant_run_coexist_mechanism(btcoexist);
+ btc8192e2ant_run_coexist_mechanism(btcoexist);
#endif
}
u32 backup_arfr_cnt1; /* Auto Rate Fallback Retry cnt */
u32 backup_arfr_cnt2; /* Auto Rate Fallback Retry cnt */
- u16 backup_retrylimit;
+ u16 backup_retry_limit;
u8 backup_ampdu_maxtime;
/* algorithm related */
u8 bt_status;
u8 wifi_chnl_info[3];
- u8 pre_sstype;
- u8 cur_sstype;
+ u8 pre_ss_type;
+ u8 cur_ss_type;
- u32 prera_mask;
- u32 curra_mask;
- u8 curra_masktype;
- u8 pre_arfrtype;
- u8 cur_arfrtype;
- u8 pre_retrylimit_type;
- u8 cur_retrylimit_type;
- u8 pre_ampdutime_type;
- u8 cur_ampdutime_type;
+ u32 pre_ra_mask;
+ u32 cur_ra_mask;
+ u8 cur_ra_mask_type;
+ u8 pre_arfr_type;
+ u8 cur_arfr_type;
+ u8 pre_retry_limit_type;
+ u8 cur_retry_limit_type;
+ u8 pre_ampdu_time_type;
+ u8 cur_ampdu_time_type;
};
struct coex_sta_8192e_2ant {
static struct coex_sta_8723b_1ant glcoex_sta_8723b_1ant;
static struct coex_sta_8723b_1ant *coex_sta = &glcoex_sta_8723b_1ant;
-static const char *const GLBtInfoSrc8723b1Ant[] = {
+static const char *const glbt_info_src_8723b_1ant[] = {
"BT Info[wifi fw]",
"BT Info[bt rsp]",
"BT Info[bt auto report]",
/***************************************************************
* local function start with halbtc8723b1ant_
***************************************************************/
-static u8 halbtc8723b1ant_bt_rssi_state(struct btc_coexist *btcoexist,
- u8 level_num, u8 rssi_thresh,
- u8 rssi_thresh1)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- s32 bt_rssi = 0;
- u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
-
- bt_rssi = coex_sta->bt_rssi;
-
- if (level_num == 2) {
- if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
- (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- if (bt_rssi >= rssi_thresh +
- BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT) {
- bt_rssi_state = BTC_RSSI_STATE_HIGH;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state switch to High\n");
- } else {
- bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state stay at Low\n");
- }
- } else {
- if (bt_rssi < rssi_thresh) {
- bt_rssi_state = BTC_RSSI_STATE_LOW;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state switch to Low\n");
- } else {
- bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state stay at High\n");
- }
- }
- } else if (level_num == 3) {
- if (rssi_thresh > rssi_thresh1) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi thresh error!!\n");
- return coex_sta->pre_bt_rssi_state;
- }
-
- if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
- (coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- if (bt_rssi >= rssi_thresh +
- BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT) {
- bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state switch to Medium\n");
- } else {
- bt_rssi_state = BTC_RSSI_STATE_STAY_LOW;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state stay at Low\n");
- }
- } else if ((coex_sta->pre_bt_rssi_state ==
- BTC_RSSI_STATE_MEDIUM) ||
- (coex_sta->pre_bt_rssi_state ==
- BTC_RSSI_STATE_STAY_MEDIUM)) {
- if (bt_rssi >= rssi_thresh1 +
- BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT) {
- bt_rssi_state = BTC_RSSI_STATE_HIGH;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state switch to High\n");
- } else if (bt_rssi < rssi_thresh) {
- bt_rssi_state = BTC_RSSI_STATE_LOW;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state switch to Low\n");
- } else {
- bt_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state stay at Medium\n");
- }
- } else {
- if (bt_rssi < rssi_thresh1) {
- bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state switch to Medium\n");
- } else {
- bt_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Rssi state stay at High\n");
- }
- }
- }
-
- coex_sta->pre_bt_rssi_state = bt_rssi_state;
-
- return bt_rssi_state;
-}
-
-static u8 halbtc8723b1ant_wifi_rssi_state(struct btc_coexist *btcoexist,
- u8 index, u8 level_num,
- u8 rssi_thresh, u8 rssi_thresh1)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- s32 wifi_rssi = 0;
- u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
-
- btcoexist->btc_get(btcoexist,
- BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
-
- if (level_num == 2) {
- if ((coex_sta->pre_wifi_rssi_state[index] ==
- BTC_RSSI_STATE_LOW) ||
- (coex_sta->pre_wifi_rssi_state[index] ==
- BTC_RSSI_STATE_STAY_LOW)) {
- if (wifi_rssi >= rssi_thresh +
- BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT) {
- wifi_rssi_state = BTC_RSSI_STATE_HIGH;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state switch to High\n");
- } else {
- wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state stay at Low\n");
- }
- } else {
- if (wifi_rssi < rssi_thresh) {
- wifi_rssi_state = BTC_RSSI_STATE_LOW;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state switch to Low\n");
- } else {
- wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state stay at High\n");
- }
- }
- } else if (level_num == 3) {
- if (rssi_thresh > rssi_thresh1) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI thresh error!!\n");
- return coex_sta->pre_wifi_rssi_state[index];
- }
-
- if ((coex_sta->pre_wifi_rssi_state[index] ==
- BTC_RSSI_STATE_LOW) ||
- (coex_sta->pre_wifi_rssi_state[index] ==
- BTC_RSSI_STATE_STAY_LOW)) {
- if (wifi_rssi >= rssi_thresh +
- BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT) {
- wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state switch to Medium\n");
- } else {
- wifi_rssi_state = BTC_RSSI_STATE_STAY_LOW;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state stay at Low\n");
- }
- } else if ((coex_sta->pre_wifi_rssi_state[index] ==
- BTC_RSSI_STATE_MEDIUM) ||
- (coex_sta->pre_wifi_rssi_state[index] ==
- BTC_RSSI_STATE_STAY_MEDIUM)) {
- if (wifi_rssi >= rssi_thresh1 +
- BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT) {
- wifi_rssi_state = BTC_RSSI_STATE_HIGH;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state switch to High\n");
- } else if (wifi_rssi < rssi_thresh) {
- wifi_rssi_state = BTC_RSSI_STATE_LOW;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state switch to Low\n");
- } else {
- wifi_rssi_state = BTC_RSSI_STATE_STAY_MEDIUM;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state stay at Medium\n");
- }
- } else {
- if (wifi_rssi < rssi_thresh1) {
- wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state switch to Medium\n");
- } else {
- wifi_rssi_state = BTC_RSSI_STATE_STAY_HIGH;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], wifi RSSI state stay at High\n");
- }
- }
- }
-
- coex_sta->pre_wifi_rssi_state[index] = wifi_rssi_state;
-
- return wifi_rssi_state;
-}
static void halbtc8723b1ant_updatera_mask(struct btc_coexist *btcoexist,
bool force_exec, u32 dis_rate_mask)
coex_dm->curra_mask = dis_rate_mask;
if (force_exec || (coex_dm->prera_mask != coex_dm->curra_mask))
- btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
&coex_dm->curra_mask);
coex_dm->prera_mask = coex_dm->curra_mask;
coex_dm->cur_ampdu_time_type)) {
switch (coex_dm->cur_ampdu_time_type) {
case 0: /* normal mode */
- btcoexist->btc_write_1byte(btcoexist, 0x456,
- coex_dm->backup_ampdu_max_time);
- break;
+ btcoexist->btc_write_1byte(btcoexist, 0x456,
+ coex_dm->backup_ampdu_max_time);
+ break;
case 1: /* AMPDU timw = 0x38 * 32us */
- btcoexist->btc_write_1byte(btcoexist,
- 0x456, 0x38);
- break;
+ btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
+ break;
default:
- break;
+ break;
}
}
halbtc8723b1ant_updatera_mask(btcoexist, force_exec,
0x00000003);
break;
- /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4*/
+ /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
case 2:
halbtc8723b1ant_updatera_mask(btcoexist, force_exec,
0x0001f1f7);
coex_sta->c2h_bt_info_req_sent = true;
- h2c_parameter[0] |= BIT0; /* trigger*/
+ /* trigger */
+ h2c_parameter[0] |= BIT0;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
bt_link_info->hid_only = false;
}
-static u8 halbtc8723b1ant_action_algorithm(struct btc_coexist *btcoexist)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- bool bt_hs_on = false;
- u8 algorithm = BT_8723B_1ANT_COEX_ALGO_UNDEFINED;
- u8 numdiffprofile = 0;
-
- btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
-
- if (!bt_link_info->bt_link_exist) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], No BT link exists!!!\n");
- return algorithm;
- }
-
- if (bt_link_info->sco_exist)
- numdiffprofile++;
- if (bt_link_info->hid_exist)
- numdiffprofile++;
- if (bt_link_info->pan_exist)
- numdiffprofile++;
- if (bt_link_info->a2dp_exist)
- numdiffprofile++;
-
- if (numdiffprofile == 1) {
- if (bt_link_info->sco_exist) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Profile = SCO only\n");
- algorithm = BT_8723B_1ANT_COEX_ALGO_SCO;
- } else {
- if (bt_link_info->hid_exist) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Profile = HID only\n");
- algorithm = BT_8723B_1ANT_COEX_ALGO_HID;
- } else if (bt_link_info->a2dp_exist) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Profile = A2DP only\n");
- algorithm = BT_8723B_1ANT_COEX_ALGO_A2DP;
- } else if (bt_link_info->pan_exist) {
- if (bt_hs_on) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = PAN(HS) only\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_PANHS;
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = PAN(EDR) only\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_PANEDR;
- }
- }
- }
- } else if (numdiffprofile == 2) {
- if (bt_link_info->sco_exist) {
- if (bt_link_info->hid_exist) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Profile = SCO + HID\n");
- algorithm = BT_8723B_1ANT_COEX_ALGO_HID;
- } else if (bt_link_info->a2dp_exist) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Profile = SCO + A2DP ==> SCO\n");
- algorithm = BT_8723B_1ANT_COEX_ALGO_SCO;
- } else if (bt_link_info->pan_exist) {
- if (bt_hs_on) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = SCO + PAN(HS)\n");
- algorithm = BT_8723B_1ANT_COEX_ALGO_SCO;
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = SCO + PAN(EDR)\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_PANEDR_HID;
- }
- }
- } else {
- if (bt_link_info->hid_exist &&
- bt_link_info->a2dp_exist) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Profile = HID + A2DP\n");
- algorithm = BT_8723B_1ANT_COEX_ALGO_HID_A2DP;
- } else if (bt_link_info->hid_exist &&
- bt_link_info->pan_exist) {
- if (bt_hs_on) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = HID + PAN(HS)\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_HID_A2DP;
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = HID + PAN(EDR)\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_PANEDR_HID;
- }
- } else if (bt_link_info->pan_exist &&
- bt_link_info->a2dp_exist) {
- if (bt_hs_on) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = A2DP + PAN(HS)\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS;
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = A2DP + PAN(EDR)\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP;
- }
- }
- }
- } else if (numdiffprofile == 3) {
- if (bt_link_info->sco_exist) {
- if (bt_link_info->hid_exist &&
- bt_link_info->a2dp_exist) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n");
- algorithm = BT_8723B_1ANT_COEX_ALGO_HID;
- } else if (bt_link_info->hid_exist &&
- bt_link_info->pan_exist) {
- if (bt_hs_on) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = SCO + HID + PAN(HS)\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_HID_A2DP;
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = SCO + HID + PAN(EDR)\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_PANEDR_HID;
- }
- } else if (bt_link_info->pan_exist &&
- bt_link_info->a2dp_exist) {
- if (bt_hs_on) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = SCO + A2DP + PAN(HS)\n");
- algorithm = BT_8723B_1ANT_COEX_ALGO_SCO;
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = SCO + A2DP + PAN(EDR) ==> HID\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_PANEDR_HID;
- }
- }
- } else {
- if (bt_link_info->hid_exist &&
- bt_link_info->pan_exist &&
- bt_link_info->a2dp_exist) {
- if (bt_hs_on) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = HID + A2DP + PAN(HS)\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_HID_A2DP;
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = HID + A2DP + PAN(EDR)\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR;
- }
- }
- }
- } else if (numdiffprofile >= 3) {
- if (bt_link_info->sco_exist) {
- if (bt_link_info->hid_exist &&
- bt_link_info->pan_exist &&
- bt_link_info->a2dp_exist) {
- if (bt_hs_on) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], Error!!! BT Profile = SCO + HID + A2DP + PAN(HS)\n");
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST,
- DBG_LOUD,
- "[BTCoex], BT Profile = SCO + HID + A2DP + PAN(EDR)==>PAN(EDR)+HID\n");
- algorithm =
- BT_8723B_1ANT_COEX_ALGO_PANEDR_HID;
- }
- }
- }
- }
-
- return algorithm;
-}
-
static void btc8723b1ant_set_sw_pen_tx_rate_adapt(struct btc_coexist *btcoexist,
bool low_penalty_ra)
{
if (low_penalty_ra) {
h2c_parameter[1] |= BIT0;
- /*normal rate except MCS7/6/5, OFDM54/48/36 */
+ /* normal rate except MCS7/6/5, OFDM54/48/36 */
h2c_parameter[2] = 0x00;
- h2c_parameter[3] = 0xf7; /*MCS7 or OFDM54 */
- h2c_parameter[4] = 0xf8; /*MCS6 or OFDM48 */
- h2c_parameter[5] = 0xf9; /*MCS5 or OFDM36 */
+ h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */
+ h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */
+ h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */
}
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
}
}
-static void halbtc8723b1ant_SetFwIgnoreWlanAct(struct btc_coexist *btcoexist,
- bool enable)
+static void
+halbtc8723b1ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoexist,
+ bool enable)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
coex_dm->cur_ignore_wlan_act)
return;
}
- halbtc8723b1ant_SetFwIgnoreWlanAct(btcoexist, enable);
+ halbtc8723b1ant_set_fw_ignore_wlan_act(btcoexist, enable);
coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
}
btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
}
-static void halbtc8723b1ant_LpsRpwm(struct btc_coexist *btcoexist,
- bool force_exec,
- u8 lps_val, u8 rpwm_val)
+static void halbtc8723b1ant_lps_rpwm(struct btc_coexist *btcoexist,
+ bool force_exec,
+ u8 lps_val, u8 rpwm_val)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
halbtc8723b1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
}
-static void halbtc8723b1ant_SetAntPath(struct btc_coexist *btcoexist,
- u8 ant_pos_type, bool init_hw_cfg,
- bool wifi_off)
+static void halbtc8723b1ant_set_ant_path(struct btc_coexist *btcoexist,
+ u8 ant_pos_type, bool init_hw_cfg,
+ bool wifi_off)
{
struct btc_board_info *board_info = &btcoexist->board_info;
u32 fw_ver = 0, u32tmp = 0;
if (use_ext_switch) {
if (init_hw_cfg) {
/* 0x4c[23] = 0, 0x4c[24] = 1
- * Antenna control by WL/BT
+ * Antenna control by WL/BT
*/
u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
u32tmp &= ~BIT23;
if (board_info->btdm_ant_pos ==
BTC_ANTENNA_AT_MAIN_PORT) {
- /* Main Ant to BT for IPS case 0x4c[23] = 1 */
+ /* Main Ant to BT for IPS case 0x4c[23] = 1 */
btcoexist->btc_write_1byte_bitmask(btcoexist,
0x64, 0x1,
0x1);
- /*tell firmware "no antenna inverse"*/
+ /* tell firmware "no antenna inverse" */
h2c_parameter[0] = 0;
h2c_parameter[1] = 1; /*ext switch type*/
btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
h2c_parameter);
} else {
- /*Aux Ant to BT for IPS case 0x4c[23] = 1 */
+ /* Aux Ant to BT for IPS case 0x4c[23] = 1 */
btcoexist->btc_write_1byte_bitmask(btcoexist,
0x64, 0x1,
0x0);
- /*tell firmware "antenna inverse"*/
+ /* tell firmware "antenna inverse" */
h2c_parameter[0] = 1;
- h2c_parameter[1] = 1; /*ext switch type*/
+ h2c_parameter[1] = 1; /* ext switch type */
btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
h2c_parameter);
}
}
- /* fixed internal switch first*/
- /* fixed internal switch S1->WiFi, S0->BT*/
+ /* fixed internal switch first
+ * fixed internal switch S1->WiFi, S0->BT
+ */
if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT)
btcoexist->btc_write_2byte(btcoexist, 0x948, 0x0);
- else/* fixed internal switch S0->WiFi, S1->BT*/
+ else /* fixed internal switch S0->WiFi, S1->BT */
btcoexist->btc_write_2byte(btcoexist, 0x948, 0x280);
/* ext switch setting */
} else {
if (init_hw_cfg) {
- /* 0x4c[23] = 1, 0x4c[24] = 0 Antenna control by 0x64*/
+ /* 0x4c[23] = 1, 0x4c[24] = 0 Antenna control by 0x64 */
u32tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
u32tmp |= BIT23;
u32tmp &= ~BIT24;
if (board_info->btdm_ant_pos ==
BTC_ANTENNA_AT_MAIN_PORT) {
- /*Main Ant to WiFi for IPS case 0x4c[23] = 1*/
+ /* Main Ant to WiFi for IPS case 0x4c[23] = 1 */
btcoexist->btc_write_1byte_bitmask(btcoexist,
0x64, 0x1,
0x0);
- /*tell firmware "no antenna inverse"*/
+ /* tell firmware "no antenna inverse" */
h2c_parameter[0] = 0;
- h2c_parameter[1] = 0; /*internal switch type*/
+ h2c_parameter[1] = 0; /* internal switch type */
btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
h2c_parameter);
} else {
- /*Aux Ant to BT for IPS case 0x4c[23] = 1*/
+ /* Aux Ant to BT for IPS case 0x4c[23] = 1 */
btcoexist->btc_write_1byte_bitmask(btcoexist,
0x64, 0x1,
0x1);
- /*tell firmware "antenna inverse"*/
+ /* tell firmware "antenna inverse" */
h2c_parameter[0] = 1;
- h2c_parameter[1] = 0; /*internal switch type*/
+ h2c_parameter[1] = 0; /* internal switch type */
btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
h2c_parameter);
}
}
- /* fixed external switch first*/
- /*Main->WiFi, Aux->BT*/
+ /* fixed external switch first
+ * Main->WiFi, Aux->BT
+ */
if (board_info->btdm_ant_pos ==
BTC_ANTENNA_AT_MAIN_PORT)
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x92c,
0x3, 0x1);
- else/*Main->BT, Aux->WiFi */
+ else /* Main->BT, Aux->WiFi */
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x92c,
0x3, 0x2);
- /* internal switch setting*/
+ /* internal switch setting */
switch (ant_pos_type) {
case BTC_ANT_PATH_WIFI:
if (board_info->btdm_ant_pos ==
halbtc8723b1ant_set_fw_ps_tdma(btcoexist, 0xd3, 0x12,
0x3, 0x14, 0x50);
break;
- /* SoftAP only with no sta associated,BT disable ,
+ /* SoftAP only with no sta associated, BT disable,
* TDMA mode for power saving
* here softap mode screen off will cost 70-80mA for phone
*/
}
} else {
switch (type) {
- case 8: /*PTA Control */
+ case 8: /* PTA Control */
halbtc8723b1ant_set_fw_ps_tdma(btcoexist, 0x8, 0x0,
0x0, 0x0, 0x0);
- halbtc8723b1ant_SetAntPath(btcoexist, BTC_ANT_PATH_PTA,
- false, false);
+ halbtc8723b1ant_set_ant_path(btcoexist,
+ BTC_ANT_PATH_PTA,
+ false, false);
break;
case 0:
- default: /*Software control, Antenna at BT side */
+ default:
+ /* Software control, Antenna at BT side */
halbtc8723b1ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0,
0x0, 0x0, 0x0);
- halbtc8723b1ant_SetAntPath(btcoexist, BTC_ANT_PATH_BT,
- false, false);
+ halbtc8723b1ant_set_ant_path(btcoexist,
+ BTC_ANT_PATH_BT,
+ false, false);
break;
- case 9: /*Software control, Antenna at WiFi side */
+ case 9:
+ /* Software control, Antenna at WiFi side */
halbtc8723b1ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0,
0x0, 0x0, 0x0);
- halbtc8723b1ant_SetAntPath(btcoexist, BTC_ANT_PATH_WIFI,
- false, false);
+ halbtc8723b1ant_set_ant_path(btcoexist,
+ BTC_ANT_PATH_WIFI,
+ false, false);
break;
}
}
coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
}
-static bool halbtc8723b1ant_is_common_action(struct btc_coexist *btcoexist)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- bool commom = false, wifi_connected = false;
- bool wifi_busy = false;
-
- btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
- &wifi_connected);
- btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
-
- if (!wifi_connected &&
- BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE == coex_dm->bt_status) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n");
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
- commom = true;
- } else if (wifi_connected &&
- (BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE ==
- coex_dm->bt_status)) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Wifi connected + BT non connected-idle!!\n");
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
- commom = true;
- } else if (!wifi_connected &&
- (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE ==
- coex_dm->bt_status)) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Wifi non connected-idle + BT connected-idle!!\n");
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
- commom = true;
- } else if (wifi_connected &&
- (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE ==
- coex_dm->bt_status)) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Wifi connected + BT connected-idle!!\n");
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
- commom = true;
- } else if (!wifi_connected &&
- (BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE !=
- coex_dm->bt_status)) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Wifi non connected-idle + BT Busy!!\n");
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
- commom = true;
- } else {
- if (wifi_busy)
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Wifi Connected-Busy + BT Busy!!\n");
- else
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Wifi Connected-Idle + BT Busy!!\n");
-
- commom = false;
- }
-
- return commom;
-}
-
-static void btc8723b1ant_tdma_dur_adj_for_acl(struct btc_coexist *btcoexist,
- u8 wifi_status)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- static s32 up, dn, m, n, wait_count;
- /* 0: no change, +1: increase WiFi duration,
- * -1: decrease WiFi duration
- */
- s32 result;
- u8 retry_count = 0, bt_info_ext;
- bool wifi_busy = false;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TdmaDurationAdjustForAcl()\n");
-
- if (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY == wifi_status)
- wifi_busy = true;
- else
- wifi_busy = false;
-
- if ((BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN ==
- wifi_status) ||
- (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN == wifi_status) ||
- (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT == wifi_status)) {
- if (coex_dm->cur_ps_tdma != 1 && coex_dm->cur_ps_tdma != 2 &&
- coex_dm->cur_ps_tdma != 3 && coex_dm->cur_ps_tdma != 9) {
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
-
- up = 0;
- dn = 0;
- m = 1;
- n = 3;
- result = 0;
- wait_count = 0;
- }
- return;
- }
-
- if (!coex_dm->auto_tdma_adjust) {
- coex_dm->auto_tdma_adjust = true;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], first run TdmaDurationAdjust()!!\n");
-
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
- coex_dm->tdma_adj_type = 2;
-
- up = 0;
- dn = 0;
- m = 1;
- n = 3;
- result = 0;
- wait_count = 0;
- } else {
- /*accquire the BT TRx retry count from BT_Info byte2 */
- retry_count = coex_sta->bt_retry_cnt;
- bt_info_ext = coex_sta->bt_info_ext;
- result = 0;
- wait_count++;
- /* no retry in the last 2-second duration */
- if (retry_count == 0) {
- up++;
- dn--;
-
- if (dn <= 0)
- dn = 0;
-
- if (up >= n) {
- wait_count = 0;
- n = 3;
- up = 0;
- dn = 0;
- result = 1;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Increase wifi duration!!\n");
- }
- } else if (retry_count <= 3) {
- up--;
- dn++;
-
- if (up <= 0)
- up = 0;
-
- if (dn == 2) {
- if (wait_count <= 2)
- m++;
- else
- m = 1;
-
- if (m >= 20)
- m = 20;
-
- n = 3 * m;
- up = 0;
- dn = 0;
- wait_count = 0;
- result = -1;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Decrease wifi duration for retryCounter<3!!\n");
- }
- } else {
- if (wait_count == 1)
- m++;
- else
- m = 1;
-
- if (m >= 20)
- m = 20;
-
- n = 3 * m;
- up = 0;
- dn = 0;
- wait_count = 0;
- result = -1;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Decrease wifi duration for retryCounter>3!!\n");
- }
-
- if (result == -1) {
- if ((BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(bt_info_ext)) &&
- ((coex_dm->cur_ps_tdma == 1) ||
- (coex_dm->cur_ps_tdma == 2))) {
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 1) {
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- }
- } else if (result == 1) {
- if ((BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(bt_info_ext)) &&
- ((coex_dm->cur_ps_tdma == 1) ||
- (coex_dm->cur_ps_tdma == 2))) {
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
- coex_dm->tdma_adj_type = 1;
- }
- } else { /*no change */
- /*if busy / idle change */
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex],********* TDMA(on, %d) ********\n",
- coex_dm->cur_ps_tdma);
- }
-
- if (coex_dm->cur_ps_tdma != 1 && coex_dm->cur_ps_tdma != 2 &&
- coex_dm->cur_ps_tdma != 9 && coex_dm->cur_ps_tdma != 11) {
- /* recover to previous adjust type */
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
- coex_dm->tdma_adj_type);
- }
- }
-}
-
-static void btc8723b1ant_pstdmachkpwrsave(struct btc_coexist *btcoexist,
- bool new_ps_state)
+static void halbtc8723b1ant_ps_tdma_chk_pwr_save(struct btc_coexist *btcoexist,
+ bool new_ps_state)
{
u8 lps_mode = 0x0;
btcoexist->btc_get(btcoexist, BTC_GET_U1_LPS_MODE, &lps_mode);
- if (lps_mode) { /* already under LPS state */
+ if (lps_mode) {
+ /* already under LPS state */
if (new_ps_state) {
/* keep state under LPS, do nothing. */
} else {
halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
false, 0);
}
- } else { /* NO PS state */
+ } else {
+ /* NO PS state */
if (new_ps_state) {
/* will enter LPS state, turn off psTdma first */
halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS, NULL);
break;
case BTC_PS_LPS_ON:
- btc8723b1ant_pstdmachkpwrsave(btcoexist, true);
- halbtc8723b1ant_LpsRpwm(btcoexist, NORMAL_EXEC, lps_val,
- rpwm_val);
- /* when coex force to enter LPS, do not enter 32k low power. */
+ halbtc8723b1ant_ps_tdma_chk_pwr_save(btcoexist, true);
+ halbtc8723b1ant_lps_rpwm(btcoexist, NORMAL_EXEC, lps_val,
+ rpwm_val);
+ /* when coex force to enter LPS, do not enter 32k low power */
low_pwr_disable = true;
btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
&low_pwr_disable);
- /* power save must executed before psTdma. */
+ /* power save must executed before psTdma */
btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, NULL);
break;
case BTC_PS_LPS_OFF:
- btc8723b1ant_pstdmachkpwrsave(btcoexist, false);
+ halbtc8723b1ant_ps_tdma_chk_pwr_save(btcoexist, false);
btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS, NULL);
break;
default:
}
}
-/***************************************************
- *
- * Software Coex Mechanism start
- *
- ***************************************************/
-/* SCO only or SCO+PAN(HS) */
-static void halbtc8723b1ant_action_sco(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, true);
-}
-
-static void halbtc8723b1ant_action_hid(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, true);
-}
-
-/*A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
-static void halbtc8723b1ant_action_a2dp(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
-}
-
-static void halbtc8723b1ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
-}
-
-static void halbtc8723b1ant_action_pan_edr(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
-}
-
-/* PAN(HS) only */
-static void halbtc8723b1ant_action_pan_hs(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
-}
-
-/*PAN(EDR)+A2DP */
-static void halbtc8723b1ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, false);
-}
-
-static void halbtc8723b1ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, true);
-}
-
-/* HID+A2DP+PAN(EDR) */
-static void btc8723b1ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, true);
-}
-
-static void halbtc8723b1ant_action_hid_a2dp(struct btc_coexist *btcoexist)
-{
- halbtc8723b1ant_sw_mechanism(btcoexist, true);
-}
-
/*****************************************************
*
* Non-Software Coex Mechanism start
&wifi_connected);
/* tdma and coex table */
-
if (bt_link_info->sco_exist) {
halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
- } else { /* HID */
+ } else {
+ /* HID */
halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 5);
}
struct btc_coexist *btcoexist,
u8 wifi_status)
{
- u8 bt_rssi_state;
-
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- bt_rssi_state = halbtc8723b1ant_bt_rssi_state(btcoexist, 2, 28, 0);
- if (bt_link_info->hid_only) { /*HID */
+ if (bt_link_info->hid_only) { /* HID */
btc8723b1ant_act_bt_sco_hid_only_busy(btcoexist, wifi_status);
coex_dm->auto_tdma_adjust = false;
return;
- } else if (bt_link_info->a2dp_only) { /*A2DP */
- if (BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE == wifi_status) {
+ } else if (bt_link_info->a2dp_only) { /* A2DP */
+ if (wifi_status == BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE) {
halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
false, 8);
halbtc8723b1ant_coex_table_with_type(btcoexist,
NORMAL_EXEC, 2);
coex_dm->auto_tdma_adjust = false;
- } else if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
- (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b1ant_tdma_dur_adj_for_acl(btcoexist,
- wifi_status);
- halbtc8723b1ant_coex_table_with_type(btcoexist,
- NORMAL_EXEC, 1);
- } else { /*for low BT RSSI */
+ } else { /* for low BT RSSI */
halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
true, 11);
halbtc8723b1ant_coex_table_with_type(btcoexist,
coex_dm->auto_tdma_adjust = false;
}
} else if (bt_link_info->hid_exist &&
- bt_link_info->a2dp_exist) { /*HID+A2DP */
- halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
+ bt_link_info->a2dp_exist) { /* HID + A2DP */
+ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
coex_dm->auto_tdma_adjust = false;
halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
- /*PAN(OPP,FTP), HID+PAN(OPP,FTP) */
+ /* PAN(OPP,FTP), HID + PAN(OPP,FTP) */
} else if (bt_link_info->pan_only ||
(bt_link_info->hid_exist && bt_link_info->pan_exist)) {
halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 6);
coex_dm->auto_tdma_adjust = false;
- /*A2DP+PAN(OPP,FTP), HID+A2DP+PAN(OPP,FTP)*/
+ /* A2DP + PAN(OPP,FTP), HID + A2DP + PAN(OPP,FTP) */
} else if ((bt_link_info->a2dp_exist && bt_link_info->pan_exist) ||
(bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
bt_link_info->pan_exist)) {
halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
}
-static void btc8723b1ant_action_wifi_not_conn_scan(struct btc_coexist *btcoex)
+static void
+btc8723b1ant_action_wifi_not_conn_scan(struct btc_coexist *btcoexist)
{
- struct btc_bt_link_info *bt_link_info = &btcoex->bt_link_info;
+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- halbtc8723b1ant_power_save_state(btcoex, BTC_PS_WIFI_NATIVE,
+ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
0x0, 0x0);
/* tdma and coex table */
if (BT_8723B_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
if (bt_link_info->a2dp_exist && bt_link_info->pan_exist) {
- halbtc8723b1ant_ps_tdma(btcoex, NORMAL_EXEC,
+ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
true, 22);
- halbtc8723b1ant_coex_table_with_type(btcoex,
+ halbtc8723b1ant_coex_table_with_type(btcoexist,
NORMAL_EXEC, 1);
} else if (bt_link_info->pan_only) {
- halbtc8723b1ant_ps_tdma(btcoex, NORMAL_EXEC,
+ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
true, 20);
- halbtc8723b1ant_coex_table_with_type(btcoex,
+ halbtc8723b1ant_coex_table_with_type(btcoexist,
NORMAL_EXEC, 2);
} else {
- halbtc8723b1ant_ps_tdma(btcoex, NORMAL_EXEC,
+ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC,
true, 20);
- halbtc8723b1ant_coex_table_with_type(btcoex,
+ halbtc8723b1ant_coex_table_with_type(btcoexist,
NORMAL_EXEC, 1);
}
} else if ((BT_8723B_1ANT_BT_STATUS_SCO_BUSY == coex_dm->bt_status) ||
(BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY ==
coex_dm->bt_status)){
- btc8723b1ant_act_bt_sco_hid_only_busy(btcoex,
+ btc8723b1ant_act_bt_sco_hid_only_busy(btcoexist,
BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN);
} else {
- halbtc8723b1ant_ps_tdma(btcoex, NORMAL_EXEC, false, 8);
- halbtc8723b1ant_coex_table_with_type(btcoex, NORMAL_EXEC, 2);
+ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
}
}
-static void btc8723b1ant_act_wifi_not_conn_asso_auth(struct btc_coexist *btcoex)
+static void
+btc8723b1ant_act_wifi_not_conn_asso_auth(struct btc_coexist *btcoexist)
{
- struct btc_bt_link_info *bt_link_info = &btcoex->bt_link_info;
+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- halbtc8723b1ant_power_save_state(btcoex, BTC_PS_WIFI_NATIVE,
+ halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
0x0, 0x0);
if ((BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE == coex_dm->bt_status) ||
(bt_link_info->sco_exist) || (bt_link_info->hid_only) ||
(bt_link_info->a2dp_only) || (bt_link_info->pan_only)) {
- halbtc8723b1ant_ps_tdma(btcoex, NORMAL_EXEC, false, 8);
- halbtc8723b1ant_coex_table_with_type(btcoex, NORMAL_EXEC, 7);
+ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
} else {
- halbtc8723b1ant_ps_tdma(btcoex, NORMAL_EXEC, true, 20);
- halbtc8723b1ant_coex_table_with_type(btcoex, NORMAL_EXEC, 1);
+ halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
+ halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
}
}
}
}
-static void btc8723b1ant_run_sw_coex_mech(struct btc_coexist *btcoexist)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 algorithm = 0;
-
- algorithm = halbtc8723b1ant_action_algorithm(btcoexist);
- coex_dm->cur_algorithm = algorithm;
-
- if (!halbtc8723b1ant_is_common_action(btcoexist)) {
- switch (coex_dm->cur_algorithm) {
- case BT_8723B_1ANT_COEX_ALGO_SCO:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = SCO\n");
- halbtc8723b1ant_action_sco(btcoexist);
- break;
- case BT_8723B_1ANT_COEX_ALGO_HID:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = HID\n");
- halbtc8723b1ant_action_hid(btcoexist);
- break;
- case BT_8723B_1ANT_COEX_ALGO_A2DP:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = A2DP\n");
- halbtc8723b1ant_action_a2dp(btcoexist);
- break;
- case BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = A2DP+PAN(HS)\n");
- halbtc8723b1ant_action_a2dp_pan_hs(btcoexist);
- break;
- case BT_8723B_1ANT_COEX_ALGO_PANEDR:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = PAN(EDR)\n");
- halbtc8723b1ant_action_pan_edr(btcoexist);
- break;
- case BT_8723B_1ANT_COEX_ALGO_PANHS:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = HS mode\n");
- halbtc8723b1ant_action_pan_hs(btcoexist);
- break;
- case BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = PAN+A2DP\n");
- halbtc8723b1ant_action_pan_edr_a2dp(btcoexist);
- break;
- case BT_8723B_1ANT_COEX_ALGO_PANEDR_HID:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = PAN(EDR)+HID\n");
- halbtc8723b1ant_action_pan_edr_hid(btcoexist);
- break;
- case BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = HID+A2DP+PAN\n");
- btc8723b1ant_action_hid_a2dp_pan_edr(btcoexist);
- break;
- case BT_8723B_1ANT_COEX_ALGO_HID_A2DP:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = HID+A2DP\n");
- halbtc8723b1ant_action_hid_a2dp(btcoexist);
- break;
- default:
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Action algorithm = coexist All Off!!\n");
- break;
- }
- coex_dm->pre_algorithm = coex_dm->cur_algorithm;
- }
-}
-
static void halbtc8723b1ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
bool increase_scan_dev_num = false;
bool bt_ctrl_agg_buf_size = false;
u8 agg_buf_size = 5;
- u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
u32 wifi_link_status = 0;
u32 num_of_wifi_link = 0;
if (!bt_link_info->sco_exist && !bt_link_info->hid_exist) {
halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
} else {
- if (wifi_connected) {
- wifi_rssi_state =
- halbtc8723b1ant_wifi_rssi_state(btcoexist,
- 1, 2, 30, 0);
+ if (wifi_connected)
halbtc8723b1ant_limited_tx(btcoexist,
NORMAL_EXEC, 1, 1, 1, 1);
- } else {
+ else
halbtc8723b1ant_limited_tx(btcoexist, NORMAL_EXEC,
0, 0, 0, 0);
- }
}
if (bt_link_info->sco_exist) {
halbtc8723b1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
bt_ctrl_agg_buf_size, agg_buf_size);
- btc8723b1ant_run_sw_coex_mech(btcoexist);
-
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
if (coex_sta->c2h_bt_inquiry_page) {
btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
/* Enable counter statistics */
- /*0x76e[3] =1, WLAN_Act control by PTA */
+ /*0x76e[3] = 1, WLAN_Act control by PTA */
btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
btcoexist->btc_write_1byte(btcoexist, 0x778, 0x1);
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
- /*Antenna config */
- halbtc8723b1ant_SetAntPath(btcoexist, BTC_ANT_PATH_PTA, true, false);
+ /* Antenna config */
+ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA, true, false);
/* PTA parameter */
halbtc8723b1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
}
-static void halbtc8723b1ant_wifi_off_hw_cfg(struct btc_coexist *btcoexist)
-{
- /* set wlan_act to low */
- btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
-}
-
/**************************************************************
- * work around function start with wa_halbtc8723b1ant_
- **************************************************************/
-/**************************************************************
- * extern function start with EXhalbtc8723b1ant_
+ * extern function start with ex_halbtc8723b1ant_
**************************************************************/
void ex_halbtc8723b1ant_init_hwconfig(struct btc_coexist *btcoexist)
if (coex_sta->bt_info_c2h_cnt[i]) {
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
"\r\n %-35s = %7ph(%d)",
- GLBtInfoSrc8723b1Ant[i],
+ glbt_info_src_8723b_1ant[i],
coex_sta->bt_info_c2h[i],
coex_sta->bt_info_c2h_cnt[i]);
}
"[BTCoex], IPS ENTER notify\n");
coex_sta->under_ips = true;
- halbtc8723b1ant_SetAntPath(btcoexist, BTC_ANT_PATH_BT,
- false, true);
+ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
+ false, true);
/* set PTA control */
halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
halbtc8723b1ant_coex_table_with_type(btcoexist,
NORMAL_EXEC, 0);
- halbtc8723b1ant_wifi_off_hw_cfg(btcoexist);
} else if (BTC_IPS_LEAVE == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], IPS LEAVE notify\n");
if (BTC_SCAN_START == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], SCAN START notify\n");
- if (!wifi_connected) /* non-connected scan */
+ if (!wifi_connected)
+ /* non-connected scan */
btc8723b1ant_action_wifi_not_conn_scan(btcoexist);
- else /* wifi is connected */
+ else
+ /* wifi is connected */
btc8723b1ant_action_wifi_conn_scan(btcoexist);
} else if (BTC_SCAN_FINISH == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], SCAN FINISH notify\n");
- if (!wifi_connected) /* non-connected scan */
+ if (!wifi_connected)
+ /* non-connected scan */
btc8723b1ant_action_wifi_not_conn(btcoexist);
else
halbtc8723b1ant_action_wifi_connected(btcoexist);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
&wifi_connected);
- if (!wifi_connected) /* non-connected scan */
+ if (!wifi_connected)
+ /* non-connected scan */
btc8723b1ant_action_wifi_not_conn(btcoexist);
else
halbtc8723b1ant_action_wifi_connected(btcoexist);
coex_sta->a2dp_exist = false;
coex_sta->hid_exist = false;
coex_sta->sco_exist = false;
- } else { /* connection exists */
+ } else {
+ /* connection exists */
coex_sta->bt_link_exist = true;
if (bt_info & BT_INFO_8723B_1ANT_B_FTP)
coex_sta->pan_exist = true;
btcoexist->stop_coex_dm = true;
- halbtc8723b1ant_SetAntPath(btcoexist, BTC_ANT_PATH_BT, false, true);
+ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true);
- halbtc8723b1ant_wifi_off_hw_cfg(btcoexist);
halbtc8723b1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Pnp notify to SLEEP\n");
btcoexist->stop_coex_dm = true;
- halbtc8723b1ant_SetAntPath(btcoexist, BTC_ANT_PATH_BT, false,
- true);
+ halbtc8723b1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false,
+ true);
halbtc8723b1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
0x0, 0x0);
halbtc8723b1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
halbtc8723b1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
- halbtc8723b1ant_wifi_off_hw_cfg(btcoexist);
} else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Pnp notify to WAKE UP\n");
return wifi_rssi_state;
}
+static
+void btc8723b2ant_limited_rx(struct btc_coexist *btcoexist, bool force_exec,
+ bool rej_ap_agg_pkt, bool bt_ctrl_agg_buf_size,
+ u8 agg_buf_size)
+{
+ bool reject_rx_agg = rej_ap_agg_pkt;
+ bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
+ u8 rx_agg_size = agg_buf_size;
+
+ /* ============================================ */
+ /* Rx Aggregation related setting */
+ /* ============================================ */
+ btcoexist->btc_set(btcoexist, BTC_SET_BL_TO_REJ_AP_AGG_PKT,
+ &reject_rx_agg);
+ /* decide BT control aggregation buf size or not */
+ btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
+ &bt_ctrl_rx_agg_size);
+ /* aggregate buf size, only work when BT control Rx aggregate size */
+ btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
+ /* real update aggregation setting */
+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
+}
+
static void btc8723b2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
u32 reg_hp_txrx, reg_lp_txrx, u32tmp;
u32 reg_hp_tx = 0, reg_hp_rx = 0;
u32 reg_lp_tx = 0, reg_lp_rx = 0;
coex_sta->low_priority_tx = reg_lp_tx;
coex_sta->low_priority_rx = reg_lp_rx;
+ if ((coex_sta->low_priority_tx > 1050) &&
+ (!coex_sta->c2h_bt_inquiry_page))
+ coex_sta->pop_event_cnt++;
+
+ if ((coex_sta->low_priority_rx >= 950) &&
+ (coex_sta->low_priority_rx >= coex_sta->low_priority_tx) &&
+ (!coex_sta->under_ips))
+ bt_link_info->slave_role = true;
+ else
+ bt_link_info->slave_role = false;
+
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], High Priority Tx/Rx(reg 0x%x)=0x%x(%d)/0x%x(%d)\n",
reg_hp_txrx, reg_hp_tx, reg_hp_tx, reg_hp_rx, reg_hp_rx);
btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
}
+static void btc8723b2ant_monitor_wifi_ctr(struct btc_coexist *btcoexist)
+{
+ if (coex_sta->under_ips) {
+ coex_sta->crc_ok_cck = 0;
+ coex_sta->crc_ok_11g = 0;
+ coex_sta->crc_ok_11n = 0;
+ coex_sta->crc_ok_11n_agg = 0;
+
+ coex_sta->crc_err_cck = 0;
+ coex_sta->crc_err_11g = 0;
+ coex_sta->crc_err_11n = 0;
+ coex_sta->crc_err_11n_agg = 0;
+ } else {
+ coex_sta->crc_ok_cck =
+ btcoexist->btc_read_4byte(btcoexist, 0xf88);
+ coex_sta->crc_ok_11g =
+ btcoexist->btc_read_2byte(btcoexist, 0xf94);
+ coex_sta->crc_ok_11n =
+ btcoexist->btc_read_2byte(btcoexist, 0xf90);
+ coex_sta->crc_ok_11n_agg =
+ btcoexist->btc_read_2byte(btcoexist, 0xfb8);
+
+ coex_sta->crc_err_cck =
+ btcoexist->btc_read_4byte(btcoexist, 0xf84);
+ coex_sta->crc_err_11g =
+ btcoexist->btc_read_2byte(btcoexist, 0xf96);
+ coex_sta->crc_err_11n =
+ btcoexist->btc_read_2byte(btcoexist, 0xf92);
+ coex_sta->crc_err_11n_agg =
+ btcoexist->btc_read_2byte(btcoexist, 0xfba);
+ }
+
+ /* reset counter */
+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x1);
+ btcoexist->btc_write_1byte_bitmask(btcoexist, 0xf16, 0x1, 0x0);
+}
+
static void btc8723b2ant_query_bt_info(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
static void btc8723b2ant_update_bt_link_info(struct btc_coexist *btcoexist)
{
- /*struct btc_stack_info *stack_info = &btcoexist->stack_info;*/
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
bool bt_hs_on = false;
-#if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 1) /* profile from bt patch */
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
bt_link_info->bt_link_exist = coex_sta->bt_link_exist;
bt_link_info->pan_exist = true;
bt_link_info->bt_link_exist = true;
}
-#else /* profile from bt stack */
- bt_link_info->bt_link_exist = stack_info->bt_link_exist;
- bt_link_info->sco_exist = stack_info->sco_exist;
- bt_link_info->a2dp_exist = stack_info->a2dp_exist;
- bt_link_info->pan_exist = stack_info->pan_exist;
- bt_link_info->hid_exist = stack_info->hid_exist;
-
- /*for win-8 stack HID report error*/
- if (!stack_info->hid_exist)
- stack_info->hid_exist = coex_sta->hid_exist;
- /*sync BTInfo with BT firmware and stack*/
- /* when stack HID report error, here we use the info from bt fw.*/
- if (!stack_info->bt_link_exist)
- stack_info->bt_link_exist = coex_sta->bt_link_exist;
-#endif
+
/* check if Sco only */
if (bt_link_info->sco_exist && !bt_link_info->a2dp_exist &&
!bt_link_info->pan_exist && !bt_link_info->hid_exist)
return algorithm;
}
-static bool btc8723b_need_dec_pwr(struct btc_coexist *btcoexist)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- bool ret = false;
- bool bt_hs_on = false, wifi_connected = false;
- s32 bt_hs_rssi = 0;
- u8 bt_rssi_state;
-
- if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on))
- return false;
- if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
- &wifi_connected))
- return false;
- if (!btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi))
- return false;
-
- bt_rssi_state = btc8723b2ant_bt_rssi_state(btcoexist, 2, 29, 0);
-
- if (wifi_connected) {
- if (bt_hs_on) {
- if (bt_hs_rssi > 37) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Need to decrease bt power for HS mode!!\n");
- ret = true;
- }
- } else {
- if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
- (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Need to decrease bt power for Wifi is connected!!\n");
- ret = true;
- }
- }
- }
-
- return ret;
-}
-
static void btc8723b2ant_set_fw_dac_swing_level(struct btc_coexist *btcoexist,
u8 dac_swing_lvl)
{
}
static void btc8723b2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist,
- bool dec_bt_pwr)
+ u8 dec_bt_pwr_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
- h2c_parameter[0] = 0;
-
- if (dec_bt_pwr)
- h2c_parameter[0] |= BIT1;
+ h2c_parameter[0] = dec_bt_pwr_lvl;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], decrease Bt Power : %s, FW write 0x62=0x%x\n",
- (dec_bt_pwr ? "Yes!!" : "No!!"), h2c_parameter[0]);
+ "[BTCoex], decrease Bt Power Level : %u\n", dec_bt_pwr_lvl);
btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
}
static void btc8723b2ant_dec_bt_pwr(struct btc_coexist *btcoexist,
- bool force_exec, bool dec_bt_pwr)
+ bool force_exec, u8 dec_bt_pwr_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s Dec BT power = %s\n",
- force_exec ? "force to" : "", dec_bt_pwr ? "ON" : "OFF");
- coex_dm->cur_dec_bt_pwr = dec_bt_pwr;
+ "[BTCoex], Dec BT power level = %u\n", dec_bt_pwr_lvl);
+ coex_dm->cur_dec_bt_pwr_lvl = dec_bt_pwr_lvl;
if (!force_exec) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], bPreDecBtPwr=%d, bCurDecBtPwr=%d\n",
- coex_dm->pre_dec_bt_pwr, coex_dm->cur_dec_bt_pwr);
+ "[BTCoex], PreDecBtPwrLvl=%d, CurDecBtPwrLvl=%d\n",
+ coex_dm->pre_dec_bt_pwr_lvl,
+ coex_dm->cur_dec_bt_pwr_lvl);
- if (coex_dm->pre_dec_bt_pwr == coex_dm->cur_dec_bt_pwr)
+ if (coex_dm->pre_dec_bt_pwr_lvl == coex_dm->cur_dec_bt_pwr_lvl)
return;
}
- btc8723b2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr);
+ btc8723b2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr_lvl);
- coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
+ coex_dm->pre_dec_bt_pwr_lvl = coex_dm->cur_dec_bt_pwr_lvl;
}
static void btc8723b2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist,
coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
}
-static void btc8723b2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
- bool rx_rf_shrink_on)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- if (rx_rf_shrink_on) {
- /* Shrink RF Rx LPF corner */
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Shrink RF Rx LPF corner!!\n");
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
- 0xfffff, 0xffffc);
- } else {
- /* Resume RF Rx LPF corner */
- /* After initialized, we can use coex_dm->btRf0x1eBackup */
- if (btcoexist->initilized) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Resume RF Rx LPF corner!!\n");
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
- 0xfffff,
- coex_dm->bt_rf0x1e_backup);
- }
- }
-}
-
-static void btc8723b2ant_rf_shrink(struct btc_coexist *btcoexist,
- bool force_exec, bool rx_rf_shrink_on)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s turn Rx RF Shrink = %s\n",
- (force_exec ? "force to" : ""), (rx_rf_shrink_on ?
- "ON" : "OFF"));
- coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
-
- if (!force_exec) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], bPreRfRxLpfShrink=%d, bCurRfRxLpfShrink=%d\n",
- coex_dm->pre_rf_rx_lpf_shrink,
- coex_dm->cur_rf_rx_lpf_shrink);
-
- if (coex_dm->pre_rf_rx_lpf_shrink ==
- coex_dm->cur_rf_rx_lpf_shrink)
- return;
- }
- btc8723b2ant_set_sw_rf_rx_lpf_corner(btcoexist,
- coex_dm->cur_rf_rx_lpf_shrink);
-
- coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
-}
-
static void btc8723b_set_penalty_txrate(struct btc_coexist *btcoexist,
bool low_penalty_ra)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[6] = {0};
- h2c_parameter[0] = 0x6; /* opCode, 0x6= Retry_Penalty*/
+ h2c_parameter[0] = 0x6; /* op_code, 0x6 = Retry_Penalty */
if (low_penalty_ra) {
h2c_parameter[1] |= BIT0;
- /*normal rate except MCS7/6/5, OFDM54/48/36*/
+ /* normal rate except MCS7/6/5, OFDM54/48/36 */
h2c_parameter[2] = 0x00;
- h2c_parameter[3] = 0xf7; /*MCS7 or OFDM54*/
- h2c_parameter[4] = 0xf8; /*MCS6 or OFDM48*/
- h2c_parameter[5] = 0xf9; /*MCS5 or OFDM36*/
+ h2c_parameter[3] = 0xf4; /* MCS7 or OFDM54 */
+ h2c_parameter[4] = 0xf5; /* MCS6 or OFDM48 */
+ h2c_parameter[5] = 0xf6; /* MCS5 or OFDM36 */
}
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- /*return; */
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], %s turn LowPenaltyRA = %s\n",
(force_exec ? "force to" : ""), (low_penalty_ra ?
btc8723b2ant_set_dac_swing_reg(btcoex, 0x18);
}
-static void btc8723b2ant_dac_swing(struct btc_coexist *btcoexist,
- bool force_exec, bool dac_swing_on,
- u32 dac_swing_lvl)
+void btc8723b2ant_dac_swing(struct btc_coexist *btcoexist,
+ bool force_exec, bool dac_swing_on,
+ u32 dac_swing_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
}
-static void btc8723b2ant_set_agc_table(struct btc_coexist *btcoexist,
- bool agc_table_en)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 rssi_adjust_val = 0;
-
- /* BB AGC Gain Table */
- if (agc_table_en) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BB Agc Table On!\n");
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6e1A0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6d1B0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6c1C0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6b1D0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x6a1E0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x691F0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0x68200001);
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BB Agc Table Off!\n");
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xaa1A0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa91B0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa81C0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa71D0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa61E0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa51F0001);
- btcoexist->btc_write_4byte(btcoexist, 0xc78, 0xa4200001);
- }
-
- /* RF Gain */
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x02000);
- if (agc_table_en) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Agc Table On!\n");
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b,
- 0xfffff, 0x38fff);
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b,
- 0xfffff, 0x38ffe);
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Agc Table Off!\n");
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b,
- 0xfffff, 0x380c3);
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x3b,
- 0xfffff, 0x28ce6);
- }
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xef, 0xfffff, 0x0);
-
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x1);
-
- if (agc_table_en) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Agc Table On!\n");
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40,
- 0xfffff, 0x38fff);
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40,
- 0xfffff, 0x38ffe);
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Agc Table Off!\n");
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40,
- 0xfffff, 0x380c3);
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x40,
- 0xfffff, 0x28ce6);
- }
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0xed, 0xfffff, 0x0);
-
- /* set rssiAdjustVal for wifi module. */
- if (agc_table_en)
- rssi_adjust_val = 8;
- btcoexist->btc_set(btcoexist, BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
- &rssi_adjust_val);
-}
-
-static void btc8723b2ant_agc_table(struct btc_coexist *btcoexist,
- bool force_exec, bool agc_table_en)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s %s Agc Table\n",
- (force_exec ? "force to" : ""),
- (agc_table_en ? "Enable" : "Disable"));
- coex_dm->cur_agc_table_en = agc_table_en;
-
- if (!force_exec) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], bPreAgcTableEn=%d, bCurAgcTableEn=%d\n",
- coex_dm->pre_agc_table_en,
- coex_dm->cur_agc_table_en);
-
- if (coex_dm->pre_agc_table_en == coex_dm->cur_agc_table_en)
- return;
- }
- btc8723b2ant_set_agc_table(btcoexist, agc_table_en);
-
- coex_dm->pre_agc_table_en = coex_dm->cur_agc_table_en;
-}
-
static void btc8723b2ant_set_coex_table(struct btc_coexist *btcoexist,
u32 val0x6c0, u32 val0x6c4,
u32 val0x6c8, u8 val0x6cc)
coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
}
-static void btc8723b_coex_tbl_type(struct btc_coexist *btcoexist,
- bool force_exec, u8 type)
+static void btc8723b2ant_coex_table_with_type(struct btc_coexist *btcoexist,
+ bool force_exec, u8 type)
{
switch (type) {
case 0:
btc8723b2ant_coex_table(btcoexist, force_exec, 0x55555555,
- 0x55555555, 0xffff, 0x3);
+ 0x55555555, 0xffffff, 0x3);
break;
case 1:
btc8723b2ant_coex_table(btcoexist, force_exec, 0x55555555,
- 0x5afa5afa, 0xffff, 0x3);
+ 0x5afa5afa, 0xffffff, 0x3);
break;
case 2:
- btc8723b2ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
- 0x5a5a5a5a, 0xffff, 0x3);
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x5ada5ada,
+ 0x5ada5ada, 0xffffff, 0x3);
break;
case 3:
btc8723b2ant_coex_table(btcoexist, force_exec, 0xaaaaaaaa,
- 0xaaaaaaaa, 0xffff, 0x3);
+ 0xaaaaaaaa, 0xffffff, 0x3);
break;
case 4:
btc8723b2ant_coex_table(btcoexist, force_exec, 0xffffffff,
- 0xffffffff, 0xffff, 0x3);
+ 0xffffffff, 0xffffff, 0x3);
break;
case 5:
btc8723b2ant_coex_table(btcoexist, force_exec, 0x5fff5fff,
- 0x5fff5fff, 0xffff, 0x3);
+ 0x5fff5fff, 0xffffff, 0x3);
break;
case 6:
btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
- 0x5a5a5a5a, 0xffff, 0x3);
+ 0x5a5a5a5a, 0xffffff, 0x3);
break;
case 7:
- btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
- 0x5afa5afa, 0xffff, 0x3);
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
+ 0x5ada5ada, 0xffffff, 0x3);
break;
case 8:
- btc8723b2ant_coex_table(btcoexist, force_exec, 0x5aea5aea,
- 0x5aea5aea, 0xffff, 0x3);
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
+ 0x5ada5ada, 0xffffff, 0x3);
break;
case 9:
- btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
- 0x5aea5aea, 0xffff, 0x3);
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
+ 0x5ada5ada, 0xffffff, 0x3);
break;
case 10:
- btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
- 0x5aff5aff, 0xffff, 0x3);
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
+ 0x5ada5ada, 0xffffff, 0x3);
break;
case 11:
- btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
- 0x5a5f5a5f, 0xffff, 0x3);
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
+ 0x5ada5ada, 0xffffff, 0x3);
break;
case 12:
- btc8723b2ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
- 0x5f5f5f5f, 0xffff, 0x3);
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
+ 0x5ada5ada, 0xffffff, 0x3);
+ break;
+ case 13:
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x5fff5fff,
+ 0xaaaaaaaa, 0xffffff, 0x3);
+ break;
+ case 14:
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x5fff5fff,
+ 0x5ada5ada, 0xffffff, 0x3);
+ break;
+ case 15:
+ btc8723b2ant_coex_table(btcoexist, force_exec, 0x55dd55dd,
+ 0xaaaaaaaa, 0xffffff, 0x3);
break;
default:
break;
u8 h2c_parameter[1] = {0};
if (enable)
- h2c_parameter[0] |= BIT0;/* function enable*/
+ h2c_parameter[0] |= BIT0; /* function enable */
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63=0x%x\n",
btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
}
-static void btc8723b2ant_sw_mechanism1(struct btc_coexist *btcoexist,
- bool shrink_rx_lpf, bool low_penalty_ra,
- bool limited_dig, bool bt_lna_constrain)
+static void btc8723b2ant_sw_mechanism(struct btc_coexist *btcoexist,
+ bool shrink_rx_lpf, bool low_penalty_ra,
+ bool limited_dig, bool bt_lna_constrain)
{
- btc8723b2ant_rf_shrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
btc8723b2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
}
-static void btc8723b2ant_sw_mechanism2(struct btc_coexist *btcoexist,
- bool agc_table_shift, bool adc_backoff,
- bool sw_dac_swing, u32 dac_swing_lvl)
-{
- btc8723b2ant_agc_table(btcoexist, NORMAL_EXEC, agc_table_shift);
- btc8723b2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
- dac_swing_lvl);
-}
-
static void btc8723b2ant_set_ant_path(struct btc_coexist *btcoexist,
u8 antpos_type, bool init_hwcfg,
bool wifi_off)
btcoexist->btc_write_1byte(btcoexist, 0x930, 0x77);
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x1);
- /* Force GNT_BT to low */
- btcoexist->btc_write_1byte_bitmask(btcoexist, 0x765, 0x18, 0x0);
+ if (fw_ver >= 0x180000) {
+ /* Use H2C to set GNT_BT to High to avoid A2DP click */
+ h2c_parameter[0] = 1;
+ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
+ h2c_parameter);
+ } else {
+ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
+ }
if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
/* tell firmware "no antenna inverse" */
} else {
/* tell firmware "antenna inverse" */
h2c_parameter[0] = 1;
- h2c_parameter[1] = 1; /* ext switch type */
- btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
+ }
+ } else {
+ if (fw_ver >= 0x180000) {
+ /* Use H2C to set GNT_BT to "Control by PTA"*/
+ h2c_parameter[0] = 0;
+ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1,
h2c_parameter);
btcoexist->btc_write_2byte(btcoexist, 0x948, 0x280);
}
bool turn_on, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
+ struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
+ s8 wifi_duration_adjust = 0x0;
+ u8 tdma_byte4_modify = 0x0;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], %s turn %s PS TDMA, type=%d\n",
(coex_dm->pre_ps_tdma == coex_dm->cur_ps_tdma))
return;
}
+
+ if (coex_sta->scan_ap_num <= 5) {
+ if (coex_sta->a2dp_bit_pool >= 45)
+ wifi_duration_adjust = -15;
+ else if (coex_sta->a2dp_bit_pool >= 35)
+ wifi_duration_adjust = -10;
+ else
+ wifi_duration_adjust = 5;
+ } else if (coex_sta->scan_ap_num <= 20) {
+ if (coex_sta->a2dp_bit_pool >= 45)
+ wifi_duration_adjust = -15;
+ else if (coex_sta->a2dp_bit_pool >= 35)
+ wifi_duration_adjust = -10;
+ else
+ wifi_duration_adjust = 0;
+ } else if (coex_sta->scan_ap_num <= 40) {
+ if (coex_sta->a2dp_bit_pool >= 45)
+ wifi_duration_adjust = -15;
+ else if (coex_sta->a2dp_bit_pool >= 35)
+ wifi_duration_adjust = -10;
+ else
+ wifi_duration_adjust = -5;
+ } else {
+ if (coex_sta->a2dp_bit_pool >= 45)
+ wifi_duration_adjust = -15;
+ else if (coex_sta->a2dp_bit_pool >= 35)
+ wifi_duration_adjust = -10;
+ else
+ wifi_duration_adjust = -10;
+ }
+
+ if ((bt_link_info->slave_role) && (bt_link_info->a2dp_exist))
+ /* 0x778 = 0x1 at wifi slot (no blocking BT Low-Pri pkts) */
+ tdma_byte4_modify = 0x1;
+
if (turn_on) {
switch (type) {
case 1:
default:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0xe1, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xe3, 0x3c,
+ 0x03, 0xf1, 0x90 | tdma_byte4_modify);
break;
case 2:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
- 0x12, 0xe1, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xe3, 0x2d,
+ 0x03, 0xf1, 0x90 | tdma_byte4_modify);
break;
case 3:
- /* This call breaks BT when wireless is active -
- * comment it out for now until a better fix is found:
- * btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
- * 0x3, 0xf1, 0x90);
- */
+ btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
+ 0x3, 0xf1,
+ 0x90 | tdma_byte4_modify);
break;
case 4:
btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10,
- 0x03, 0xf1, 0x90);
+ 0x03, 0xf1,
+ 0x90 | tdma_byte4_modify);
break;
case 5:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0x60, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xe3, 0x3c,
+ 0x3, 0x70, 0x90 | tdma_byte4_modify);
break;
case 6:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
- 0x12, 0x60, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xe3, 0x2d,
+ 0x3, 0x70, 0x90 | tdma_byte4_modify);
break;
case 7:
btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
- 0x3, 0x70, 0x90);
+ 0x3, 0x70,
+ 0x90 | tdma_byte4_modify);
break;
case 8:
btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x10,
- 0x3, 0x70, 0x90);
+ 0x3, 0x70,
+ 0x90 | tdma_byte4_modify);
break;
case 9:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0xe1, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xe3, 0x3c + wifi_duration_adjust,
+ 0x03, 0xf1, 0x90 | tdma_byte4_modify);
break;
case 10:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
- 0x12, 0xe1, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xe3, 0x2d,
+ 0x03, 0xf1, 0x90 | tdma_byte4_modify);
break;
case 11:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0xa,
- 0xa, 0xe1, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
+ 0x3, 0xf1,
+ 0x90 | tdma_byte4_modify);
break;
case 12:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
- 0x5, 0xe1, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10,
+ 0x3, 0xf1,
+ 0x90 | tdma_byte4_modify);
break;
case 13:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0x60, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xe3, 0x3c,
+ 0x3, 0x70, 0x90 | tdma_byte4_modify);
break;
case 14:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
- 0x12, 0x60, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xe3, 0x2d,
+ 0x3, 0x70, 0x90 | tdma_byte4_modify);
break;
case 15:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0xa,
- 0xa, 0x60, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
+ 0x3, 0x70,
+ 0x90 | tdma_byte4_modify);
break;
case 16:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
- 0x5, 0x60, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10,
+ 0x3, 0x70,
+ 0x90 | tdma_byte4_modify);
break;
case 17:
btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x2f,
0x2f, 0x60, 0x90);
break;
case 18:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
- 0x5, 0xe1, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5, 0x5,
+ 0xe1, 0x90);
break;
case 19:
btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
0x03, 0x70, 0x90);
break;
case 71:
- btc8723b2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0xe1, 0x90);
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xe3, 0x3c + wifi_duration_adjust,
+ 0x03, 0xf1, 0x90);
+ break;
+ case 101:
+ case 105:
+ case 113:
+ case 171:
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xd3, 0x3a + wifi_duration_adjust,
+ 0x03, 0x70, 0x50 | tdma_byte4_modify);
+ break;
+ case 102:
+ case 106:
+ case 110:
+ case 114:
+ btc8723b2ant_set_fw_ps_tdma(
+ btcoexist, 0xd3, 0x2d + wifi_duration_adjust,
+ 0x03, 0x70, 0x50 | tdma_byte4_modify);
break;
}
} else {
/* fw all off */
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
/* sw all off */
- btc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false, false, false);
/* hw all off */
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
}
static void btc8723b2ant_init_coex_dm(struct btc_coexist *btcoexist)
btc8723b2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
- btc8723b2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, 0);
+
+ btc8723b2ant_sw_mechanism(btcoexist, false, false, false, false);
- btc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
+ coex_sta->pop_event_cnt = 0;
}
static void btc8723b2ant_action_bt_inquiry(struct btc_coexist *btcoexist)
&wifi_connected);
if (wifi_connected) {
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
} else {
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
}
btc8723b2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
- btc8723b2ant_sw_mechanism1(btcoexist, false, false, false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
-
- coex_dm->need_recover_0x948 = true;
- coex_dm->backup_0x948 = btcoexist->btc_read_2byte(btcoexist, 0x948);
-
- btc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_AUX,
- false, false);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false, false, false);
}
static bool btc8723b2ant_is_common_action(struct btc_coexist *btcoexist)
low_pwr_disable = false;
btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
&low_pwr_disable);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
+ false, false, 0x8);
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi non-connected idle!!\n");
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
0x0);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
- btc8723b2ant_sw_mechanism1(btcoexist, false, false, false,
- false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false, false,
- 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false, false,
+ false);
common = true;
} else {
btcoexist->btc_set(btcoexist,
BTC_SET_ACT_DISABLE_LOW_POWER,
&low_pwr_disable);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
+ false, false, 0x8);
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi connected + BT non connected-idle!!\n");
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
0xfffff, 0x0);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
+ btc8723b2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 0);
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
0xb);
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
- false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
common = true;
} else if (BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE ==
return false;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi connected + BT connected-idle!!\n");
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC,
+ false, false, 0x8);
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
0xfffff, 0x0);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
+ btc8723b2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 0);
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
0xb);
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
- false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
common = true;
} else {
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
0x1, 0xfffff, 0x0);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC,
- 7);
+ btc8723b2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC,
+ 7);
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
true, 21);
btc8723b2ant_fw_dac_swing_lvl(btcoexist,
NORMAL_EXEC,
0xb);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist,
- NORMAL_EXEC,
- true);
- else
- btc8723b2ant_dec_bt_pwr(btcoexist,
- NORMAL_EXEC,
- false);
- btc8723b2ant_sw_mechanism1(btcoexist, false,
- false, false,
- false);
- btc8723b2ant_sw_mechanism2(btcoexist, false,
- false, false,
- 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false,
+ false, false,
+ false);
common = true;
}
}
return common;
}
-static void set_tdma_int1(struct btc_coexist *btcoexist, bool tx_pause,
- s32 result)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- /* Set PS TDMA for max interval == 1 */
- if (tx_pause) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 1\n");
-
- if (coex_dm->cur_ps_tdma == 71) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- coex_dm->tdma_adj_type = 5;
- } else if (coex_dm->cur_ps_tdma == 1) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- coex_dm->tdma_adj_type = 5;
- } else if (coex_dm->cur_ps_tdma == 2) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 3) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 4) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- }
-
- if (coex_dm->cur_ps_tdma == 9) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 13);
- coex_dm->tdma_adj_type = 13;
- } else if (coex_dm->cur_ps_tdma == 10) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 11) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 12) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
-
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 5) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- } else if (coex_dm->cur_ps_tdma == 13) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 8) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- coex_dm->tdma_adj_type = 5;
- } else if (coex_dm->cur_ps_tdma == 16) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 13);
- coex_dm->tdma_adj_type = 13;
- }
- }
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 0\n");
- if (coex_dm->cur_ps_tdma == 5) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 71);
- coex_dm->tdma_adj_type = 71;
- } else if (coex_dm->cur_ps_tdma == 6) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 7) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 8) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
- coex_dm->tdma_adj_type = 4;
- }
-
- if (coex_dm->cur_ps_tdma == 13) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 14) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 15) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 16) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 12);
- coex_dm->tdma_adj_type = 12;
- }
-
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 71) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
- coex_dm->tdma_adj_type = 1;
- } else if (coex_dm->cur_ps_tdma == 1) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- } else if (coex_dm->cur_ps_tdma == 9) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 4) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
- coex_dm->tdma_adj_type = 1;
- } else if (coex_dm->cur_ps_tdma == 1) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 71);
- coex_dm->tdma_adj_type = 71;
- } else if (coex_dm->cur_ps_tdma == 12) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- }
- }
- }
-}
-
-static void set_tdma_int2(struct btc_coexist *btcoexist, bool tx_pause,
- s32 result)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- /* Set PS TDMA for max interval == 2 */
- if (tx_pause) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 1\n");
- if (coex_dm->cur_ps_tdma == 1) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 2) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 3) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 4) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
- coex_dm->tdma_adj_type = 8;
- }
- if (coex_dm->cur_ps_tdma == 9) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 10) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 11) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 12) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 5) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- } else if (coex_dm->cur_ps_tdma == 13) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 8) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 16) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- }
- }
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 0\n");
- if (coex_dm->cur_ps_tdma == 5) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 6) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 7) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 8) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
- coex_dm->tdma_adj_type = 4;
- }
- if (coex_dm->cur_ps_tdma == 13) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 14) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 15) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 16) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 1) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- } else if (coex_dm->cur_ps_tdma == 9) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 4) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 12) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- }
- }
- }
-}
-
-static void set_tdma_int3(struct btc_coexist *btcoexist, bool tx_pause,
- s32 result)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- /* Set PS TDMA for max interval == 3 */
- if (tx_pause) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 1\n");
- if (coex_dm->cur_ps_tdma == 1) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 2) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 3) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 4) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 8);
- coex_dm->tdma_adj_type = 8;
- }
- if (coex_dm->cur_ps_tdma == 9) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 10) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 11) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 12) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 5) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 6) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- } else if (coex_dm->cur_ps_tdma == 13) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 14) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 8) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 6) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 16) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 14) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- }
- }
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 0\n");
- if (coex_dm->cur_ps_tdma == 5) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 6) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 7) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 8) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 4);
- coex_dm->tdma_adj_type = 4;
- }
- if (coex_dm->cur_ps_tdma == 13) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 14) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 15) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 16) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 1) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 2) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- } else if (coex_dm->cur_ps_tdma == 9) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 10) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 4) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 2) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 12) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 10) {
- btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- }
- }
- }
-}
-
static void btc8723b2ant_tdma_duration_adjust(struct btc_coexist *btcoexist,
bool sco_hid, bool tx_pause,
u8 max_interval)
dn = 0;
if (up >= n) {
+ /* if retry count during continuous n*2
+ * seconds is 0, enlarge WiFi duration
+ */
wait_count = 0;
n = 3;
up = 0;
up = 0;
if (dn == 2) {
+ /* if continuous 2 retry count(every 2
+ * seconds) >0 and < 3, reduce WiFi duration
+ */
if (wait_count <= 2)
+ /* avoid loop between the two levels */
m++;
else
m = 1;
if (m >= 20)
+ /* maximum of m = 20 ' will recheck if
+ * need to adjust wifi duration in
+ * maximum time interval 120 seconds
+ */
m = 20;
n = 3 * m;
"[BTCoex], Decrease wifi duration for retry_counter<3!!\n");
}
} else {
+ /* retry count > 3, once retry count > 3, to reduce
+ * WiFi duration
+ */
if (wait_count == 1)
+ /* to avoid loop between the two levels */
m++;
else
m = 1;
if (m >= 20)
+ /* maximum of m = 20 ' will recheck if need to
+ * adjust wifi duration in maximum time interval
+ * 120 seconds
+ */
m = 20;
n = 3 * m;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], max Interval = %d\n", max_interval);
- if (max_interval == 1)
- set_tdma_int1(btcoexist, tx_pause, result);
- else if (max_interval == 2)
- set_tdma_int2(btcoexist, tx_pause, result);
- else if (max_interval == 3)
- set_tdma_int3(btcoexist, tx_pause, result);
}
- /*if current PsTdma not match with the recorded one (when scan, dhcp..),
- *then we have to adjust it back to the previous recorded one.
+ RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
+ "[BTCoex], max Interval = %d\n", max_interval);
+
+ /* if current PsTdma not match with the recorded one (scan, dhcp, ...),
+ * then we have to adjust it back to the previous recorded one.
*/
if (coex_dm->cur_ps_tdma != coex_dm->tdma_adj_type) {
bool scan = false, link = false, roam = false;
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
- else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
-
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- /*for SCO quality at 11b/g mode*/
if (BTC_WIFI_BW_LEGACY == wifi_bw)
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 2);
- else /*for SCO quality & wifi performance balance at 11n mode*/
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 8);
+ /* for SCO quality at 11b/g mode */
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 2);
+ else
+ /* for SCO quality & wifi performance balance at 11n mode */
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 8);
- /*for voice quality */
+ /* for voice quality */
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
/* sw mechanism */
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- true, 0x4);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- true, 0x4);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- true, 0x4);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- true, 0x4);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
}
}
}
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, true, 0x5);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
- else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
-
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- if (BTC_WIFI_BW_LEGACY == wifi_bw) /*/for HID at 11b/g mode*/
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
- else /*for HID quality & wifi performance balance at 11n mode*/
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 9);
+ if (wifi_bw == BTC_WIFI_BW_LEGACY)
+ /* for HID at 11b/g mode */
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
+ else
+ /* for HID quality & wifi performance balance at 11n mode */
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 9);
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
}
}
}
-/*A2DP only / PAN(EDR) only/ A2DP+PAN(HS)*/
+/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
static void btc8723b2ant_action_a2dp(struct btc_coexist *btcoexist)
{
u8 wifi_rssi_state, wifi_rssi_state1, bt_rssi_state;
0x0);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 0);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
/* sw mechanism */
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
if (BTC_WIFI_BW_HT40 == wifi_bw) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- true, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- true, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
}
return;
}
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
- else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
-
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
}
}
}
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
- else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
-
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
btc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 2);
/* sw mechanism */
- btcoexist->btc_get(btcoexist,
- BTC_GET_U4_WIFI_BW, &wifi_bw);
+ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
}
}
}
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 10);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 10);
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
}
}
}
-/*PAN(HS) only*/
+/* PAN(HS) only */
static void btc8723b2ant_action_pan_hs(struct btc_coexist *btcoexist)
{
u8 wifi_rssi_state;
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
-
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
btc8723b2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
}
}
}
-/*PAN(EDR)+A2DP*/
+/* PAN(EDR) + A2DP */
static void btc8723b2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
{
u8 wifi_rssi_state, bt_rssi_state;
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 12);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 12);
if (BTC_WIFI_BW_HT40 == wifi_bw)
btc8723b2ant_tdma_duration_adjust(btcoexist, false,
true, 3);
btc8723b2ant_tdma_duration_adjust(btcoexist, false,
false, 3);
} else {
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
btc8723b2ant_tdma_duration_adjust(btcoexist, false, true, 3);
}
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, false,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, false,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, false,
+ false, false);
}
}
}
bt_rssi_state = btc8723b2ant_bt_rssi_state(btcoexist, 2, 29, 0);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
+
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
if (BTC_WIFI_BW_HT40 == wifi_bw) {
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
3);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 11);
+ btc8723b2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 11);
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
0xfffff, 0x780);
} else {
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC,
6);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
+ btc8723b2ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 7);
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1,
0xfffff, 0x0);
}
btc8723b2ant_tdma_duration_adjust(btcoexist, true, false, 2);
} else {
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 11);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 11);
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff,
0x0);
btc8723b2ant_tdma_duration_adjust(btcoexist, true, true, 2);
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
}
}
}
-/* HID+A2DP+PAN(EDR) */
+/* HID + A2DP + PAN(EDR) */
static void btc8723b2ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
{
u8 wifi_rssi_state, bt_rssi_state;
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 2);
else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, 0);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
}
}
}
btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x0);
+ btc8723b2ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 0x8);
btc8723b2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (btc8723b_need_dec_pwr(btcoexist))
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
- else
- btc8723b2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
-
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- btc8723b_coex_tbl_type(btcoexist, NORMAL_EXEC, 7);
+ btc8723b2ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 7);
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH))
if (BTC_WIFI_BW_HT40 == wifi_bw) {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, true, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, true, true,
+ false, false);
}
} else {
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, true, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
} else {
- btc8723b2ant_sw_mechanism1(btcoexist, false, true,
- false, false);
- btc8723b2ant_sw_mechanism2(btcoexist, false, false,
- false, 0x18);
+ btc8723b2ant_sw_mechanism(btcoexist, false, true,
+ false, false);
}
}
}
static void btc8723b2ant_wifioff_hwcfg(struct btc_coexist *btcoexist)
{
+ u8 h2c_parameter[2] = {0};
+ u32 fw_ver = 0;
+
/* set wlan_act to low */
btcoexist->btc_write_1byte(btcoexist, 0x76e, 0x4);
- /* Force GNT_BT to High */
- btcoexist->btc_write_1byte_bitmask(btcoexist, 0x765, 0x18, 0x3);
- /* BT select s0/s1 is controlled by BT */
- btcoexist->btc_write_1byte_bitmask(btcoexist, 0x67, 0x20, 0x0);
+
+ /* WiFi standby while GNT_BT 0 -> 1 */
+ btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1, 0xfffff, 0x780);
+
+ btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_FW_VER, &fw_ver);
+ if (fw_ver >= 0x180000) {
+ /* Use H2C to set GNT_BT to HIGH */
+ h2c_parameter[0] = 1;
+ btcoexist->btc_fill_h2c(btcoexist, 0x6E, 1, h2c_parameter);
+ } else {
+ btcoexist->btc_write_1byte(btcoexist, 0x765, 0x18);
+ }
}
/*********************************************************************
- * work around function start with wa_btc8723b2ant_
- *********************************************************************/
-/*********************************************************************
- * extern function start with EXbtc8723b2ant_
+ * extern function start with ex_btc8723b2ant_
*********************************************************************/
void ex_btc8723b2ant_init_hwconfig(struct btc_coexist *btcoexist)
{
u8tmp |= 0x5;
btcoexist->btc_write_1byte(btcoexist, 0x790, u8tmp);
- /*Antenna config */
+ /* Antenna config */
btc8723b2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN,
true, false);
/* PTA parameter */
- btc8723b_coex_tbl_type(btcoexist, FORCE_EXEC, 0);
+ btc8723b2ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
/* Enable counter statistics */
- /*0x76e[3] =1, WLAN_Act control by PTA*/
+ /* 0x76e[3] = 1, WLAN_ACT controlled by PTA */
btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
((wifi_traffic_dir == BTC_WIFI_TRAFFIC_TX) ?
"uplink" : "downlink")));
-
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d / %d / %d / %d",
"SCO/HID/PAN/A2DP",
bt_link_info->sco_exist, bt_link_info->hid_exist,
ps_tdma_case, coex_dm->auto_tdma_adjust);
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s = %d/ %d ",
- "DecBtPwr/ IgnWlanAct", coex_dm->cur_dec_bt_pwr,
+ "DecBtPwr/ IgnWlanAct", coex_dm->cur_dec_bt_pwr_lvl,
coex_dm->cur_ignore_wlan_act);
/* Hw setting */
else if (BTC_SCAN_FINISH == type)
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], SCAN FINISH notify\n");
+ btcoexist->btc_get(btcoexist, BTC_GET_U1_AP_NUM,
+ &coex_sta->scan_ap_num);
}
void ex_btc8723b2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
coex_sta->bt_info_c2h[rsp_source][i] = tmpbuf[i];
if (i == 1)
bt_info = tmpbuf[i];
- if (i == length-1)
+ if (i == length - 1)
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"0x%02x]\n", tmpbuf[i]);
else
}
if (BT_INFO_SRC_8723B_2ANT_WIFI_FW != rsp_source) {
- coex_sta->bt_retry_cnt = /* [3:0]*/
+ coex_sta->bt_retry_cnt =
coex_sta->bt_info_c2h[rsp_source][2] & 0xf;
coex_sta->bt_rssi =
coex_sta->bt_info_c2h[rsp_source][3] * 2 + 10;
- coex_sta->bt_info_ext =
- coex_sta->bt_info_c2h[rsp_source][4];
+ if (coex_sta->bt_info_c2h[rsp_source][1] == 0x49)
+ coex_sta->a2dp_bit_pool =
+ coex_sta->bt_info_c2h[rsp_source][6];
+ else
+ coex_sta->a2dp_bit_pool = 0;
/* Here we need to resend some wifi info to BT
- because bt is reset and loss of the info.
+ * because BT is reset and loss of the info.
*/
if ((coex_sta->bt_info_ext & BIT1)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
#endif
}
- /* check BIT2 first ==> check if bt is under inquiry or page scan*/
+ /* check BIT2 first ==> check if bt is under inquiry or page scan */
if (bt_info & BT_INFO_8723B_2ANT_B_INQ_PAGE)
coex_sta->c2h_bt_inquiry_page = true;
else
coex_sta->c2h_bt_inquiry_page = false;
- /* set link exist status*/
if (!(bt_info & BT_INFO_8723B_2ANT_B_CONNECTION)) {
+ /* set link exist status */
coex_sta->bt_link_exist = false;
coex_sta->pan_exist = false;
coex_sta->a2dp_exist = false;
coex_sta->hid_exist = false;
coex_sta->sco_exist = false;
- } else { /* connection exists */
+ } else {
+ /* connection exists */
coex_sta->bt_link_exist = true;
if (bt_info & BT_INFO_8723B_2ANT_B_FTP)
coex_sta->pan_exist = true;
#if (BT_AUTO_REPORT_ONLY_8723B_2ANT == 0)
btc8723b2ant_query_bt_info(btcoexist);
- btc8723b2ant_monitor_bt_ctr(btcoexist);
- btc8723b2ant_monitor_bt_enable_disable(btcoexist);
#else
+ btc8723b2ant_monitor_bt_ctr(btcoexist);
+ btc8723b2ant_monitor_wifi_ctr(btcoexist);
+
if (btc8723b2ant_is_wifi_status_changed(btcoexist) ||
coex_dm->auto_tdma_adjust)
btc8723b2ant_run_coexist_mechanism(btcoexist);
struct coex_dm_8723b_2ant {
/* fw mechanism */
- bool pre_dec_bt_pwr;
- bool cur_dec_bt_pwr;
+ bool pre_dec_bt_pwr_lvl;
+ bool cur_dec_bt_pwr_lvl;
u8 pre_fw_dac_swing_lvl;
u8 cur_fw_dac_swing_lvl;
bool cur_ignore_wlan_act;
bool c2h_bt_inquiry_page;
u8 bt_retry_cnt;
u8 bt_info_ext;
+ u32 pop_event_cnt;
+ u8 scan_ap_num;
+
+ u32 crc_ok_cck;
+ u32 crc_ok_11g;
+ u32 crc_ok_11n;
+ u32 crc_ok_11n_agg;
+
+ u32 crc_err_cck;
+ u32 crc_err_11g;
+ u32 crc_err_11n;
+ u32 crc_err_11n_agg;
+
+ u8 a2dp_bit_pool;
};
/*********************************************************************
*
*****************************************************************************/
-/*============================================================
+/**************************************************************
* Description:
*
* This file is for RTL8821A Co-exist mechanism
* History
* 2012/11/15 Cosa first check in.
*
- *============================================================
-*/
-/*============================================================
+ **************************************************************/
+
+/**************************************************************
* include files
- *============================================================
- */
+ **************************************************************/
#include "halbt_precomp.h"
-/*============================================================
+/**************************************************************
* Global variables, these are static variables
- *============================================================
- */
+ **************************************************************/
static struct coex_dm_8821a_1ant glcoex_dm_8821a_1ant;
static struct coex_dm_8821a_1ant *coex_dm = &glcoex_dm_8821a_1ant;
static struct coex_sta_8821a_1ant glcoex_sta_8821a_1ant;
"BT Info[bt auto report]",
};
-static u32 glcoex_ver_date_8821a_1ant = 20130816;
-static u32 glcoex_ver_8821a_1ant = 0x41;
+static u32 glcoex_ver_date_8821a_1ant = 20130816;
+static u32 glcoex_ver_8821a_1ant = 0x41;
-/*============================================================
+/**************************************************************
* local function proto type if needed
*
- * local function start with halbtc8821a1ant_
- *============================================================
- */
-static u8 halbtc8821a1ant_bt_rssi_state(struct btc_coexist *btcoexist,
- u8 level_num, u8 rssi_thresh,
- u8 rssi_thresh1)
+ * local function start with btc8821a1ant_
+ **************************************************************/
+static u8 btc8821a1ant_bt_rssi_state(struct btc_coexist *btcoexist,
+ u8 level_num, u8 rssi_thresh,
+ u8 rssi_thresh1)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- long bt_rssi = 0;
- u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
+ long bt_rssi = 0;
+ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
bt_rssi = coex_sta->bt_rssi;
return bt_rssi_state;
}
-static u8 halbtc8821a1ant_WifiRssiState(struct btc_coexist *btcoexist,
- u8 index, u8 level_num, u8 rssi_thresh,
- u8 rssi_thresh1)
+static u8 btc8821a1ant_wifi_rssi_state(struct btc_coexist *btcoexist,
+ u8 index, u8 level_num, u8 rssi_thresh,
+ u8 rssi_thresh1)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
long wifi_rssi = 0;
BTC_RSSI_STATE_LOW) ||
(coex_sta->pre_wifi_rssi_state[index] ==
BTC_RSSI_STATE_STAY_LOW)) {
- if (wifi_rssi >=
- (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) {
+ if (wifi_rssi >= (rssi_thresh +
+ BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) {
wifi_rssi_state = BTC_RSSI_STATE_HIGH;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], wifi RSSI state switch to High\n");
BTC_RSSI_STATE_LOW) ||
(coex_sta->pre_wifi_rssi_state[index] ==
BTC_RSSI_STATE_STAY_LOW)) {
- if (wifi_rssi >=
- (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) {
+ if (wifi_rssi >= (rssi_thresh +
+ BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) {
wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], wifi RSSI state switch to Medium\n");
BTC_RSSI_STATE_MEDIUM) ||
(coex_sta->pre_wifi_rssi_state[index] ==
BTC_RSSI_STATE_STAY_MEDIUM)) {
- if (wifi_rssi >=
- (rssi_thresh1 +
- BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) {
+ if (wifi_rssi >= (rssi_thresh1 +
+ BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT)) {
wifi_rssi_state = BTC_RSSI_STATE_HIGH;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], wifi RSSI state switch to High\n");
return wifi_rssi_state;
}
-static void halbtc8821a1ant_update_ra_mask(struct btc_coexist *btcoexist,
- bool force_exec, u32 dis_rate_mask)
+static void btc8821a1ant_update_ra_mask(struct btc_coexist *btcoexist,
+ bool force_exec, u32 dis_rate_mask)
{
coex_dm->cur_ra_mask = dis_rate_mask;
if (force_exec ||
(coex_dm->pre_ra_mask != coex_dm->cur_ra_mask)) {
- btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_ra_mask,
+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_UPDATE_RAMASK,
&coex_dm->cur_ra_mask);
}
coex_dm->pre_ra_mask = coex_dm->cur_ra_mask;
static void btc8821a1ant_auto_rate_fb_retry(struct btc_coexist *btcoexist,
bool force_exec, u8 type)
{
- bool wifi_under_b_mode = false;
+ bool wifi_under_b_mode = false;
coex_dm->cur_arfr_type = type;
if (force_exec ||
(coex_dm->pre_arfr_type != coex_dm->cur_arfr_type)) {
switch (coex_dm->cur_arfr_type) {
- case 0: /* normal mode*/
+ case 0: /* normal mode */
btcoexist->btc_write_4byte(btcoexist, 0x430,
coex_dm->backup_arfr_cnt1);
btcoexist->btc_write_4byte(btcoexist, 0x434,
coex_dm->pre_arfr_type = coex_dm->cur_arfr_type;
}
-static void halbtc8821a1ant_retry_limit(struct btc_coexist *btcoexist,
- bool force_exec, u8 type)
+static void btc8821a1ant_retry_limit(struct btc_coexist *btcoexist,
+ bool force_exec, u8 type)
{
coex_dm->cur_retry_limit_type = type;
if (force_exec ||
(coex_dm->pre_retry_limit_type != coex_dm->cur_retry_limit_type)) {
switch (coex_dm->cur_retry_limit_type) {
- case 0: /* normal mode*/
+ case 0: /* normal mode */
btcoexist->btc_write_2byte(btcoexist, 0x42a,
coex_dm->backup_retry_limit);
break;
- case 1: /* retry limit = 8*/
+ case 1: /* retry limit = 8 */
btcoexist->btc_write_2byte(btcoexist, 0x42a, 0x0808);
break;
default:
coex_dm->pre_retry_limit_type = coex_dm->cur_retry_limit_type;
}
-static void halbtc8821a1ant_ampdu_max_time(struct btc_coexist *btcoexist,
- bool force_exec, u8 type)
+static void btc8821a1ant_ampdu_max_time(struct btc_coexist *btcoexist,
+ bool force_exec, u8 type)
{
coex_dm->cur_ampdu_time_type = type;
if (force_exec ||
(coex_dm->pre_ampdu_time_type != coex_dm->cur_ampdu_time_type)) {
switch (coex_dm->cur_ampdu_time_type) {
- case 0: /* normal mode*/
+ case 0: /* normal mode */
btcoexist->btc_write_1byte(btcoexist, 0x456,
coex_dm->backup_ampdu_max_time);
break;
- case 1: /* AMPDU timw = 0x38 * 32us*/
+ case 1: /* AMPDU time = 0x38 * 32us */
btcoexist->btc_write_1byte(btcoexist, 0x456, 0x38);
break;
default:
coex_dm->pre_ampdu_time_type = coex_dm->cur_ampdu_time_type;
}
-static void halbtc8821a1ant_limited_tx(struct btc_coexist *btcoexist,
- bool force_exec, u8 ra_mask_type,
- u8 arfr_type, u8 retry_limit_type,
- u8 ampdu_time_type)
+static void btc8821a1ant_limited_tx(struct btc_coexist *btcoexist,
+ bool force_exec, u8 ra_mask_type,
+ u8 arfr_type, u8 retry_limit_type,
+ u8 ampdu_time_type)
{
switch (ra_mask_type) {
- case 0: /* normal mode*/
- halbtc8821a1ant_update_ra_mask(btcoexist, force_exec, 0x0);
+ case 0: /* normal mode */
+ btc8821a1ant_update_ra_mask(btcoexist, force_exec, 0x0);
break;
- case 1: /* disable cck 1/2*/
- halbtc8821a1ant_update_ra_mask(btcoexist, force_exec,
- 0x00000003);
+ case 1: /* disable cck 1/2 */
+ btc8821a1ant_update_ra_mask(btcoexist, force_exec,
+ 0x00000003);
break;
- case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4*/
- halbtc8821a1ant_update_ra_mask(btcoexist, force_exec,
- 0x0001f1f7);
+ case 2: /* disable cck 1/2/5.5, ofdm 6/9/12/18/24, mcs 0/1/2/3/4 */
+ btc8821a1ant_update_ra_mask(btcoexist, force_exec,
+ 0x0001f1f7);
break;
default:
break;
}
btc8821a1ant_auto_rate_fb_retry(btcoexist, force_exec, arfr_type);
- halbtc8821a1ant_retry_limit(btcoexist, force_exec, retry_limit_type);
- halbtc8821a1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
+ btc8821a1ant_retry_limit(btcoexist, force_exec, retry_limit_type);
+ btc8821a1ant_ampdu_max_time(btcoexist, force_exec, ampdu_time_type);
}
-static void halbtc8821a1ant_limited_rx(struct btc_coexist *btcoexist,
- bool force_exec, bool rej_ap_agg_pkt,
- bool bt_ctrl_agg_buf_size,
- u8 agg_buf_size)
+static void btc8821a1ant_limited_rx(struct btc_coexist *btcoexist,
+ bool force_exec, bool rej_ap_agg_pkt,
+ bool bt_ctrl_agg_buf_size, u8 agg_buf_size)
{
bool reject_rx_agg = rej_ap_agg_pkt;
bool bt_ctrl_rx_agg_size = bt_ctrl_agg_buf_size;
u8 rx_agg_size = agg_buf_size;
- /*============================================*/
- /* Rx Aggregation related setting*/
- /*============================================*/
+ /* Rx Aggregation related setting */
btcoexist->btc_set(btcoexist,
BTC_SET_BL_TO_REJ_AP_AGG_PKT, &reject_rx_agg);
- /* decide BT control aggregation buf size or not*/
+ /* decide BT control aggregation buf size or not */
btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_CTRL_AGG_SIZE,
&bt_ctrl_rx_agg_size);
- /* aggregation buf size, only work when BT control Rx agg size.*/
+ /* aggregation buf size, only work when BT control Rx agg size */
btcoexist->btc_set(btcoexist, BTC_SET_U1_AGG_BUF_SIZE, &rx_agg_size);
- /* real update aggregation setting*/
+ /* real update aggregation setting */
btcoexist->btc_set(btcoexist, BTC_SET_ACT_AGGREGATE_CTRL, NULL);
}
-static void halbtc8821a1ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
+static void btc8821a1ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
{
- u32 reg_hp_tx_rx, reg_lp_tx_rx, u4_tmp;
- u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
+ u32 reg_hp_tx_rx, reg_lp_tx_rx, u4_tmp;
+ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
reg_hp_tx_rx = 0x770;
reg_lp_tx_rx = 0x774;
u4_tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_tx_rx);
reg_hp_tx = u4_tmp & MASKLWORD;
- reg_hp_rx = (u4_tmp & MASKHWORD)>>16;
+ reg_hp_rx = (u4_tmp & MASKHWORD) >> 16;
u4_tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_tx_rx);
reg_lp_tx = u4_tmp & MASKLWORD;
- reg_lp_rx = (u4_tmp & MASKHWORD)>>16;
+ reg_lp_rx = (u4_tmp & MASKHWORD) >> 16;
coex_sta->high_priority_tx = reg_hp_tx;
coex_sta->high_priority_rx = reg_hp_rx;
coex_sta->low_priority_tx = reg_lp_tx;
coex_sta->low_priority_rx = reg_lp_rx;
- /* reset counter*/
+ /* reset counter */
btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
}
-static void halbtc8821a1ant_query_bt_info(struct btc_coexist *btcoexist)
+static void btc8821a1ant_query_bt_info(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
coex_sta->c2h_bt_info_req_sent = true;
- h2c_parameter[0] |= BIT0; /* trigger*/
+ h2c_parameter[0] |= BIT0; /* trigger */
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
}
-static void halbtc8821a1ant_update_bt_link_info(struct btc_coexist *btcoexist)
+static void btc8821a1ant_update_bt_link_info(struct btc_coexist *btcoexist)
{
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- bool bt_hs_on = false;
+ bool bt_hs_on = false;
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
bt_link_info->pan_exist = coex_sta->pan_exist;
bt_link_info->hid_exist = coex_sta->hid_exist;
- /* work around for HS mode.*/
+ /* work around for HS mode */
if (bt_hs_on) {
bt_link_info->pan_exist = true;
bt_link_info->bt_link_exist = true;
}
- /* check if Sco only*/
+ /* check if Sco only */
if (bt_link_info->sco_exist &&
!bt_link_info->a2dp_exist &&
!bt_link_info->pan_exist &&
else
bt_link_info->sco_only = false;
- /* check if A2dp only*/
+ /* check if A2dp only */
if (!bt_link_info->sco_exist &&
bt_link_info->a2dp_exist &&
!bt_link_info->pan_exist &&
else
bt_link_info->a2dp_only = false;
- /* check if Pan only*/
+ /* check if Pan only */
if (!bt_link_info->sco_exist &&
!bt_link_info->a2dp_exist &&
bt_link_info->pan_exist &&
else
bt_link_info->pan_only = false;
- /* check if Hid only*/
+ /* check if Hid only */
if (!bt_link_info->sco_exist &&
!bt_link_info->a2dp_exist &&
!bt_link_info->pan_exist &&
bt_link_info->hid_only = false;
}
-static u8 halbtc8821a1ant_action_algorithm(struct btc_coexist *btcoexist)
+static u8 btc8821a1ant_action_algorithm(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- bool bt_hs_on = false;
- u8 algorithm = BT_8821A_1ANT_COEX_ALGO_UNDEFINED;
- u8 num_of_diff_profile = 0;
+ bool bt_hs_on = false;
+ u8 algorithm = BT_8821A_1ANT_COEX_ALGO_UNDEFINED;
+ u8 num_of_diff_profile = 0;
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
"[BTCoex], BT Profile = SCO + HID + A2DP ==> HID\n");
algorithm = BT_8821A_1ANT_COEX_ALGO_HID;
} else if (bt_link_info->hid_exist &&
- bt_link_info->pan_exist) {
+ bt_link_info->pan_exist) {
if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
algorithm = BT_8821A_1ANT_COEX_ALGO_PANEDR_HID;
}
} else if (bt_link_info->pan_exist &&
- bt_link_info->a2dp_exist) {
+ bt_link_info->a2dp_exist) {
if (bt_hs_on) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST,
DBG_LOUD,
return algorithm;
}
-static void halbtc8821a1ant_set_bt_auto_report(struct btc_coexist *btcoexist,
- bool enable_auto_report)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 h2c_parameter[1] = {0};
-
- h2c_parameter[0] = 0;
-
- if (enable_auto_report)
- h2c_parameter[0] |= BIT0;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n",
- (enable_auto_report ? "Enabled!!" : "Disabled!!"),
- h2c_parameter[0]);
-
- btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
-}
-
-static void halbtc8821a1ant_bt_auto_report(struct btc_coexist *btcoexist,
- bool force_exec,
- bool enable_auto_report)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s BT Auto report = %s\n",
- (force_exec ? "force to" : ""), ((enable_auto_report) ?
- "Enabled" : "Disabled"));
- coex_dm->cur_bt_auto_report = enable_auto_report;
-
- if (!force_exec) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], pre_bt_auto_report = %d, cur_bt_auto_report = %d\n",
- coex_dm->pre_bt_auto_report,
- coex_dm->cur_bt_auto_report);
-
- if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
- return;
- }
- halbtc8821a1ant_set_bt_auto_report(btcoexist, coex_dm->cur_bt_auto_report);
-
- coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
-}
-
-static void btc8821a1ant_set_sw_pen_tx_rate(struct btc_coexist *btcoexist,
- bool low_penalty_ra)
+static void btc8821a1ant_set_sw_penalty_tx_rate(struct btc_coexist *btcoexist,
+ bool low_penalty_ra)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[6] = {0};
if (low_penalty_ra) {
h2c_parameter[1] |= BIT0;
- /*normal rate except MCS7/6/5, OFDM54/48/36*/
+ /* normal rate except MCS7/6/5, OFDM54/48/36 */
h2c_parameter[2] = 0x00;
- h2c_parameter[3] = 0xf7; /*MCS7 or OFDM54*/
- h2c_parameter[4] = 0xf8; /*MCS6 or OFDM48*/
- h2c_parameter[5] = 0xf9; /*MCS5 or OFDM36*/
+ h2c_parameter[3] = 0xf7; /* MCS7 or OFDM54 */
+ h2c_parameter[4] = 0xf8; /* MCS6 or OFDM48 */
+ h2c_parameter[5] = 0xf9; /* MCS5 or OFDM36 */
}
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
}
-static void halbtc8821a1ant_low_penalty_ra(struct btc_coexist *btcoexist,
- bool force_exec, bool low_penalty_ra)
+static void btc8821a1ant_low_penalty_ra(struct btc_coexist *btcoexist,
+ bool force_exec, bool low_penalty_ra)
{
coex_dm->cur_low_penalty_ra = low_penalty_ra;
if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
return;
}
- btc8821a1ant_set_sw_pen_tx_rate(btcoexist, coex_dm->cur_low_penalty_ra);
+ btc8821a1ant_set_sw_penalty_tx_rate(btcoexist,
+ coex_dm->cur_low_penalty_ra);
coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
}
-static void halbtc8821a1ant_set_coex_table(struct btc_coexist *btcoexist,
- u32 val0x6c0, u32 val0x6c4,
- u32 val0x6c8, u8 val0x6cc)
+static void btc8821a1ant_set_coex_table(struct btc_coexist *btcoexist,
+ u32 val0x6c0, u32 val0x6c4,
+ u32 val0x6c8, u8 val0x6cc)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
}
-static void halbtc8821a1ant_coex_table(struct btc_coexist *btcoexist,
- bool force_exec, u32 val0x6c0,
- u32 val0x6c4, u32 val0x6c8, u8 val0x6cc)
+static void btc8821a1ant_coex_table(struct btc_coexist *btcoexist,
+ bool force_exec, u32 val0x6c0, u32 val0x6c4,
+ u32 val0x6c8, u8 val0x6cc)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
(coex_dm->pre_val_0x6cc == coex_dm->cur_val_0x6cc))
return;
}
- halbtc8821a1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
- val0x6c8, val0x6cc);
+ btc8821a1ant_set_coex_table(btcoexist, val0x6c0, val0x6c4,
+ val0x6c8, val0x6cc);
coex_dm->pre_val_0x6c0 = coex_dm->cur_val_0x6c0;
coex_dm->pre_val_0x6c4 = coex_dm->cur_val_0x6c4;
coex_dm->pre_val_0x6cc = coex_dm->cur_val_0x6cc;
}
-static void halbtc8821a1ant_coex_table_with_type(struct btc_coexist *btcoexist,
- bool force_exec, u8 type)
+static void btc8821a1ant_coex_table_with_type(struct btc_coexist *btcoexist,
+ bool force_exec, u8 type)
{
switch (type) {
case 0:
- halbtc8821a1ant_coex_table(btcoexist, force_exec, 0x55555555,
- 0x55555555, 0xffffff, 0x3);
+ btc8821a1ant_coex_table(btcoexist, force_exec, 0x55555555,
+ 0x55555555, 0xffffff, 0x3);
break;
case 1:
- halbtc8821a1ant_coex_table(btcoexist, force_exec,
- 0x55555555, 0x5a5a5a5a,
- 0xffffff, 0x3);
- break;
+ btc8821a1ant_coex_table(btcoexist, force_exec, 0x55555555,
+ 0x5a5a5a5a, 0xffffff, 0x3);
+ break;
case 2:
- halbtc8821a1ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
- 0x5a5a5a5a, 0xffffff, 0x3);
+ btc8821a1ant_coex_table(btcoexist, force_exec, 0x5a5a5a5a,
+ 0x5a5a5a5a, 0xffffff, 0x3);
break;
case 3:
- halbtc8821a1ant_coex_table(btcoexist, force_exec, 0x55555555,
- 0xaaaaaaaa, 0xffffff, 0x3);
+ btc8821a1ant_coex_table(btcoexist, force_exec, 0x55555555,
+ 0xaaaaaaaa, 0xffffff, 0x3);
break;
case 4:
- halbtc8821a1ant_coex_table(btcoexist, force_exec, 0xffffffff,
- 0xffffffff, 0xffffff, 0x3);
+ btc8821a1ant_coex_table(btcoexist, force_exec, 0xffffffff,
+ 0xffffffff, 0xffffff, 0x3);
break;
case 5:
- halbtc8821a1ant_coex_table(btcoexist, force_exec, 0x5fff5fff,
- 0x5fff5fff, 0xffffff, 0x3);
+ btc8821a1ant_coex_table(btcoexist, force_exec, 0x5fff5fff,
+ 0x5fff5fff, 0xffffff, 0x3);
break;
case 6:
- halbtc8821a1ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
- 0x5a5a5a5a, 0xffffff, 0x3);
+ btc8821a1ant_coex_table(btcoexist, force_exec, 0x55ff55ff,
+ 0x5a5a5a5a, 0xffffff, 0x3);
break;
case 7:
- halbtc8821a1ant_coex_table(btcoexist, force_exec, 0x5afa5afa,
- 0x5afa5afa, 0xffffff, 0x3);
+ btc8821a1ant_coex_table(btcoexist, force_exec, 0x5afa5afa,
+ 0x5afa5afa, 0xffffff, 0x3);
break;
default:
break;
bool enable)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 h2c_parameter[1] = {0};
+ u8 h2c_parameter[1] = {0};
if (enable)
- h2c_parameter[0] |= BIT0; /* function enable*/
+ h2c_parameter[0] |= BIT0; /* function enable */
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
btcoexist->btc_fill_h2c(btcoexist, 0x63, 1, h2c_parameter);
}
-static void halbtc8821a1ant_ignore_wlan_act(struct btc_coexist *btcoexist,
- bool force_exec, bool enable)
+static void btc8821a1ant_ignore_wlan_act(struct btc_coexist *btcoexist,
+ bool force_exec, bool enable)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
}
-static void halbtc8821a1ant_set_fw_pstdma(struct btc_coexist *btcoexist,
- u8 byte1, u8 byte2, u8 byte3,
- u8 byte4, u8 byte5)
+static void btc8821a1ant_set_fw_ps_tdma(struct btc_coexist *btcoexist, u8 byte1,
+ u8 byte2, u8 byte3, u8 byte4, u8 byte5)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[5] = {0};
btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
}
-static void halbtc8821a1ant_set_lps_rpwm(struct btc_coexist *btcoexist,
- u8 lps_val, u8 rpwm_val)
+static void btc8821a1ant_set_lps_rpwm(struct btc_coexist *btcoexist,
+ u8 lps_val, u8 rpwm_val)
{
- u8 lps = lps_val;
- u8 rpwm = rpwm_val;
+ u8 lps = lps_val;
+ u8 rpwm = rpwm_val;
btcoexist->btc_set(btcoexist, BTC_SET_U1_LPS_VAL, &lps);
btcoexist->btc_set(btcoexist, BTC_SET_U1_RPWM_VAL, &rpwm);
}
-static void halbtc8821a1ant_lps_rpwm(struct btc_coexist *btcoexist,
- bool force_exec, u8 lps_val, u8 rpwm_val)
+static void btc8821a1ant_lps_rpwm(struct btc_coexist *btcoexist,
+ bool force_exec, u8 lps_val, u8 rpwm_val)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
return;
}
}
- halbtc8821a1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
+ btc8821a1ant_set_lps_rpwm(btcoexist, lps_val, rpwm_val);
coex_dm->pre_lps = coex_dm->cur_lps;
coex_dm->pre_rpwm = coex_dm->cur_rpwm;
}
-static void halbtc8821a1ant_sw_mechanism(struct btc_coexist *btcoexist,
- bool low_penalty_ra)
+static void btc8821a1ant_sw_mechanism(struct btc_coexist *btcoexist,
+ bool low_penalty_ra)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], SM[LpRA] = %d\n", low_penalty_ra);
- halbtc8821a1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
+ btc8821a1ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
}
-static void halbtc8821a1ant_set_ant_path(struct btc_coexist *btcoexist,
- u8 ant_pos_type, bool init_hw_cfg,
- bool wifi_off)
+static void btc8821a1ant_set_ant_path(struct btc_coexist *btcoexist,
+ u8 ant_pos_type, bool init_hw_cfg,
+ bool wifi_off)
{
struct btc_board_info *board_info = &btcoexist->board_info;
u32 u4_tmp = 0;
u8 h2c_parameter[2] = {0};
if (init_hw_cfg) {
- /* 0x4c[23] = 0, 0x4c[24] = 1 Antenna control by WL/BT*/
+ /* 0x4c[23] = 0, 0x4c[24] = 1 Antenna control by WL/BT */
u4_tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
u4_tmp &= ~BIT23;
u4_tmp |= BIT24;
btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x77);
if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
- /*tell firmware "antenna inverse" ==>
- * WRONG firmware antenna control code.==>need fw to fix
+ /* tell firmware "antenna inverse"
+ * WRONG firmware antenna control code, need fw to fix
*/
h2c_parameter[0] = 1;
h2c_parameter[1] = 1;
btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
h2c_parameter);
- /*Main Ant to BT for IPS case 0x4c[23] = 1*/
+ /* Main Ant to BT for IPS case 0x4c[23] = 1 */
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64,
0x1, 0x1);
} else {
- /*tell firmware "no antenna inverse" ==>
- * WRONG firmware antenna control code.==>need fw to fix
+ /* tell firmware "no antenna inverse"
+ * WRONG firmware antenna control code, need fw to fix
*/
h2c_parameter[0] = 0;
h2c_parameter[1] = 1;
btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
h2c_parameter);
- /*Aux Ant to BT for IPS case 0x4c[23] = 1*/
+ /* Aux Ant to BT for IPS case 0x4c[23] = 1 */
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x64,
0x1, 0x0);
}
} else if (wifi_off) {
/* 0x4c[24:23] = 00, Set Antenna control
- * by BT_RFE_CTRL BT Vendor 0xac = 0xf002
+ * by BT_RFE_CTRL BT Vendor 0xac = 0xf002
*/
u4_tmp = btcoexist->btc_read_4byte(btcoexist, 0x4c);
u4_tmp &= ~BIT23;
btcoexist->btc_write_4byte(btcoexist, 0x4c, u4_tmp);
}
- /* ext switch setting*/
+ /* ext switch setting */
switch (ant_pos_type) {
case BTC_ANT_PATH_WIFI:
if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT)
}
}
-static void halbtc8821a1ant_ps_tdma(struct btc_coexist *btcoexist,
- bool force_exec, bool turn_on, u8 type)
+static void btc8821a1ant_ps_tdma(struct btc_coexist *btcoexist,
+ bool force_exec, bool turn_on, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 rssi_adjust_val = 0;
if (turn_on) {
switch (type) {
default:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x1a,
- 0x1a, 0x0, 0x50);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x1a,
+ 0x1a, 0x0, 0x50);
break;
case 1:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x3a,
- 0x03, 0x10, 0x50);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x3a,
+ 0x03, 0x10, 0x50);
rssi_adjust_val = 11;
break;
case 2:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x2b,
- 0x03, 0x10, 0x50);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x2b,
+ 0x03, 0x10, 0x50);
rssi_adjust_val = 14;
break;
case 3:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x1d,
- 0x1d, 0x0, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x1d,
+ 0x1d, 0x0, 0x10);
break;
case 4:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x93, 0x15,
- 0x3, 0x14, 0x0);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x93, 0x15,
+ 0x3, 0x14, 0x0);
rssi_adjust_val = 17;
break;
case 5:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, 0x15,
- 0x3, 0x11, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x61, 0x15,
+ 0x3, 0x11, 0x10);
break;
case 6:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x13, 0xa,
- 0x3, 0x0, 0x0);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x13, 0xa,
+ 0x3, 0x0, 0x0);
break;
case 7:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x13, 0xc,
- 0x5, 0x0, 0x0);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x13, 0xc,
+ 0x5, 0x0, 0x0);
break;
case 8:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x93, 0x25,
- 0x3, 0x10, 0x0);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x93, 0x25,
+ 0x3, 0x10, 0x0);
break;
case 9:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x21,
- 0x3, 0x10, 0x50);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x21,
+ 0x3, 0x10, 0x50);
rssi_adjust_val = 18;
break;
case 10:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x13, 0xa,
- 0xa, 0x0, 0x40);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x13, 0xa,
+ 0xa, 0x0, 0x40);
break;
case 11:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x14,
- 0x03, 0x10, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x14,
+ 0x03, 0x10, 0x10);
rssi_adjust_val = 20;
break;
case 12:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x0a,
- 0x0a, 0x0, 0x50);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x0a,
+ 0x0a, 0x0, 0x50);
break;
case 13:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x18,
- 0x18, 0x0, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x18,
+ 0x18, 0x0, 0x10);
break;
case 14:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x21,
- 0x3, 0x10, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x21,
+ 0x3, 0x10, 0x10);
break;
case 15:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x13, 0xa,
- 0x3, 0x8, 0x0);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x13, 0xa,
+ 0x3, 0x8, 0x0);
break;
case 16:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x93, 0x15,
- 0x3, 0x10, 0x0);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x93, 0x15,
+ 0x3, 0x10, 0x0);
rssi_adjust_val = 18;
break;
case 18:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x93, 0x25,
- 0x3, 0x10, 0x0);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x93, 0x25,
+ 0x3, 0x10, 0x0);
rssi_adjust_val = 14;
break;
case 20:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, 0x35,
- 0x03, 0x11, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x61, 0x35,
+ 0x03, 0x11, 0x10);
break;
case 21:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, 0x15,
- 0x03, 0x11, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x61, 0x15,
+ 0x03, 0x11, 0x10);
break;
case 22:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, 0x25,
- 0x03, 0x11, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x61, 0x25,
+ 0x03, 0x11, 0x10);
break;
case 23:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, 0x25,
- 0x3, 0x31, 0x18);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
+ 0x3, 0x31, 0x18);
rssi_adjust_val = 22;
break;
case 24:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, 0x15,
- 0x3, 0x31, 0x18);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x15,
+ 0x3, 0x31, 0x18);
rssi_adjust_val = 22;
break;
case 25:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, 0xa,
- 0x3, 0x31, 0x18);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0xe3, 0xa,
+ 0x3, 0x31, 0x18);
rssi_adjust_val = 22;
break;
case 26:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, 0xa,
- 0x3, 0x31, 0x18);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0xe3, 0xa,
+ 0x3, 0x31, 0x18);
rssi_adjust_val = 22;
break;
case 27:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xe3, 0x25,
- 0x3, 0x31, 0x98);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
+ 0x3, 0x31, 0x98);
rssi_adjust_val = 22;
break;
case 28:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x69, 0x25,
- 0x3, 0x31, 0x0);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x69, 0x25,
+ 0x3, 0x31, 0x0);
break;
case 29:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xab, 0x1a,
- 0x1a, 0x1, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0xab, 0x1a,
+ 0x1a, 0x1, 0x10);
break;
case 30:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x51, 0x14,
- 0x3, 0x10, 0x50);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x51, 0x14,
+ 0x3, 0x10, 0x50);
break;
case 31:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xd3, 0x1a,
- 0x1a, 0, 0x58);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0xd3, 0x1a,
+ 0x1a, 0, 0x58);
break;
case 32:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x61, 0xa,
- 0x3, 0x10, 0x0);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x61, 0xa,
+ 0x3, 0x10, 0x0);
break;
case 33:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xa3, 0x25,
- 0x3, 0x30, 0x90);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x25,
+ 0x3, 0x30, 0x90);
break;
case 34:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x53, 0x1a,
- 0x1a, 0x0, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x53, 0x1a,
+ 0x1a, 0x0, 0x10);
break;
case 35:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x63, 0x1a,
- 0x1a, 0x0, 0x10);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x63, 0x1a,
+ 0x1a, 0x0, 0x10);
break;
case 36:
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0xd3, 0x12,
- 0x3, 0x14, 0x50);
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0xd3, 0x12,
+ 0x3, 0x14, 0x50);
break;
}
} else {
- /* disable PS tdma*/
+ /* disable PS tdma */
switch (type) {
- case 8: /*PTA Control*/
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x8, 0x0, 0x0,
- 0x0, 0x0);
- halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
- false, false);
+ case 8:
+ /* PTA Control */
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x8, 0x0, 0x0,
+ 0x0, 0x0);
+ btc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
+ false, false);
break;
case 0:
- default: /*Software control, Antenna at BT side*/
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0,
- 0x0, 0x0);
- halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
- false, false);
+ default:
+ /* Software control, Antenna at BT side */
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
+ 0x0, 0x0);
+ btc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
+ false, false);
break;
- case 9: /*Software control, Antenna at WiFi side*/
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0,
- 0x0, 0x0);
- halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI,
- false, false);
+ case 9:
+ /* Software control, Antenna at WiFi side */
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
+ 0x0, 0x0);
+ btc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_WIFI,
+ false, false);
break;
- case 10: /* under 5G*/
- halbtc8821a1ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0,
- 0x8, 0x0);
- halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
- false, false);
+ case 10:
+ /* under 5G */
+ btc8821a1ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
+ 0x8, 0x0);
+ btc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
+ false, false);
break;
}
}
btcoexist->btc_set(btcoexist,
BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE, &rssi_adjust_val);
- /* update pre state*/
+ /* update pre state */
coex_dm->pre_ps_tdma_on = coex_dm->cur_ps_tdma_on;
coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
}
-static bool halbtc8821a1ant_is_common_action(struct btc_coexist *btcoexist)
+static bool btc8821a1ant_is_common_action(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- bool common = false, wifi_connected = false, wifi_busy = false;
+ bool common = false, wifi_connected = false, wifi_busy = false;
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
&wifi_connected);
coex_dm->bt_status) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi non connected-idle + BT non connected-idle!!\n");
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
common = true;
} else if (wifi_connected &&
coex_dm->bt_status)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi connected + BT non connected-idle!!\n");
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
common = true;
} else if (!wifi_connected &&
coex_dm->bt_status)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi non connected-idle + BT connected-idle!!\n");
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
common = true;
} else if (wifi_connected &&
(BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE ==
- coex_dm->bt_status)) {
+ coex_dm->bt_status)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi connected + BT connected-idle!!\n");
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
common = true;
} else if (!wifi_connected &&
coex_dm->bt_status)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi non connected-idle + BT Busy!!\n");
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
common = true;
} else {
return common;
}
-static void btc8821a1ant_tdma_dur_adj(struct btc_coexist *btcoexist,
- u8 wifi_status)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- static long up, dn, m, n, wait_count;
- /*0: no change, +1: increase WiFi duration, -1: decrease WiFi duration*/
- long result;
- u8 retry_count = 0, bt_info_ext;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TdmaDurationAdjustForAcl()\n");
-
- if ((BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN ==
- wifi_status) ||
- (BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN ==
- wifi_status) ||
- (BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIAL_PKT ==
- wifi_status)) {
- if (coex_dm->cur_ps_tdma != 1 &&
- coex_dm->cur_ps_tdma != 2 &&
- coex_dm->cur_ps_tdma != 3 &&
- coex_dm->cur_ps_tdma != 9) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
-
- up = 0;
- dn = 0;
- m = 1;
- n = 3;
- result = 0;
- wait_count = 0;
- }
- return;
- }
-
- if (!coex_dm->auto_tdma_adjust) {
- coex_dm->auto_tdma_adjust = true;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], first run TdmaDurationAdjust()!!\n");
-
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 2);
- coex_dm->tdma_adj_type = 2;
- /*============*/
- up = 0;
- dn = 0;
- m = 1;
- n = 3;
- result = 0;
- wait_count = 0;
- } else {
- /*accquire the BT TRx retry count from BT_Info byte2*/
- retry_count = coex_sta->bt_retry_cnt;
- bt_info_ext = coex_sta->bt_info_ext;
- result = 0;
- wait_count++;
-
- if (retry_count == 0) {
- /* no retry in the last 2-second duration*/
- up++;
- dn--;
-
- if (dn <= 0)
- dn = 0;
-
- if (up >= n) {
- /* if (retry count == 0) for 2*n seconds ,
- * make WiFi duration wider
- */
- wait_count = 0;
- n = 3;
- up = 0;
- dn = 0;
- result = 1;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Increase wifi duration!!\n");
- }
- } else if (retry_count <= 3) {
- /* <=3 retry in the last 2-second duration*/
- up--;
- dn++;
-
- if (up <= 0)
- up = 0;
-
- if (dn == 2) {
- /* if retry count< 3 for 2*2 seconds,
- * shrink wifi duration
- */
- if (wait_count <= 2)
- m++; /* avoid bounce in two levels */
- else
- m = 1;
-
- if (m >= 20) {
- /* m max value is 20, max time is 120 s,
- * recheck if adjust WiFi duration.
- */
- m = 20;
- }
- n = 3*m;
- up = 0;
- dn = 0;
- wait_count = 0;
- result = -1;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Decrease wifi duration for retryCounter<3!!\n");
- }
- } else {
- /* retry count > 3, if retry count > 3 happens once,
- * shrink WiFi duration
- */
- if (wait_count == 1)
- m++; /* avoid bounce in two levels */
- else
- m = 1;
- /* m max value is 20, max time is 120 second,
- * recheck if adjust WiFi duration.
- */
- if (m >= 20)
- m = 20;
-
- n = 3*m;
- up = 0;
- dn = 0;
- wait_count = 0;
- result = -1;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Decrease wifi duration for retryCounter>3!!\n");
- }
-
- if (result == -1) {
- if ((BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(bt_info_ext)) &&
- ((coex_dm->cur_ps_tdma == 1) ||
- (coex_dm->cur_ps_tdma == 2))) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 1) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- }
- } else if (result == 1) {
- if ((BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(bt_info_ext)) &&
- ((coex_dm->cur_ps_tdma == 1) ||
- (coex_dm->cur_ps_tdma == 2))) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
- coex_dm->tdma_adj_type = 1;
- }
- } else {
- /*no change*/
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], ********** TDMA(on, %d) **********\n",
- coex_dm->cur_ps_tdma);
- }
-
- if (coex_dm->cur_ps_tdma != 1 &&
- coex_dm->cur_ps_tdma != 2 &&
- coex_dm->cur_ps_tdma != 9 &&
- coex_dm->cur_ps_tdma != 11) {
- /* recover to previous adjust type*/
- halbtc8821a1ant_ps_tdma(btcoexist,
- NORMAL_EXEC, true,
- coex_dm->tdma_adj_type);
- }
- }
-}
-
static void btc8821a1ant_ps_tdma_check_for_pwr_save(struct btc_coexist *btcoex,
bool new_ps_state)
{
- u8 lps_mode = 0x0;
+ u8 lps_mode = 0x0;
btcoex->btc_get(btcoex, BTC_GET_U1_LPS_MODE, &lps_mode);
if (lps_mode) {
- /* already under LPS state*/
+ /* already under LPS state */
if (new_ps_state) {
- /* keep state under LPS, do nothing.*/
+ /* keep state under LPS, do nothing */
} else {
- /* will leave LPS state, turn off psTdma first*/
- halbtc8821a1ant_ps_tdma(btcoex, NORMAL_EXEC, false, 0);
+ /* will leave LPS state, turn off psTdma first */
+ btc8821a1ant_ps_tdma(btcoex, NORMAL_EXEC, false, 0);
}
} else {
/* NO PS state*/
if (new_ps_state) {
- /* will enter LPS state, turn off psTdma first*/
- halbtc8821a1ant_ps_tdma(btcoex, NORMAL_EXEC, false, 0);
+ /* will enter LPS state, turn off psTdma first */
+ btc8821a1ant_ps_tdma(btcoex, NORMAL_EXEC, false, 0);
} else {
- /* keep state under NO PS state, do nothing.*/
+ /* keep state under NO PS state, do nothing */
}
}
}
-static void halbtc8821a1ant_power_save_state(struct btc_coexist *btcoexist,
- u8 ps_type, u8 lps_val,
- u8 rpwm_val)
+static void btc8821a1ant_power_save_state(struct btc_coexist *btcoexist,
+ u8 ps_type, u8 lps_val, u8 rpwm_val)
{
bool low_pwr_disable = false;
switch (ps_type) {
case BTC_PS_WIFI_NATIVE:
- /* recover to original 32k low power setting*/
+ /* recover to original 32k low power setting */
low_pwr_disable = false;
btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
&low_pwr_disable);
case BTC_PS_LPS_ON:
btc8821a1ant_ps_tdma_check_for_pwr_save(btcoexist,
true);
- halbtc8821a1ant_lps_rpwm(btcoexist,
- NORMAL_EXEC, lps_val, rpwm_val);
- /* when coex force to enter LPS, do not enter 32k low power.*/
+ btc8821a1ant_lps_rpwm(btcoexist, NORMAL_EXEC, lps_val,
+ rpwm_val);
+ /* when coex force to enter LPS, do not enter 32k low power */
low_pwr_disable = true;
btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
&low_pwr_disable);
- /* power save must executed before psTdma.*/
+ /* power save must executed before psTdma */
btcoexist->btc_set(btcoexist, BTC_SET_ACT_ENTER_LPS, NULL);
break;
case BTC_PS_LPS_OFF:
}
}
-static void halbtc8821a1ant_coex_under_5g(struct btc_coexist *btcoexist)
+static void btc8821a1ant_coex_under_5g(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
- 0x0, 0x0);
- halbtc8821a1ant_ignore_wlan_act(btcoexist, NORMAL_EXEC, true);
-
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 10);
-
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
-
- halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
+ btc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
+ 0x0, 0x0);
+ btc8821a1ant_ignore_wlan_act(btcoexist, NORMAL_EXEC, true);
- halbtc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 5);
-}
-
-static void halbtc8821a1ant_action_wifi_only(struct btc_coexist *btcoexist)
-{
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 9);
-}
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 10);
-static void btc8821a1ant_mon_bt_en_dis(struct btc_coexist *btcoexist)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- static bool pre_bt_disabled;
- static u32 bt_disable_cnt;
- bool bt_active = true, bt_disabled = false;
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
- /* This function check if bt is disabled*/
+ btc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
- if (coex_sta->high_priority_tx == 0 &&
- coex_sta->high_priority_rx == 0 &&
- coex_sta->low_priority_tx == 0 &&
- coex_sta->low_priority_rx == 0) {
- bt_active = false;
- }
- if (coex_sta->high_priority_tx == 0xffff &&
- coex_sta->high_priority_rx == 0xffff &&
- coex_sta->low_priority_tx == 0xffff &&
- coex_sta->low_priority_rx == 0xffff) {
- bt_active = false;
- }
- if (bt_active) {
- bt_disable_cnt = 0;
- bt_disabled = false;
- btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
- &bt_disabled);
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT is enabled !!\n");
- } else {
- bt_disable_cnt++;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], bt all counters = 0, %d times!!\n",
- bt_disable_cnt);
- if (bt_disable_cnt >= 2) {
- bt_disabled = true;
- btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
- &bt_disabled);
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT is disabled !!\n");
- halbtc8821a1ant_action_wifi_only(btcoexist);
- }
- }
- if (pre_bt_disabled != bt_disabled) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT is from %s to %s!!\n",
- (pre_bt_disabled ? "disabled" : "enabled"),
- (bt_disabled ? "disabled" : "enabled"));
- pre_bt_disabled = bt_disabled;
- if (bt_disabled) {
- btcoexist->btc_set(btcoexist, BTC_SET_ACT_LEAVE_LPS,
- NULL);
- btcoexist->btc_set(btcoexist, BTC_SET_ACT_NORMAL_LPS,
- NULL);
- }
- }
+ btc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false, false, 5);
}
-/*=============================================*/
-/**/
-/* Software Coex Mechanism start*/
-/**/
-/*=============================================*/
+/***********************************************
+ *
+ * Software Coex Mechanism start
+ *
+ ***********************************************/
-/* SCO only or SCO+PAN(HS)*/
-static void halbtc8821a1ant_action_sco(struct btc_coexist *btcoexist)
+/* SCO only or SCO+PAN(HS) */
+static void btc8821a1ant_action_sco(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, true);
+ btc8821a1ant_sw_mechanism(btcoexist, true);
}
-static void halbtc8821a1ant_action_hid(struct btc_coexist *btcoexist)
+static void btc8821a1ant_action_hid(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, true);
+ btc8821a1ant_sw_mechanism(btcoexist, true);
}
-/*A2DP only / PAN(EDR) only/ A2DP+PAN(HS)*/
-static void halbtc8821a1ant_action_a2dp(struct btc_coexist *btcoexist)
+/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
+static void btc8821a1ant_action_a2dp(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
}
-static void halbtc8821a1ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
+static void btc8821a1ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
}
-static void halbtc8821a1ant_action_pan_edr(struct btc_coexist *btcoexist)
+static void btc8821a1ant_action_pan_edr(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
}
-/*PAN(HS) only*/
-static void halbtc8821a1ant_action_pan_hs(struct btc_coexist *btcoexist)
+/* PAN(HS) only */
+static void btc8821a1ant_action_pan_hs(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
}
-/*PAN(EDR)+A2DP*/
-static void halbtc8821a1ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
+/* PAN(EDR)+A2DP */
+static void btc8821a1ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ btc8821a1ant_sw_mechanism(btcoexist, false);
}
-static void halbtc8821a1ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
+static void btc8821a1ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, true);
+ btc8821a1ant_sw_mechanism(btcoexist, true);
}
-/* HID+A2DP+PAN(EDR)*/
+/* HID+A2DP+PAN(EDR) */
static void btc8821a1ant_action_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, true);
+ btc8821a1ant_sw_mechanism(btcoexist, true);
}
-static void halbtc8821a1ant_action_hid_a2dp(struct btc_coexist *btcoexist)
+static void btc8821a1ant_action_hid_a2dp(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_sw_mechanism(btcoexist, true);
+ btc8821a1ant_sw_mechanism(btcoexist, true);
}
-/*=============================================*/
-/**/
-/* Non-Software Coex Mechanism start*/
-/**/
-/*=============================================*/
+/***********************************************
+ *
+ * Non-Software Coex Mechanism start
+ *
+ ***********************************************/
-static void halbtc8821a1ant_action_hs(struct btc_coexist *btcoexist)
+static void btc8821a1ant_action_hs(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
- halbtc8821a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+ btc8821a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 2);
}
-static void halbtc8821a1ant_action_bt_inquiry(struct btc_coexist *btcoexist)
+static void btc8821a1ant_action_bt_inquiry(struct btc_coexist *btcoexist)
{
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
bool wifi_connected = false;
BTC_GET_BL_WIFI_CONNECTED, &wifi_connected);
if (!wifi_connected) {
- halbtc8821a1ant_power_save_state(btcoexist,
- BTC_PS_WIFI_NATIVE, 0x0, 0x0);
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ btc8821a1ant_power_save_state(btcoexist,
+ BTC_PS_WIFI_NATIVE, 0x0, 0x0);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
} else if ((bt_link_info->sco_exist) ||
(bt_link_info->hid_only)) {
- /* SCO/HID-only busy*/
- halbtc8821a1ant_power_save_state(btcoexist,
- BTC_PS_WIFI_NATIVE, 0x0, 0x0);
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ /* SCO/HID-only busy */
+ btc8821a1ant_power_save_state(btcoexist,
+ BTC_PS_WIFI_NATIVE, 0x0, 0x0);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 32);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
} else {
- halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_LPS_ON,
- 0x50, 0x4);
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 30);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ btc8821a1ant_power_save_state(btcoexist, BTC_PS_LPS_ON,
+ 0x50, 0x4);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 30);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
}
}
static void btc8821a1ant_act_bt_sco_hid_only_busy(struct btc_coexist *btcoexist,
u8 wifi_status) {
- /* tdma and coex table*/
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+ /* tdma and coex table */
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ if (BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN ==
+ wifi_status)
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ else
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
}
static void btc8821a1ant_act_wifi_con_bt_acl_busy(struct btc_coexist *btcoexist,
u8 wifi_status)
{
- u8 bt_rssi_state;
+ u8 bt_rssi_state;
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- bt_rssi_state = halbtc8821a1ant_bt_rssi_state(btcoexist, 2, 28, 0);
+ bt_rssi_state = btc8821a1ant_bt_rssi_state(btcoexist, 2, 28, 0);
if (bt_link_info->hid_only) {
- /*HID*/
+ /* HID */
btc8821a1ant_act_bt_sco_hid_only_busy(btcoexist,
wifi_status);
coex_dm->auto_tdma_adjust = false;
return;
} else if (bt_link_info->a2dp_only) {
- /*A2DP*/
- if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
- (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a1ant_tdma_dur_adj(btcoexist, wifi_status);
- } else {
- /*for low BT RSSI*/
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
+ /* A2DP */
+ if ((bt_rssi_state != BTC_RSSI_STATE_HIGH) &&
+ (bt_rssi_state != BTC_RSSI_STATE_STAY_HIGH)) {
+ /* for low BT RSSI */
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 11);
coex_dm->auto_tdma_adjust = false;
}
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
} else if (bt_link_info->hid_exist && bt_link_info->a2dp_exist) {
- /*HID+A2DP*/
+ /* HID+A2DP */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 14);
coex_dm->auto_tdma_adjust = false;
} else {
/*for low BT RSSI*/
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 11);
coex_dm->auto_tdma_adjust = false;
}
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
} else if ((bt_link_info->pan_only) ||
(bt_link_info->hid_exist && bt_link_info->pan_exist)) {
- /*PAN(OPP, FTP), HID+PAN(OPP, FTP)*/
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ /* PAN(OPP, FTP), HID+PAN(OPP, FTP) */
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
coex_dm->auto_tdma_adjust = false;
} else if (((bt_link_info->a2dp_exist) && (bt_link_info->pan_exist)) ||
(bt_link_info->hid_exist && bt_link_info->a2dp_exist &&
bt_link_info->pan_exist)) {
- /*A2DP+PAN(OPP, FTP), HID+A2DP+PAN(OPP, FTP)*/
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ /* A2DP+PAN(OPP, FTP), HID+A2DP+PAN(OPP, FTP) */
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 13);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
coex_dm->auto_tdma_adjust = false;
} else {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 11);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
coex_dm->auto_tdma_adjust = false;
}
}
-static void halbtc8821a1ant_action_wifi_not_connected(
- struct btc_coexist *btcoexist)
+static
+void btc8821a1ant_action_wifi_not_connected(struct btc_coexist *btcoexist)
{
- /* power save state*/
- halbtc8821a1ant_power_save_state(btcoexist,
- BTC_PS_WIFI_NATIVE, 0x0, 0x0);
+ /* power save state */
+ btc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
- /* tdma and coex table*/
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
+ /* tdma and coex table */
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 0);
}
static void btc8821a1ant_act_wifi_not_conn_scan(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_power_save_state(btcoexist,
- BTC_PS_WIFI_NATIVE, 0x0, 0x0);
+ btc8821a1ant_power_save_state(btcoexist,
+ BTC_PS_WIFI_NATIVE, 0x0, 0x0);
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
}
-static void halbtc8821a1ant_action_wifi_connected_scan(
- struct btc_coexist *btcoexist) {
+static
+void btc8821a1ant_action_wifi_connected_scan(struct btc_coexist *btcoexist)
+{
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- /* power save state*/
- halbtc8821a1ant_power_save_state(btcoexist,
- BTC_PS_WIFI_NATIVE, 0x0, 0x0);
+ /* power save state */
+ btc8821a1ant_power_save_state(btcoexist,
+ BTC_PS_WIFI_NATIVE, 0x0, 0x0);
- /* tdma and coex table*/
+ /* tdma and coex table */
if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
if (bt_link_info->a2dp_exist && bt_link_info->pan_exist) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 22);
- halbtc8821a1ant_coex_table_with_type(btcoexist,
- NORMAL_EXEC, 1);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 22);
+ btc8821a1ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 1);
} else {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
}
} else if ((BT_8821A_1ANT_BT_STATUS_SCO_BUSY ==
coex_dm->bt_status) ||
btc8821a1ant_act_bt_sco_hid_only_busy(btcoexist,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN);
} else {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
}
}
static void btc8821a1ant_act_wifi_conn_sp_pkt(struct btc_coexist *btcoexist)
{
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- bool hs_connecting = false;
+ bool hs_connecting = false;
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_CONNECTING, &hs_connecting);
- halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
- 0x0, 0x0);
+ btc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
+ 0x0, 0x0);
- /* tdma and coex table*/
- if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
+ /* tdma and coex table */
+ if (coex_dm->bt_status == BT_8821A_1ANT_BT_STATUS_ACL_BUSY) {
if (bt_link_info->a2dp_exist && bt_link_info->pan_exist) {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 22);
- halbtc8821a1ant_coex_table_with_type(btcoexist,
- NORMAL_EXEC, 1);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 22);
+ btc8821a1ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 1);
} else {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 20);
- halbtc8821a1ant_coex_table_with_type(btcoexist,
- NORMAL_EXEC, 1);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 20);
+ btc8821a1ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 1);
}
} else {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
- halbtc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 20);
+ btc8821a1ant_coex_table_with_type(btcoexist, NORMAL_EXEC, 1);
}
}
-static void halbtc8821a1ant_action_wifi_connected(struct btc_coexist *btcoexist)
+static void btc8821a1ant_action_wifi_connected(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- bool wifi_busy = false;
- bool scan = false, link = false, roam = false;
- bool under_4way = false;
+ bool wifi_busy = false;
+ bool scan = false, link = false, roam = false;
+ bool under_4way = false;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], CoexForWifiConnect()===>\n");
- btcoexist->btc_get(btcoexist,
- BTC_GET_BL_WIFI_4_WAY_PROGRESS, &under_4way);
+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+ &under_4way);
if (under_4way) {
btc8821a1ant_act_wifi_conn_sp_pkt(btcoexist);
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
if (scan || link || roam) {
- halbtc8821a1ant_action_wifi_connected_scan(btcoexist);
+ btc8821a1ant_action_wifi_connected_scan(btcoexist);
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], CoexForWifiConnect(), return for wifi is under scan<===\n");
return;
/* power save state*/
if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY ==
coex_dm->bt_status && !btcoexist->bt_link_info.hid_only)
- halbtc8821a1ant_power_save_state(btcoexist,
- BTC_PS_LPS_ON, 0x50, 0x4);
+ btc8821a1ant_power_save_state(btcoexist,
+ BTC_PS_LPS_ON, 0x50, 0x4);
else
- halbtc8821a1ant_power_save_state(btcoexist,
- BTC_PS_WIFI_NATIVE,
- 0x0, 0x0);
+ btc8821a1ant_power_save_state(btcoexist,
+ BTC_PS_WIFI_NATIVE,
+ 0x0, 0x0);
- /* tdma and coex table*/
+ /* tdma and coex table */
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
if (!wifi_busy) {
if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
btc8821a1ant_act_bt_sco_hid_only_busy(btcoexist,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE);
} else {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- halbtc8821a1ant_coex_table_with_type(btcoexist,
- NORMAL_EXEC, 2);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 5);
+ btc8821a1ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 2);
}
} else {
if (BT_8821A_1ANT_BT_STATUS_ACL_BUSY == coex_dm->bt_status) {
btc8821a1ant_act_bt_sco_hid_only_busy(btcoexist,
BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY);
} else {
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- halbtc8821a1ant_coex_table_with_type(btcoexist,
- NORMAL_EXEC, 2);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
+ btc8821a1ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 2);
}
}
}
static void btc8821a1ant_run_sw_coex_mech(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 algorithm = 0;
+ u8 algorithm = 0;
- algorithm = halbtc8821a1ant_action_algorithm(btcoexist);
+ algorithm = btc8821a1ant_action_algorithm(btcoexist);
coex_dm->cur_algorithm = algorithm;
- if (!halbtc8821a1ant_is_common_action(btcoexist)) {
+ if (!btc8821a1ant_is_common_action(btcoexist)) {
switch (coex_dm->cur_algorithm) {
case BT_8821A_1ANT_COEX_ALGO_SCO:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = SCO\n");
- halbtc8821a1ant_action_sco(btcoexist);
+ btc8821a1ant_action_sco(btcoexist);
break;
case BT_8821A_1ANT_COEX_ALGO_HID:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = HID\n");
- halbtc8821a1ant_action_hid(btcoexist);
+ btc8821a1ant_action_hid(btcoexist);
break;
case BT_8821A_1ANT_COEX_ALGO_A2DP:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = A2DP\n");
- halbtc8821a1ant_action_a2dp(btcoexist);
+ btc8821a1ant_action_a2dp(btcoexist);
break;
case BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = A2DP+PAN(HS)\n");
- halbtc8821a1ant_action_a2dp_pan_hs(btcoexist);
+ btc8821a1ant_action_a2dp_pan_hs(btcoexist);
break;
case BT_8821A_1ANT_COEX_ALGO_PANEDR:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = PAN(EDR)\n");
- halbtc8821a1ant_action_pan_edr(btcoexist);
+ btc8821a1ant_action_pan_edr(btcoexist);
break;
case BT_8821A_1ANT_COEX_ALGO_PANHS:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = HS mode\n");
- halbtc8821a1ant_action_pan_hs(btcoexist);
+ btc8821a1ant_action_pan_hs(btcoexist);
break;
case BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = PAN+A2DP\n");
- halbtc8821a1ant_action_pan_edr_a2dp(btcoexist);
+ btc8821a1ant_action_pan_edr_a2dp(btcoexist);
break;
case BT_8821A_1ANT_COEX_ALGO_PANEDR_HID:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = PAN(EDR)+HID\n");
- halbtc8821a1ant_action_pan_edr_hid(btcoexist);
+ btc8821a1ant_action_pan_edr_hid(btcoexist);
break;
case BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
case BT_8821A_1ANT_COEX_ALGO_HID_A2DP:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = HID+A2DP\n");
- halbtc8821a1ant_action_hid_a2dp(btcoexist);
+ btc8821a1ant_action_hid_a2dp(btcoexist);
break;
default:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action algorithm = coexist All Off!!\n");
- /*halbtc8821a1ant_coex_all_off(btcoexist);*/
+ /*btc8821a1ant_coex_all_off(btcoexist);*/
break;
}
coex_dm->pre_algorithm = coex_dm->cur_algorithm;
}
}
-static void halbtc8821a1ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
+static void btc8821a1ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
struct btc_bt_link_info *bt_link_info = &btcoexist->bt_link_info;
- bool wifi_connected = false, bt_hs_on = false;
- bool increase_scan_dev_num = false;
- bool bt_ctrl_agg_buf_size = false;
- u8 agg_buf_size = 5;
- u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
- bool wifi_under_5g = false;
+ bool wifi_connected = false, bt_hs_on = false;
+ bool increase_scan_dev_num = false;
+ bool bt_ctrl_agg_buf_size = false;
+ u8 agg_buf_size = 5;
+ u8 wifi_rssi_state = BTC_RSSI_STATE_HIGH;
+ bool wifi_under_5g = false;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], RunCoexistMechanism()===>\n");
if (wifi_under_5g) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], RunCoexistMechanism(), return for 5G <===\n");
- halbtc8821a1ant_coex_under_5g(btcoexist);
+ btc8821a1ant_coex_under_5g(btcoexist);
return;
}
btcoexist->btc_set(btcoexist, BTC_SET_BL_INC_SCAN_DEV_NUM,
&increase_scan_dev_num);
- btcoexist->btc_get(btcoexist,
- BTC_GET_BL_WIFI_CONNECTED, &wifi_connected);
+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
+ &wifi_connected);
if (!bt_link_info->sco_exist && !bt_link_info->hid_exist) {
- halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
+ btc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC, 0, 0, 0, 0);
} else {
if (wifi_connected) {
wifi_rssi_state =
- halbtc8821a1ant_WifiRssiState(btcoexist, 1, 2,
- 30, 0);
- halbtc8821a1ant_limited_tx(btcoexist,
- NORMAL_EXEC, 1, 1, 1, 1);
+ btc8821a1ant_wifi_rssi_state(btcoexist, 1, 2,
+ 30, 0);
+ if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8821a1ant_limited_tx(btcoexist,
+ NORMAL_EXEC, 1, 1,
+ 1, 1);
+ } else {
+ btc8821a1ant_limited_tx(btcoexist,
+ NORMAL_EXEC, 1, 1,
+ 1, 1);
+ }
} else {
- halbtc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC,
- 0, 0, 0, 0);
+ btc8821a1ant_limited_tx(btcoexist, NORMAL_EXEC,
+ 0, 0, 0, 0);
}
}
bt_ctrl_agg_buf_size = true;
agg_buf_size = 0x8;
}
- halbtc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
- bt_ctrl_agg_buf_size, agg_buf_size);
+ btc8821a1ant_limited_rx(btcoexist, NORMAL_EXEC, false,
+ bt_ctrl_agg_buf_size, agg_buf_size);
btc8821a1ant_run_sw_coex_mech(btcoexist);
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
if (coex_sta->c2h_bt_inquiry_page) {
- halbtc8821a1ant_action_bt_inquiry(btcoexist);
+ btc8821a1ant_action_bt_inquiry(btcoexist);
return;
} else if (bt_hs_on) {
- halbtc8821a1ant_action_hs(btcoexist);
+ btc8821a1ant_action_hs(btcoexist);
return;
}
if (!wifi_connected) {
- bool scan = false, link = false, roam = false;
+ bool scan = false, link = false, roam = false;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], wifi is non connected-idle !!!\n");
if (scan || link || roam)
btc8821a1ant_act_wifi_not_conn_scan(btcoexist);
else
- halbtc8821a1ant_action_wifi_not_connected(btcoexist);
+ btc8821a1ant_action_wifi_not_connected(btcoexist);
} else {
- /* wifi LPS/Busy*/
- halbtc8821a1ant_action_wifi_connected(btcoexist);
+ /* wifi LPS/Busy */
+ btc8821a1ant_action_wifi_connected(btcoexist);
}
}
-static void halbtc8821a1ant_init_coex_dm(struct btc_coexist *btcoexist)
+static void btc8821a1ant_init_coex_dm(struct btc_coexist *btcoexist)
{
- /* force to reset coex mechanism*/
- /* sw all off*/
- halbtc8821a1ant_sw_mechanism(btcoexist, false);
+ /* force to reset coex mechanism
+ * sw all off
+ */
+ btc8821a1ant_sw_mechanism(btcoexist, false);
- halbtc8821a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
- halbtc8821a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
+ btc8821a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 8);
+ btc8821a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
}
-static void halbtc8821a1ant_init_hw_config(struct btc_coexist *btcoexist,
- bool back_up)
+static void btc8821a1ant_init_hw_config(struct btc_coexist *btcoexist,
+ bool back_up)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 u1_tmp = 0;
- bool wifi_under_5g = false;
+ u8 u1_tmp = 0;
+ bool wifi_under_5g = false;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], 1Ant Init HW Config!!\n");
coex_dm->backup_arfr_cnt2 = btcoexist->btc_read_4byte(btcoexist,
0x434);
coex_dm->backup_retry_limit =
- btcoexist->btc_read_2byte(btcoexist, 0x42a);
+ btcoexist->btc_read_2byte(btcoexist, 0x42a);
coex_dm->backup_ampdu_max_time =
- btcoexist->btc_read_1byte(btcoexist, 0x456);
+ btcoexist->btc_read_1byte(btcoexist, 0x456);
}
- /* 0x790[5:0] = 0x5*/
+ /* 0x790[5:0] = 0x5 */
u1_tmp = btcoexist->btc_read_1byte(btcoexist, 0x790);
u1_tmp &= 0xc0;
u1_tmp |= 0x5;
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
- /*Antenna config*/
+ /* Antenna config */
if (wifi_under_5g)
- halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
- true, false);
+ btc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT,
+ true, false);
else
- halbtc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
- true, false);
- /* PTA parameter*/
- halbtc8821a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
-
- /* Enable counter statistics*/
- /*0x76e[3] =1, WLAN_Act control by PTA*/
+ btc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_PTA,
+ true, false);
+ /* PTA parameter */
+ btc8821a1ant_coex_table_with_type(btcoexist, FORCE_EXEC, 0);
+
+ /* Enable counter statistics
+ * 0x76e[3] =1, WLAN_Act control by PTA
+ */
btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
btcoexist->btc_write_1byte(btcoexist, 0x778, 0x3);
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
}
-/*============================================================*/
-/* work around function start with wa_halbtc8821a1ant_*/
-/*============================================================*/
-/*============================================================*/
-/* extern function start with EXhalbtc8821a1ant_*/
-/*============================================================*/
-void ex_halbtc8821a1ant_init_hwconfig(struct btc_coexist *btcoexist)
+/**************************************************************
+ * extern function start with ex_btc8821a1ant_
+ **************************************************************/
+void ex_btc8821a1ant_init_hwconfig(struct btc_coexist *btcoexist)
{
- halbtc8821a1ant_init_hw_config(btcoexist, true);
+ btc8821a1ant_init_hw_config(btcoexist, true);
}
-void ex_halbtc8821a1ant_init_coex_dm(struct btc_coexist *btcoexist)
+void ex_btc8821a1ant_init_coex_dm(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
btcoexist->stop_coex_dm = false;
- halbtc8821a1ant_init_coex_dm(btcoexist);
+ btc8821a1ant_init_coex_dm(btcoexist);
- halbtc8821a1ant_query_bt_info(btcoexist);
+ btc8821a1ant_query_bt_info(btcoexist);
}
-void ex_halbtc8821a1ant_display_coex_info(struct btc_coexist *btcoexist)
+void ex_btc8821a1ant_display_coex_info(struct btc_coexist *btcoexist)
{
struct btc_board_info *board_info = &btcoexist->board_info;
struct btc_stack_info *stack_info = &btcoexist->stack_info;
"\r\n %-35s = %s/%s, (0x%x/0x%x)",
"PS state, IPS/LPS, (lps/rpwm)",
((coex_sta->under_ips ? "IPS ON" : "IPS OFF")),
- ((coex_sta->under_Lps ? "LPS ON" : "LPS OFF")),
+ ((coex_sta->under_lps ? "LPS ON" : "LPS OFF")),
btcoexist->bt_info.lps_val,
btcoexist->bt_info.rpwm_val);
btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_FW_PWR_MODE_CMD);
"\r\n %-35s = 0x%x ", "Rate Mask",
btcoexist->bt_info.ra_mask);
- /* Fw mechanism*/
+ /* Fw mechanism */
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "\r\n %-35s",
"============[Fw mechanism]============");
coex_dm->cur_ignore_wlan_act);
}
- /* Hw setting*/
+ /* Hw setting */
RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
"\r\n %-35s", "============[Hw setting]============");
"\r\n %-35s = %d/ %d", "0x774(low-pri rx/tx)",
coex_sta->low_priority_rx, coex_sta->low_priority_tx);
#if (BT_AUTO_REPORT_ONLY_8821A_1ANT == 1)
- halbtc8821a1ant_monitor_bt_ctr(btcoexist);
+ btc8821a1ant_monitor_bt_ctr(btcoexist);
#endif
btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
}
-void ex_halbtc8821a1ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8821a1ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], IPS ENTER notify\n");
coex_sta->under_ips = true;
- halbtc8821a1ant_set_ant_path(btcoexist,
- BTC_ANT_PATH_BT, false, true);
- /*set PTA control*/
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
- halbtc8821a1ant_coex_table_with_type(btcoexist,
- NORMAL_EXEC, 0);
+ btc8821a1ant_set_ant_path(btcoexist,
+ BTC_ANT_PATH_BT, false, true);
+ /* set PTA control */
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 8);
+ btc8821a1ant_coex_table_with_type(btcoexist,
+ NORMAL_EXEC, 0);
} else if (BTC_IPS_LEAVE == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], IPS LEAVE notify\n");
coex_sta->under_ips = false;
- halbtc8821a1ant_run_coexist_mechanism(btcoexist);
+ btc8821a1ant_run_coexist_mechanism(btcoexist);
}
}
-void ex_halbtc8821a1ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8821a1ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
if (BTC_LPS_ENABLE == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], LPS ENABLE notify\n");
- coex_sta->under_Lps = true;
+ coex_sta->under_lps = true;
} else if (BTC_LPS_DISABLE == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], LPS DISABLE notify\n");
- coex_sta->under_Lps = false;
+ coex_sta->under_lps = false;
}
}
-void ex_halbtc8821a1ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8821a1ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
bool wifi_connected = false, bt_hs_on = false;
btcoexist->btc_get(btcoexist,
BTC_GET_BL_WIFI_CONNECTED, &wifi_connected);
- halbtc8821a1ant_query_bt_info(btcoexist);
+ btc8821a1ant_query_bt_info(btcoexist);
if (coex_sta->c2h_bt_inquiry_page) {
- halbtc8821a1ant_action_bt_inquiry(btcoexist);
+ btc8821a1ant_action_bt_inquiry(btcoexist);
return;
} else if (bt_hs_on) {
- halbtc8821a1ant_action_hs(btcoexist);
+ btc8821a1ant_action_hs(btcoexist);
return;
}
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], SCAN START notify\n");
if (!wifi_connected) {
- /* non-connected scan*/
+ /* non-connected scan */
btc8821a1ant_act_wifi_not_conn_scan(btcoexist);
} else {
- /* wifi is connected*/
- halbtc8821a1ant_action_wifi_connected_scan(btcoexist);
+ /* wifi is connected */
+ btc8821a1ant_action_wifi_connected_scan(btcoexist);
}
} else if (BTC_SCAN_FINISH == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], SCAN FINISH notify\n");
if (!wifi_connected) {
- /* non-connected scan*/
- halbtc8821a1ant_action_wifi_not_connected(btcoexist);
+ /* non-connected scan */
+ btc8821a1ant_action_wifi_not_connected(btcoexist);
} else {
- halbtc8821a1ant_action_wifi_connected(btcoexist);
+ btc8821a1ant_action_wifi_connected(btcoexist);
}
}
}
-void ex_halbtc8821a1ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8821a1ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
bool wifi_connected = false, bt_hs_on = false;
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
if (coex_sta->c2h_bt_inquiry_page) {
- halbtc8821a1ant_action_bt_inquiry(btcoexist);
+ btc8821a1ant_action_bt_inquiry(btcoexist);
return;
} else if (bt_hs_on) {
- halbtc8821a1ant_action_hs(btcoexist);
+ btc8821a1ant_action_hs(btcoexist);
return;
}
btcoexist->btc_get(btcoexist,
BTC_GET_BL_WIFI_CONNECTED, &wifi_connected);
if (!wifi_connected) {
- /* non-connected scan*/
- halbtc8821a1ant_action_wifi_not_connected(btcoexist);
+ /* non-connected scan */
+ btc8821a1ant_action_wifi_not_connected(btcoexist);
} else {
- halbtc8821a1ant_action_wifi_connected(btcoexist);
+ btc8821a1ant_action_wifi_connected(btcoexist);
}
}
}
-void ex_halbtc8821a1ant_media_status_notify(struct btc_coexist *btcoexist,
- u8 type)
+void ex_btc8821a1ant_media_status_notify(struct btc_coexist *btcoexist,
+ u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[3] = {0};
"[BTCoex], MEDIA disconnect notify\n");
}
- /* only 2.4G we need to inform bt the chnl mask*/
+ /* only 2.4G we need to inform bt the chnl mask */
btcoexist->btc_get(btcoexist,
BTC_GET_U1_WIFI_CENTRAL_CHNL,
&wifi_central_chnl);
- if ((BTC_MEDIA_CONNECT == type) &&
+ if ((type == BTC_MEDIA_CONNECT) &&
(wifi_central_chnl <= 14)) {
- /*h2c_parameter[0] = 0x1;*/
h2c_parameter[0] = 0x0;
h2c_parameter[1] = wifi_central_chnl;
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- if (BTC_WIFI_BW_HT40 == wifi_bw)
+ if (wifi_bw == BTC_WIFI_BW_HT40)
h2c_parameter[2] = 0x30;
else
h2c_parameter[2] = 0x20;
btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
}
-void ex_halbtc8821a1ant_special_packet_notify(struct btc_coexist *btcoexist,
- u8 type)
+void ex_btc8821a1ant_special_packet_notify(struct btc_coexist *btcoexist,
+ u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
bool bt_hs_on = false;
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
if (coex_sta->c2h_bt_inquiry_page) {
- halbtc8821a1ant_action_bt_inquiry(btcoexist);
+ btc8821a1ant_action_bt_inquiry(btcoexist);
return;
} else if (bt_hs_on) {
- halbtc8821a1ant_action_hs(btcoexist);
+ btc8821a1ant_action_hs(btcoexist);
return;
}
}
}
-void ex_halbtc8821a1ant_bt_info_notify(struct btc_coexist *btcoexist,
- u8 *tmp_buf, u8 length)
+void ex_btc8821a1ant_bt_info_notify(struct btc_coexist *btcoexist,
+ u8 *tmp_buf, u8 length)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
+ u8 i;
u8 bt_info = 0;
- u8 i, rsp_source = 0;
+ u8 rsp_source = 0;
bool wifi_connected = false;
bool bt_busy = false;
bool wifi_under_5g = false;
btcoexist->btc_get(btcoexist,
BTC_GET_BL_WIFI_UNDER_5G, &wifi_under_5g);
- rsp_source = tmp_buf[0]&0xf;
+ rsp_source = tmp_buf[0] & 0xf;
if (rsp_source >= BT_INFO_SRC_8821A_1ANT_MAX)
rsp_source = BT_INFO_SRC_8821A_1ANT_WIFI_FW;
coex_sta->bt_info_c2h_cnt[rsp_source]++;
coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
if (i == 1)
bt_info = tmp_buf[i];
- if (i == length-1) {
+ if (i == length - 1) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"0x%02x]\n", tmp_buf[i]);
} else {
coex_sta->bt_info_ext =
coex_sta->bt_info_c2h[rsp_source][4];
- /* Here we need to resend some wifi info to BT*/
- /* because bt is reset and loss of the info.*/
+ /* Here we need to resend some wifi info to BT
+ * because bt is reset and lost the info
+ */
if (coex_sta->bt_info_ext & BIT1) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BT ext info bit1 check, send wifi BW&Chnl to BT!!\n");
- btcoexist->btc_get(btcoexist,
- BTC_GET_BL_WIFI_CONNECTED,
+ btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
&wifi_connected);
if (wifi_connected) {
- ex_halbtc8821a1ant_media_status_notify(btcoexist,
+ ex_btc8821a1ant_media_status_notify(btcoexist,
BTC_MEDIA_CONNECT);
} else {
- ex_halbtc8821a1ant_media_status_notify(btcoexist,
+ ex_btc8821a1ant_media_status_notify(btcoexist,
BTC_MEDIA_DISCONNECT);
}
}
!btcoexist->stop_coex_dm) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BT ext info bit3 check, set BT NOT to ignore Wlan active!!\n");
- halbtc8821a1ant_ignore_wlan_act(btcoexist,
- FORCE_EXEC,
- false);
+ btc8821a1ant_ignore_wlan_act(btcoexist,
+ FORCE_EXEC,
+ false);
}
}
-#if (BT_AUTO_REPORT_ONLY_8821A_1ANT == 0)
- if (!(coex_sta->bt_info_ext & BIT4)) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT ext info bit4 check, set BT to enable Auto Report!!\n");
- halbtc8821a1ant_bt_auto_report(btcoexist,
- FORCE_EXEC, true);
- }
-#endif
}
- /* check BIT2 first ==> check if bt is under inquiry or page scan*/
+ /* check BIT2 first ==> check if bt is under inquiry or page scan */
if (bt_info & BT_INFO_8821A_1ANT_B_INQ_PAGE)
coex_sta->c2h_bt_inquiry_page = true;
else
coex_sta->c2h_bt_inquiry_page = false;
- /* set link exist status*/
- if (!(bt_info&BT_INFO_8821A_1ANT_B_CONNECTION)) {
+ /* set link exist status */
+ if (!(bt_info & BT_INFO_8821A_1ANT_B_CONNECTION)) {
coex_sta->bt_link_exist = false;
coex_sta->pan_exist = false;
coex_sta->a2dp_exist = false;
coex_sta->hid_exist = false;
coex_sta->sco_exist = false;
} else {
- /* connection exists*/
+ /* connection exists */
coex_sta->bt_link_exist = true;
if (bt_info & BT_INFO_8821A_1ANT_B_FTP)
coex_sta->pan_exist = true;
coex_sta->sco_exist = false;
}
- halbtc8821a1ant_update_bt_link_info(btcoexist);
+ btc8821a1ant_update_bt_link_info(btcoexist);
if (!(bt_info&BT_INFO_8821A_1ANT_B_CONNECTION)) {
coex_dm->bt_status = BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BtInfoNotify(), BT Non-Connected idle!!!\n");
} else if (bt_info == BT_INFO_8821A_1ANT_B_CONNECTION) {
- /* connection exists but no busy*/
+ /* connection exists but no busy */
coex_dm->bt_status = BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BtInfoNotify(), BT Connected-idle!!!\n");
btcoexist->btc_set(btcoexist,
BTC_SET_BL_BT_TRAFFIC_BUSY, &bt_busy);
- halbtc8821a1ant_run_coexist_mechanism(btcoexist);
+ btc8821a1ant_run_coexist_mechanism(btcoexist);
}
-void ex_halbtc8821a1ant_halt_notify(struct btc_coexist *btcoexist)
+void ex_btc8821a1ant_halt_notify(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
btcoexist->stop_coex_dm = true;
- halbtc8821a1ant_set_ant_path(btcoexist,
- BTC_ANT_PATH_BT, false, true);
- halbtc8821a1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
+ btc8821a1ant_set_ant_path(btcoexist, BTC_ANT_PATH_BT, false, true);
+ btc8821a1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
- halbtc8821a1ant_power_save_state(btcoexist,
- BTC_PS_WIFI_NATIVE, 0x0, 0x0);
- halbtc8821a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
+ btc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE, 0x0, 0x0);
+ btc8821a1ant_ps_tdma(btcoexist, FORCE_EXEC, false, 0);
- ex_halbtc8821a1ant_media_status_notify(btcoexist,
- BTC_MEDIA_DISCONNECT);
+ ex_btc8821a1ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
}
-void ex_halbtc8821a1ant_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state)
+void ex_btc8821a1ant_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Pnp notify to SLEEP\n");
btcoexist->stop_coex_dm = true;
- halbtc8821a1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
- halbtc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
- 0x0, 0x0);
- halbtc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 9);
+ btc8821a1ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
+ btc8821a1ant_power_save_state(btcoexist, BTC_PS_WIFI_NATIVE,
+ 0x0, 0x0);
+ btc8821a1ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 9);
} else if (BTC_WIFI_PNP_WAKE_UP == pnp_state) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Pnp notify to WAKE UP\n");
btcoexist->stop_coex_dm = false;
- halbtc8821a1ant_init_hw_config(btcoexist, false);
- halbtc8821a1ant_init_coex_dm(btcoexist);
- halbtc8821a1ant_query_bt_info(btcoexist);
+ btc8821a1ant_init_hw_config(btcoexist, false);
+ btc8821a1ant_init_coex_dm(btcoexist);
+ btc8821a1ant_query_bt_info(btcoexist);
}
}
-void ex_halbtc8821a1ant_periodical(struct btc_coexist *btcoexist)
+void ex_btc8821a1ant_periodical(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- static u8 dis_ver_info_cnt;
- u32 fw_ver = 0, bt_patch_ver = 0;
+ static u8 dis_ver_info_cnt;
+ u32 fw_ver = 0, bt_patch_ver = 0;
struct btc_board_info *board_info = &btcoexist->board_info;
struct btc_stack_info *stack_info = &btcoexist->stack_info;
}
#if (BT_AUTO_REPORT_ONLY_8821A_1ANT == 0)
- halbtc8821a1ant_query_bt_info(btcoexist);
- halbtc8821a1ant_monitor_bt_ctr(btcoexist);
- btc8821a1ant_mon_bt_en_dis(btcoexist);
+ btc8821a1ant_query_bt_info(btcoexist);
+ btc8821a1ant_monitor_bt_ctr(btcoexist);
#else
- if (halbtc8821a1ant_Is_wifi_status_changed(btcoexist) ||
- coex_dm->auto_tdma_adjust) {
- if (coex_sta->special_pkt_period_cnt > 2)
- halbtc8821a1ant_run_coexist_mechanism(btcoexist);
- }
-
coex_sta->special_pkt_period_cnt++;
#endif
}
bool hid_exist;
bool pan_exist;
- bool under_Lps;
+ bool under_lps;
bool under_ips;
u32 special_pkt_period_cnt;
u32 high_priority_tx;
*
*****************************************************************************/
-/*============================================================
+/************************************************************
* Description:
*
* This file is for RTL8821A Co-exist mechanism
* 2012/08/22 Cosa first check in.
* 2012/11/14 Cosa Revise for 8821A 2Ant out sourcing.
*
- *============================================================
- */
+ ************************************************************/
-/*============================================================
+/************************************************************
* include files
- *============================================================
-*/
+ ************************************************************/
#include "halbt_precomp.h"
-/*============================================================
+/************************************************************
* Global variables, these are static variables
- *============================================================
- */
-static struct coex_dm_8821a_2ant glcoex_dm_8821a_2ant;
-static struct coex_dm_8821a_2ant *coex_dm = &glcoex_dm_8821a_2ant;
-static struct coex_sta_8821a_2ant glcoex_sta_8821a_2ant;
-static struct coex_sta_8821a_2ant *coex_sta = &glcoex_sta_8821a_2ant;
+ ************************************************************/
+static struct coex_dm_8821a_2ant glcoex_dm_8821a_2ant;
+static struct coex_dm_8821a_2ant *coex_dm = &glcoex_dm_8821a_2ant;
+static struct coex_sta_8821a_2ant glcoex_sta_8821a_2ant;
+static struct coex_sta_8821a_2ant *coex_sta = &glcoex_sta_8821a_2ant;
static const char *const glbt_info_src_8821a_2ant[] = {
"BT Info[wifi fw]",
"BT Info[bt auto report]",
};
-static u32 glcoex_ver_date_8821a_2ant = 20130618;
-static u32 glcoex_ver_8821a_2ant = 0x5050;
+static u32 glcoex_ver_date_8821a_2ant = 20130618;
+static u32 glcoex_ver_8821a_2ant = 0x5050;
-/*============================================================
+/************************************************************
* local function proto type if needed
- *============================================================
- *============================================================
- * local function start with halbtc8821a2ant_
- *============================================================
- */
-static u8 halbtc8821a2ant_bt_rssi_state(struct btc_coexist *btcoexist,
- u8 level_num, u8 rssi_thresh,
- u8 rssi_thresh1)
+ *
+ * local function start with btc8821a2ant_
+ ************************************************************/
+static u8 btc8821a2ant_bt_rssi_state(struct btc_coexist *btcoexist,
+ u8 level_num, u8 rssi_thresh,
+ u8 rssi_thresh1)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- long bt_rssi = 0;
- u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
+ long bt_rssi = 0;
+ u8 bt_rssi_state = coex_sta->pre_bt_rssi_state;
bt_rssi = coex_sta->bt_rssi;
if (level_num == 2) {
if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
(coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
- long tmp = rssi_thresh +
- BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT;
- if (bt_rssi >= tmp) {
+ if (bt_rssi >=
+ rssi_thresh + BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT) {
bt_rssi_state = BTC_RSSI_STATE_HIGH;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BT Rssi state switch to High\n");
if ((coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_LOW) ||
(coex_sta->pre_bt_rssi_state == BTC_RSSI_STATE_STAY_LOW)) {
if (bt_rssi >=
- (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) {
+ (rssi_thresh +
+ BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) {
bt_rssi_state = BTC_RSSI_STATE_MEDIUM;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BT Rssi state switch to Medium\n");
return bt_rssi_state;
}
-static u8 halbtc8821a2ant_wifi_rssi_state(struct btc_coexist *btcoexist,
- u8 index, u8 level_num,
- u8 rssi_thresh, u8 rssi_thresh1)
+static u8 btc8821a2ant_wifi_rssi_state(struct btc_coexist *btcoexist,
+ u8 index, u8 level_num,
+ u8 rssi_thresh, u8 rssi_thresh1)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- long wifi_rssi = 0;
- u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
+ long wifi_rssi = 0;
+ u8 wifi_rssi_state = coex_sta->pre_wifi_rssi_state[index];
btcoexist->btc_get(btcoexist, BTC_GET_S4_WIFI_RSSI, &wifi_rssi);
(coex_sta->pre_wifi_rssi_state[index] ==
BTC_RSSI_STATE_STAY_LOW)) {
if (wifi_rssi >=
- (rssi_thresh+BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) {
+ (rssi_thresh +
+ BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT)) {
wifi_rssi_state = BTC_RSSI_STATE_MEDIUM;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], wifi RSSI state switch to Medium\n");
return wifi_rssi_state;
}
-static void btc8821a2ant_mon_bt_en_dis(struct btc_coexist *btcoexist)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- static bool pre_bt_disabled;
- static u32 bt_disable_cnt;
- bool bt_active = true, bt_disabled = false;
-
- /* This function check if bt is disabled*/
-
- if (coex_sta->high_priority_tx == 0 &&
- coex_sta->high_priority_rx == 0 &&
- coex_sta->low_priority_tx == 0 &&
- coex_sta->low_priority_rx == 0)
- bt_active = false;
- if (coex_sta->high_priority_tx == 0xffff &&
- coex_sta->high_priority_rx == 0xffff &&
- coex_sta->low_priority_tx == 0xffff &&
- coex_sta->low_priority_rx == 0xffff)
- bt_active = false;
- if (bt_active) {
- bt_disable_cnt = 0;
- bt_disabled = false;
- btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
- &bt_disabled);
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT is enabled !!\n");
- } else {
- bt_disable_cnt++;
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], bt all counters = 0, %d times!!\n",
- bt_disable_cnt);
- if (bt_disable_cnt >= 2) {
- bt_disabled = true;
- btcoexist->btc_set(btcoexist, BTC_SET_BL_BT_DISABLE,
- &bt_disabled);
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT is disabled !!\n");
- }
- }
- if (pre_bt_disabled != bt_disabled) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT is from %s to %s!!\n",
- (pre_bt_disabled ? "disabled" : "enabled"),
- (bt_disabled ? "disabled" : "enabled"));
- pre_bt_disabled = bt_disabled;
- }
-}
-
-static void halbtc8821a2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
+static void btc8821a2ant_monitor_bt_ctr(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- u32 reg_hp_txrx, reg_lp_txrx, u4tmp;
- u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
+ u32 reg_hp_txrx, reg_lp_txrx, u4tmp;
+ u32 reg_hp_tx = 0, reg_hp_rx = 0, reg_lp_tx = 0, reg_lp_rx = 0;
reg_hp_txrx = 0x770;
reg_lp_txrx = 0x774;
u4tmp = btcoexist->btc_read_4byte(btcoexist, reg_hp_txrx);
reg_hp_tx = u4tmp & MASKLWORD;
- reg_hp_rx = (u4tmp & MASKHWORD)>>16;
+ reg_hp_rx = (u4tmp & MASKHWORD) >> 16;
u4tmp = btcoexist->btc_read_4byte(btcoexist, reg_lp_txrx);
reg_lp_tx = u4tmp & MASKLWORD;
- reg_lp_rx = (u4tmp & MASKHWORD)>>16;
+ reg_lp_rx = (u4tmp & MASKHWORD) >> 16;
coex_sta->high_priority_tx = reg_hp_tx;
coex_sta->high_priority_rx = reg_hp_rx;
btcoexist->btc_write_1byte(btcoexist, 0x76e, 0xc);
}
-static void halbtc8821a2ant_query_bt_info(struct btc_coexist *btcoexist)
+static void btc8821a2ant_query_bt_info(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
coex_sta->c2h_bt_info_req_sent = true;
- h2c_parameter[0] |= BIT0; /* trigger */
+ h2c_parameter[0] |= BIT0; /* trigger */
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Query Bt Info, FW write 0x61 = 0x%x\n",
btcoexist->btc_fill_h2c(btcoexist, 0x61, 1, h2c_parameter);
}
-static u8 halbtc8821a2ant_action_algorithm(struct btc_coexist *btcoexist)
+static u8 btc8821a2ant_action_algorithm(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
struct btc_stack_info *stack_info = &btcoexist->stack_info;
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
- /*for win-8 stack HID report error*/
/* sync BTInfo with BT firmware and stack */
if (!stack_info->hid_exist)
stack_info->hid_exist = coex_sta->hid_exist;
return algorithm;
}
-static bool halbtc8821a2ant_need_to_dec_bt_pwr(struct btc_coexist *btcoexist)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- bool ret = false;
- bool bt_hs_on = false, wifi_connected = false;
- long bt_hs_rssi = 0;
- u8 bt_rssi_state;
-
- if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on))
- return false;
- if (!btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_CONNECTED,
- &wifi_connected))
- return false;
- if (!btcoexist->btc_get(btcoexist, BTC_GET_S4_HS_RSSI, &bt_hs_rssi))
- return false;
-
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
-
- if (wifi_connected) {
- if (bt_hs_on) {
- if (bt_hs_rssi > 37) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Need to decrease bt power for HS mode!!\n");
- ret = true;
- }
- } else {
- if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
- (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Need to decrease bt power for Wifi is connected!!\n");
- ret = true;
- }
- }
- }
- return ret;
-}
-
-static void btc8821a2ant_set_fw_dac_swing_lev(struct btc_coexist *btcoexist,
+static void btc8821a2ant_set_fw_dac_swing_lvl(struct btc_coexist *btcoexist,
u8 dac_swing_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
btcoexist->btc_fill_h2c(btcoexist, 0x64, 1, h2c_parameter);
}
-static void halbtc8821a2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist,
- bool dec_bt_pwr)
+static void btc8821a2ant_set_fw_dec_bt_pwr(struct btc_coexist *btcoexist,
+ bool dec_bt_pwr)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[1] = {0};
btcoexist->btc_fill_h2c(btcoexist, 0x62, 1, h2c_parameter);
}
-static void halbtc8821a2ant_dec_bt_pwr(struct btc_coexist *btcoexist,
- bool force_exec, bool dec_bt_pwr)
+static void btc8821a2ant_dec_bt_pwr(struct btc_coexist *btcoexist,
+ bool force_exec, bool dec_bt_pwr)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
if (coex_dm->pre_dec_bt_pwr == coex_dm->cur_dec_bt_pwr)
return;
}
- halbtc8821a2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr);
+ btc8821a2ant_set_fw_dec_bt_pwr(btcoexist, coex_dm->cur_dec_bt_pwr);
coex_dm->pre_dec_bt_pwr = coex_dm->cur_dec_bt_pwr;
}
-static void btc8821a2ant_set_fw_bt_lna_constr(struct btc_coexist *btcoexist,
- bool bt_lna_cons_on)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 h2c_parameter[2] = {0};
-
- h2c_parameter[0] = 0x3; /* opCode, 0x3 = BT_SET_LNA_CONSTRAIN */
-
- if (bt_lna_cons_on)
- h2c_parameter[1] |= BIT0;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], set BT LNA Constrain: %s, FW write 0x69 = 0x%x\n",
- bt_lna_cons_on ? "ON!!" : "OFF!!",
- h2c_parameter[0] << 8 | h2c_parameter[1]);
-
- btcoexist->btc_fill_h2c(btcoexist, 0x69, 2, h2c_parameter);
-}
-
-static void btc8821a2_set_bt_lna_const(struct btc_coexist *btcoexist,
- bool force_exec, bool bt_lna_cons_on)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s BT Constrain = %s\n",
- (force_exec ? "force" : ""),
- ((bt_lna_cons_on) ? "ON" : "OFF"));
- coex_dm->cur_bt_lna_constrain = bt_lna_cons_on;
-
- if (!force_exec) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], pre_bt_lna_constrain = %d,cur_bt_lna_constrain = %d\n",
- coex_dm->pre_bt_lna_constrain,
- coex_dm->cur_bt_lna_constrain);
-
- if (coex_dm->pre_bt_lna_constrain ==
- coex_dm->cur_bt_lna_constrain)
- return;
- }
- btc8821a2ant_set_fw_bt_lna_constr(btcoexist,
- coex_dm->cur_bt_lna_constrain);
-
- coex_dm->pre_bt_lna_constrain = coex_dm->cur_bt_lna_constrain;
-}
-
-static void halbtc8821a2ant_set_fw_bt_psd_mode(struct btc_coexist *btcoexist,
- u8 bt_psd_mode)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 h2c_parameter[2] = {0};
-
- h2c_parameter[0] = 0x2; /* opCode, 0x2 = BT_SET_PSD_MODE */
-
- h2c_parameter[1] = bt_psd_mode;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], set BT PSD mode = 0x%x, FW write 0x69 = 0x%x\n",
- h2c_parameter[1],
- h2c_parameter[0] << 8 | h2c_parameter[1]);
-
- btcoexist->btc_fill_h2c(btcoexist, 0x69, 2, h2c_parameter);
-}
-
-static void halbtc8821a2ant_set_bt_psd_mode(struct btc_coexist *btcoexist,
- bool force_exec, u8 bt_psd_mode)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s BT PSD mode = 0x%x\n",
- (force_exec ? "force" : ""), bt_psd_mode);
- coex_dm->cur_bt_psd_mode = bt_psd_mode;
-
- if (!force_exec) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], pre_bt_psd_mode = 0x%x, cur_bt_psd_mode = 0x%x\n",
- coex_dm->pre_bt_psd_mode, coex_dm->cur_bt_psd_mode);
-
- if (coex_dm->pre_bt_psd_mode == coex_dm->cur_bt_psd_mode)
- return;
- }
- halbtc8821a2ant_set_fw_bt_psd_mode(btcoexist,
- coex_dm->cur_bt_psd_mode);
-
- coex_dm->pre_bt_psd_mode = coex_dm->cur_bt_psd_mode;
-}
-
-static void halbtc8821a2ant_set_bt_auto_report(struct btc_coexist *btcoexist,
- bool enable_auto_report)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 h2c_parameter[1] = {0};
-
- h2c_parameter[0] = 0;
-
- if (enable_auto_report)
- h2c_parameter[0] |= BIT0;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BT FW auto report : %s, FW write 0x68 = 0x%x\n",
- (enable_auto_report ? "Enabled!!" : "Disabled!!"),
- h2c_parameter[0]);
-
- btcoexist->btc_fill_h2c(btcoexist, 0x68, 1, h2c_parameter);
-}
-
-static void halbtc8821a2ant_bt_auto_report(struct btc_coexist *btcoexist,
- bool force_exec,
- bool enable_auto_report)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s BT Auto report = %s\n",
- (force_exec ? "force to" : ""),
- ((enable_auto_report) ? "Enabled" : "Disabled"));
- coex_dm->cur_bt_auto_report = enable_auto_report;
-
- if (!force_exec) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], pre_bt_auto_report = %d, cur_bt_auto_report = %d\n",
- coex_dm->pre_bt_auto_report,
- coex_dm->cur_bt_auto_report);
-
- if (coex_dm->pre_bt_auto_report == coex_dm->cur_bt_auto_report)
- return;
- }
- halbtc8821a2ant_set_bt_auto_report(btcoexist,
- coex_dm->cur_bt_auto_report);
-
- coex_dm->pre_bt_auto_report = coex_dm->cur_bt_auto_report;
-}
-
-static void halbtc8821a2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist,
- bool force_exec,
- u8 fw_dac_swing_lvl)
+static void btc8821a2ant_fw_dac_swing_lvl(struct btc_coexist *btcoexist,
+ bool force_exec, u8 fw_dac_swing_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
return;
}
- btc8821a2ant_set_fw_dac_swing_lev(btcoexist,
+ btc8821a2ant_set_fw_dac_swing_lvl(btcoexist,
coex_dm->cur_fw_dac_swing_lvl);
coex_dm->pre_fw_dac_swing_lvl = coex_dm->cur_fw_dac_swing_lvl;
}
-static void btc8821a2ant_set_sw_rf_rx_lpf_corner(struct btc_coexist *btcoexist,
- bool rx_rf_shrink_on)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- if (rx_rf_shrink_on) {
- /* Shrink RF Rx LPF corner */
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Shrink RF Rx LPF corner!!\n");
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A, 0x1e,
- 0xfffff, 0xffffc);
- } else {
- /* Resume RF Rx LPF corner
- * After initialized, we can use coex_dm->bt_rf0x1e_backup
- */
- if (btcoexist->initilized) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], Resume RF Rx LPF corner!!\n");
- btcoexist->btc_set_rf_reg(btcoexist, BTC_RF_A,
- 0x1e, 0xfffff,
- coex_dm->bt_rf0x1e_backup);
- }
- }
-}
-
-static void halbtc8821a2ant_RfShrink(struct btc_coexist *btcoexist,
- bool force_exec, bool rx_rf_shrink_on)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s turn Rx RF Shrink = %s\n",
- (force_exec ? "force to" : ""),
- ((rx_rf_shrink_on) ? "ON" : "OFF"));
- coex_dm->cur_rf_rx_lpf_shrink = rx_rf_shrink_on;
-
- if (!force_exec) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], pre_rf_rx_lpf_shrink = %d, cur_rf_rx_lpf_shrink = %d\n",
- coex_dm->pre_rf_rx_lpf_shrink,
- coex_dm->cur_rf_rx_lpf_shrink);
-
- if (coex_dm->pre_rf_rx_lpf_shrink ==
- coex_dm->cur_rf_rx_lpf_shrink)
- return;
- }
- btc8821a2ant_set_sw_rf_rx_lpf_corner(btcoexist,
- coex_dm->cur_rf_rx_lpf_shrink);
-
- coex_dm->pre_rf_rx_lpf_shrink = coex_dm->cur_rf_rx_lpf_shrink;
-}
-
-static void btc8821a2ant_SetSwPenTxRateAdapt(struct btc_coexist *btcoexist,
- bool low_penalty_ra)
+static void btc8821a2ant_set_sw_penalty_tx_rate_adaptive(
+ struct btc_coexist *btcoexist, bool low_penalty_ra)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[6] = {0};
if (low_penalty_ra) {
h2c_parameter[1] |= BIT0;
- /*normal rate except MCS7/6/5, OFDM54/48/36 */
+ /* normal rate except MCS7/6/5, OFDM54/48/36 */
h2c_parameter[2] = 0x00;
- /*MCS7 or OFDM54 */
+ /* MCS7 or OFDM54 */
h2c_parameter[3] = 0xf7;
- /*MCS6 or OFDM48 */
+ /* MCS6 or OFDM48 */
h2c_parameter[4] = 0xf8;
- /*MCS5 or OFDM36 */
+ /* MCS5 or OFDM36 */
h2c_parameter[5] = 0xf9;
}
btcoexist->btc_fill_h2c(btcoexist, 0x69, 6, h2c_parameter);
}
-static void halbtc8821a2ant_low_penalty_ra(struct btc_coexist *btcoexist,
- bool force_exec, bool low_penalty_ra)
+static void btc8821a2ant_low_penalty_ra(struct btc_coexist *btcoexist,
+ bool force_exec, bool low_penalty_ra)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- /*return;*/
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], %s turn LowPenaltyRA = %s\n",
(force_exec ? "force to" : ""),
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], pre_low_penalty_ra = %d, cur_low_penalty_ra = %d\n",
coex_dm->pre_low_penalty_ra,
- coex_dm->cur_low_penalty_ra);
+ coex_dm->cur_low_penalty_ra);
if (coex_dm->pre_low_penalty_ra == coex_dm->cur_low_penalty_ra)
return;
}
- btc8821a2ant_SetSwPenTxRateAdapt(btcoexist,
+ btc8821a2ant_set_sw_penalty_tx_rate_adaptive(btcoexist,
coex_dm->cur_low_penalty_ra);
coex_dm->pre_low_penalty_ra = coex_dm->cur_low_penalty_ra;
}
-static void halbtc8821a2ant_set_dac_swing_reg(struct btc_coexist *btcoexist,
- u32 level)
+static void btc8821a2ant_set_dac_swing_reg(struct btc_coexist *btcoexist,
+ u32 level)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 val = (u8)level;
u32 sw_dac_swing_lvl)
{
if (sw_dac_swing_on)
- halbtc8821a2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
+ btc8821a2ant_set_dac_swing_reg(btcoexist, sw_dac_swing_lvl);
else
- halbtc8821a2ant_set_dac_swing_reg(btcoexist, 0x18);
+ btc8821a2ant_set_dac_swing_reg(btcoexist, 0x18);
}
-static void halbtc8821a2ant_dac_swing(struct btc_coexist *btcoexist,
- bool force_exec, bool dac_swing_on,
- u32 dac_swing_lvl)
+static void btc8821a2ant_dac_swing(struct btc_coexist *btcoexist,
+ bool force_exec, bool dac_swing_on,
+ u32 dac_swing_lvl)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
coex_dm->pre_dac_swing_lvl = coex_dm->cur_dac_swing_lvl;
}
-static void halbtc8821a2ant_set_adc_back_off(struct btc_coexist *btcoexist,
- bool adc_back_off)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- if (adc_back_off) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BB BackOff Level On!\n");
- btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x3);
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], BB BackOff Level Off!\n");
- btcoexist->btc_write_1byte_bitmask(btcoexist, 0x8db, 0x60, 0x1);
- }
-}
-
-static void halbtc8821a2ant_adc_back_off(struct btc_coexist *btcoexist,
- bool force_exec, bool adc_back_off)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], %s turn AdcBackOff = %s\n",
- (force_exec ? "force to" : ""),
- ((adc_back_off) ? "ON" : "OFF"));
- coex_dm->cur_adc_back_off = adc_back_off;
-
- if (!force_exec) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], pre_adc_back_off = %d, cur_adc_back_off = %d\n",
- coex_dm->pre_adc_back_off,
- coex_dm->cur_adc_back_off);
-
- if (coex_dm->pre_adc_back_off == coex_dm->cur_adc_back_off)
- return;
- }
- halbtc8821a2ant_set_adc_back_off(btcoexist, coex_dm->cur_adc_back_off);
-
- coex_dm->pre_adc_back_off = coex_dm->cur_adc_back_off;
-}
-
-static void halbtc8821a2ant_set_coex_table(struct btc_coexist *btcoexist,
- u32 val0x6c0, u32 val0x6c4,
- u32 val0x6c8, u8 val0x6cc)
+static void btc8821a2ant_set_coex_table(struct btc_coexist *btcoexist,
+ u32 val0x6c0, u32 val0x6c4,
+ u32 val0x6c8, u8 val0x6cc)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
btcoexist->btc_write_1byte(btcoexist, 0x6cc, val0x6cc);
}
-static void halbtc8821a2ant_coex_table(struct btc_coexist *btcoexist,
- bool force_exec, u32 val0x6c0,
- u32 val0x6c4, u32 val0x6c8, u8 val0x6cc)
+static void btc8821a2ant_coex_table(struct btc_coexist *btcoexist,
+ bool force_exec, u32 val0x6c0,
+ u32 val0x6c4, u32 val0x6c8, u8 val0x6cc)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
(coex_dm->pre_val0x6cc == coex_dm->cur_val0x6cc))
return;
}
- halbtc8821a2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
- val0x6cc);
+ btc8821a2ant_set_coex_table(btcoexist, val0x6c0, val0x6c4, val0x6c8,
+ val0x6cc);
coex_dm->pre_val0x6c0 = coex_dm->cur_val0x6c0;
coex_dm->pre_val0x6c4 = coex_dm->cur_val0x6c4;
coex_dm->pre_val0x6cc = coex_dm->cur_val0x6cc;
}
-static void halbtc8821a2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoex,
- bool enable)
+static void btc8821a2ant_set_fw_ignore_wlan_act(struct btc_coexist *btcoex,
+ bool enable)
{
struct rtl_priv *rtlpriv = btcoex->adapter;
u8 h2c_parameter[1] = {0};
if (enable)
- h2c_parameter[0] |= BIT0;/* function enable */
+ h2c_parameter[0] |= BIT0; /* function enable */
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], set FW for BT Ignore Wlan_Act, FW write 0x63 = 0x%x\n",
btcoex->btc_fill_h2c(btcoex, 0x63, 1, h2c_parameter);
}
-static void halbtc8821a2ant_ignore_wlan_act(struct btc_coexist *btcoexist,
- bool force_exec, bool enable)
+static void btc8821a2ant_ignore_wlan_act(struct btc_coexist *btcoexist,
+ bool force_exec, bool enable)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
coex_dm->cur_ignore_wlan_act)
return;
}
- halbtc8821a2ant_set_fw_ignore_wlan_act(btcoexist, enable);
+ btc8821a2ant_set_fw_ignore_wlan_act(btcoexist, enable);
coex_dm->pre_ignore_wlan_act = coex_dm->cur_ignore_wlan_act;
}
-static void halbtc8821a2ant_set_fw_pstdma(struct btc_coexist *btcoexist,
- u8 byte1, u8 byte2, u8 byte3,
- u8 byte4, u8 byte5)
+static void btc8821a2ant_set_fw_ps_tdma(struct btc_coexist *btcoexist,
+ u8 byte1, u8 byte2, u8 byte3,
+ u8 byte4, u8 byte5)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 h2c_parameter[5];
btcoexist->btc_fill_h2c(btcoexist, 0x60, 5, h2c_parameter);
}
-static void btc8821a2ant_sw_mech1(struct btc_coexist *btcoexist,
- bool shrink_rx_lpf,
- bool low_penalty_ra, bool limited_dig,
- bool bt_lna_constrain)
+static void btc8821a2ant_sw_mechanism1(struct btc_coexist *btcoexist,
+ bool shrink_rx_lpf, bool low_penalty_ra,
+ bool limited_dig, bool bt_lna_constrain)
{
u32 wifi_bw;
shrink_rx_lpf = false;
}
- halbtc8821a2ant_RfShrink(btcoexist, NORMAL_EXEC, shrink_rx_lpf);
- halbtc8821a2ant_low_penalty_ra(btcoexist,
- NORMAL_EXEC, low_penalty_ra);
-
- /* no limited DIG
- * btc8821a2_set_bt_lna_const(btcoexist,
- NORMAL_EXEC, bBTLNAConstrain);
- */
+ btc8821a2ant_low_penalty_ra(btcoexist, NORMAL_EXEC, low_penalty_ra);
}
-static void btc8821a2ant_sw_mech2(struct btc_coexist *btcoexist,
- bool agc_table_shift,
- bool adc_back_off, bool sw_dac_swing,
- u32 dac_swing_lvl)
+static void btc8821a2ant_sw_mechanism2(struct btc_coexist *btcoexist,
+ bool agc_table_shift, bool adc_back_off,
+ bool sw_dac_swing, u32 dac_swing_lvl)
{
- /* halbtc8821a2ant_AgcTable(btcoexist, NORMAL_EXEC, bAGCTableShift); */
- halbtc8821a2ant_adc_back_off(btcoexist, NORMAL_EXEC, adc_back_off);
- halbtc8821a2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
- sw_dac_swing);
+ btc8821a2ant_dac_swing(btcoexist, NORMAL_EXEC, sw_dac_swing,
+ sw_dac_swing);
}
-static void halbtc8821a2ant_set_ant_path(struct btc_coexist *btcoexist,
- u8 ant_pos_type, bool init_hw_cfg,
- bool wifi_off)
+static void btc8821a2ant_set_ant_path(struct btc_coexist *btcoexist,
+ u8 ant_pos_type, bool init_hw_cfg,
+ bool wifi_off)
{
struct btc_board_info *board_info = &btcoexist->board_info;
u32 u4tmp = 0;
btcoexist->btc_write_1byte(btcoexist, 0xcb4, 0x77);
if (board_info->btdm_ant_pos == BTC_ANTENNA_AT_MAIN_PORT) {
- /* tell firmware "antenna inverse" ==>
- * WRONG firmware antenna control code.
- * ==>need fw to fix
+ /* tell firmware "antenna inverse" ==> WRONG firmware
+ * antenna control code ==>need fw to fix
*/
h2c_parameter[0] = 1;
h2c_parameter[1] = 1;
btcoexist->btc_fill_h2c(btcoexist, 0x65, 2,
h2c_parameter);
} else {
- /* tell firmware "no antenna inverse"
- * ==> WRONG firmware antenna control code.
- * ==>need fw to fix
+ /* tell firmware "no antenna inverse" ==> WRONG firmware
+ * antenna control code ==>need fw to fix
*/
h2c_parameter[0] = 0;
h2c_parameter[1] = 1;
}
}
-static void halbtc8821a2ant_ps_tdma(struct btc_coexist *btcoexist,
- bool force_exec, bool turn_on, u8 type)
+static void btc8821a2ant_ps_tdma(struct btc_coexist *btcoexist,
+ bool force_exec, bool turn_on, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
switch (type) {
case 1:
default:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0xe1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
+ 0x1a, 0xe1, 0x90);
break;
case 2:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12,
- 0x12, 0xe1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
+ 0x12, 0xe1, 0x90);
break;
case 3:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1c,
- 0x3, 0xf1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
+ 0x3, 0xf1, 0x90);
break;
case 4:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x10,
- 0x03, 0xf1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x10,
+ 0x03, 0xf1, 0x90);
break;
case 5:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0x60, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
+ 0x1a, 0x60, 0x90);
break;
case 6:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12,
- 0x12, 0x60, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
+ 0x12, 0x60, 0x90);
break;
case 7:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1c,
- 0x3, 0x70, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1c,
+ 0x3, 0x70, 0x90);
break;
case 8:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xa3, 0x10,
- 0x3, 0x70, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x10,
+ 0x3, 0x70, 0x90);
break;
case 9:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0xe1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
+ 0x1a, 0xe1, 0x90);
break;
case 10:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x12,
- 0x12, 0xe1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x12,
+ 0x12, 0xe1, 0x90);
break;
case 11:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0xa,
- 0xa, 0xe1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0xa,
+ 0xa, 0xe1, 0x90);
break;
case 12:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5,
- 0x5, 0xe1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
+ 0x5, 0xe1, 0x90);
break;
case 13:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0x60, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
+ 0x1a, 0x60, 0x90);
break;
case 14:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3,
- 0x12, 0x12, 0x60, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3,
+ 0x12, 0x12, 0x60, 0x90);
break;
case 15:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0xa,
- 0xa, 0x60, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0xa,
+ 0xa, 0x60, 0x90);
break;
case 16:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5,
- 0x5, 0x60, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
+ 0x5, 0x60, 0x90);
break;
case 17:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xa3, 0x2f,
- 0x2f, 0x60, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xa3, 0x2f,
+ 0x2f, 0x60, 0x90);
break;
case 18:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x5,
- 0x5, 0xe1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x5,
+ 0x5, 0xe1, 0x90);
break;
case 19:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25,
- 0x25, 0xe1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
+ 0x25, 0xe1, 0x90);
break;
case 20:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x25,
- 0x25, 0x60, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x25,
+ 0x25, 0x60, 0x90);
break;
case 21:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x15,
- 0x03, 0x70, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x15,
+ 0x03, 0x70, 0x90);
break;
case 71:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0xe3, 0x1a,
- 0x1a, 0xe1, 0x90);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0xe3, 0x1a,
+ 0x1a, 0xe1, 0x90);
break;
}
} else {
/* disable PS tdma */
switch (type) {
case 0:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0,
- 0x40, 0x0);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
+ 0x40, 0x0);
break;
case 1:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0,
- 0x48, 0x0);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
+ 0x48, 0x0);
break;
default:
- halbtc8821a2ant_set_fw_pstdma(btcoexist, 0x0, 0x0, 0x0,
- 0x40, 0x0);
+ btc8821a2ant_set_fw_ps_tdma(btcoexist, 0x0, 0x0, 0x0,
+ 0x40, 0x0);
break;
}
}
coex_dm->pre_ps_tdma = coex_dm->cur_ps_tdma;
}
-static void halbtc8821a2ant_coex_all_off(struct btc_coexist *btcoexist)
+static void btc8821a2ant_coex_all_off(struct btc_coexist *btcoexist)
{
/* fw all off */
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
/* sw all off */
- btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false, false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
/* hw all off */
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC,
- 0x55555555, 0x55555555, 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC,
+ 0x55555555, 0x55555555, 0xffff, 0x3);
}
-static void halbtc8821a2ant_coex_under_5g(struct btc_coexist *btcoexist)
+static void btc8821a2ant_coex_under_5g(struct btc_coexist *btcoexist)
{
- halbtc8821a2ant_coex_all_off(btcoexist);
+ btc8821a2ant_coex_all_off(btcoexist);
}
-static void halbtc8821a2ant_init_coex_dm(struct btc_coexist *btcoexist)
+static void btc8821a2ant_init_coex_dm(struct btc_coexist *btcoexist)
{
/* force to reset coex mechanism */
- halbtc8821a2ant_coex_table(btcoexist, FORCE_EXEC, 0x55555555,
- 0x55555555, 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, FORCE_EXEC, 0x55555555,
+ 0x55555555, 0xffff, 0x3);
- halbtc8821a2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
- halbtc8821a2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, false);
+ btc8821a2ant_ps_tdma(btcoexist, FORCE_EXEC, false, 1);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, FORCE_EXEC, 6);
+ btc8821a2ant_dec_bt_pwr(btcoexist, FORCE_EXEC, false);
- btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false, false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false, false, 0x18);
}
-static void halbtc8821a2ant_bt_inquiry_page(struct btc_coexist *btcoexist)
+static void btc8821a2ant_bt_inquiry_page(struct btc_coexist *btcoexist)
{
bool low_pwr_disable = true;
btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
&low_pwr_disable);
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5afa5afa, 0xffff, 0x3);
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5afa5afa, 0xffff, 0x3);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 3);
}
-static bool halbtc8821a2ant_is_common_action(struct btc_coexist *btcoexist)
+static bool btc8821a2ant_is_common_action(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
bool common = false, wifi_connected = false, wifi_busy = false;
&wifi_connected);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_BUSY, &wifi_busy);
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5afa5afa, 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5afa5afa, 0xffff, 0x3);
if (!wifi_connected &&
BT_8821A_2ANT_BT_STATUS_IDLE == coex_dm->bt_status) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi IPS + BT IPS!!\n");
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
- btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false, false,
+ false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false, false,
+ 0x18);
common = true;
} else if (wifi_connected &&
if (wifi_busy) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi Busy + BT IPS!!\n");
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 1);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ false, 1);
} else {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi LPS + BT IPS!!\n");
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 1);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ false, 1);
}
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
- btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false, false,
+ false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false, false,
+ 0x18);
common = true;
} else if (!wifi_connected &&
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi IPS + BT LPS!!\n");
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
- btc8821a2ant_sw_mech1(btcoexist, false, false, false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false, false,
+ false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false, false,
+ 0x18);
common = true;
} else if (wifi_connected &&
(BT_8821A_2ANT_BT_STATUS_CON_IDLE == coex_dm->bt_status)) {
if (wifi_busy) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi Busy + BT LPS!!\n");
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 1);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ false, 1);
} else {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi LPS + BT LPS!!\n");
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 1);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ false, 1);
}
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
- btc8821a2ant_sw_mech1(btcoexist, true, true, true, true);
- btc8821a2ant_sw_mech2(btcoexist, false, false, false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true, true, true);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false, false,
+ 0x18);
common = true;
} else if (!wifi_connected &&
- (BT_8821A_2ANT_BT_STATUS_NON_IDLE ==
- coex_dm->bt_status)) {
+ (coex_dm->bt_status == BT_8821A_2ANT_BT_STATUS_NON_IDLE)) {
low_pwr_disable = false;
- btcoexist->btc_set(btcoexist,
- BTC_SET_ACT_DISABLE_LOW_POWER, &low_pwr_disable);
+ btcoexist->btc_set(btcoexist, BTC_SET_ACT_DISABLE_LOW_POWER,
+ &low_pwr_disable);
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi IPS + BT Busy!!\n");
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
common = true;
} else {
} else {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Wifi LPS + BT Busy!!\n");
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC, true, 21);
-
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist,
- NORMAL_EXEC, true);
- else
- halbtc8821a2ant_dec_bt_pwr(btcoexist,
- NORMAL_EXEC, false);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC, true, 21);
common = true;
}
- btc8821a2ant_sw_mech1(btcoexist, true, true, true, true);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true, true, true);
}
return common;
}
-static void btc8821a2_int1(struct btc_coexist *btcoexist, bool tx_pause,
- int result)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- if (tx_pause) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 1\n");
-
- if (coex_dm->cur_ps_tdma == 71) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- coex_dm->tdma_adj_type = 5;
- } else if (coex_dm->cur_ps_tdma == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- coex_dm->tdma_adj_type = 5;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 4) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- }
- if (coex_dm->cur_ps_tdma == 9) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 13);
- coex_dm->tdma_adj_type = 13;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
-
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- } else if (coex_dm->cur_ps_tdma == 13) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 8) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
- coex_dm->tdma_adj_type = 5;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 13);
- coex_dm->tdma_adj_type = 13;
- }
- }
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 0\n");
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 71);
- coex_dm->tdma_adj_type = 71;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 8) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- }
- if (coex_dm->cur_ps_tdma == 13) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
-
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 71) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
- coex_dm->tdma_adj_type = 1;
- } else if (coex_dm->cur_ps_tdma == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 4) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
- coex_dm->tdma_adj_type = 1;
- } else if (coex_dm->cur_ps_tdma == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 71);
- coex_dm->tdma_adj_type = 71;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
- coex_dm->tdma_adj_type = 9;
- }
- }
- }
-}
-
-static void btc8821a2_int2(struct btc_coexist *btcoexist, bool tx_pause,
- int result)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- if (tx_pause) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 1\n");
- if (coex_dm->cur_ps_tdma == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 4) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- }
- if (coex_dm->cur_ps_tdma == 9) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- } else if (coex_dm->cur_ps_tdma == 13) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 8) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 6);
- coex_dm->tdma_adj_type = 6;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
- coex_dm->tdma_adj_type = 14;
- }
- }
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 0\n");
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 8) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- }
- if (coex_dm->cur_ps_tdma == 13) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 4) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 2);
- coex_dm->tdma_adj_type = 2;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
- coex_dm->tdma_adj_type = 10;
- }
- }
- }
-}
-
-static void btc8821a2_int3(struct btc_coexist *btcoexist, bool tx_pause,
- int result)
-{
- struct rtl_priv *rtlpriv = btcoexist->adapter;
-
- if (tx_pause) {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 1\n");
- if (coex_dm->cur_ps_tdma == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 4) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- }
- if (coex_dm->cur_ps_tdma == 9) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 8);
- coex_dm->tdma_adj_type = 8;
- } else if (coex_dm->cur_ps_tdma == 13) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 16);
- coex_dm->tdma_adj_type = 16;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 8) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 7);
- coex_dm->tdma_adj_type = 7;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 15);
- coex_dm->tdma_adj_type = 15;
- }
- }
- } else {
- RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
- "[BTCoex], TxPause = 0\n");
- if (coex_dm->cur_ps_tdma == 5) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 6) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 7) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 8) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- }
- if (coex_dm->cur_ps_tdma == 13) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 14) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 15) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 16) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- if (result == -1) {
- if (coex_dm->cur_ps_tdma == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 4);
- coex_dm->tdma_adj_type = 4;
- } else if (coex_dm->cur_ps_tdma == 9) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 12);
- coex_dm->tdma_adj_type = 12;
- }
- } else if (result == 1) {
- if (coex_dm->cur_ps_tdma == 4) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 3) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 3);
- coex_dm->tdma_adj_type = 3;
- } else if (coex_dm->cur_ps_tdma == 12) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 11) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- } else if (coex_dm->cur_ps_tdma == 10) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 11);
- coex_dm->tdma_adj_type = 11;
- }
- }
- }
-}
-
static void btc8821a2ant_tdma_dur_adj(struct btc_coexist *btcoexist,
bool sco_hid, bool tx_pause,
u8 max_interval)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- static long up, dn, m, n, wait_count;
- /* 0: no change, +1: increase WiFi duration,
+ static long up, dn, m, n, wait_count;
+ /* 0 : no change
+ * +1: increase WiFi duration
* -1: decrease WiFi duration
*/
- int result;
- u8 retry_count = 0;
+ int result;
+ u8 retry_count = 0;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], TdmaDurationAdjust()\n");
if (sco_hid) {
if (tx_pause) {
if (max_interval == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 13);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 13);
coex_dm->tdma_adj_type = 13;
} else if (max_interval == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 14);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 14);
coex_dm->tdma_adj_type = 14;
} else {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 15);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 15);
coex_dm->tdma_adj_type = 15;
}
} else {
if (max_interval == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 9);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 9);
coex_dm->tdma_adj_type = 9;
} else if (max_interval == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 10);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 10);
coex_dm->tdma_adj_type = 10;
} else {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 11);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 11);
coex_dm->tdma_adj_type = 11;
}
}
} else {
if (tx_pause) {
if (max_interval == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 5);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 5);
coex_dm->tdma_adj_type = 5;
} else if (max_interval == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 6);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 6);
coex_dm->tdma_adj_type = 6;
} else {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 7);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 7);
coex_dm->tdma_adj_type = 7;
}
} else {
if (max_interval == 1) {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 1);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 1);
coex_dm->tdma_adj_type = 1;
} else if (max_interval == 2) {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 2);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 2);
coex_dm->tdma_adj_type = 2;
} else {
- halbtc8821a2ant_ps_tdma(btcoexist,
- NORMAL_EXEC,
- true, 3);
+ btc8821a2ant_ps_tdma(btcoexist,
+ NORMAL_EXEC,
+ true, 3);
coex_dm->tdma_adj_type = 3;
}
}
up = 0;
if (dn == 2) {
- /* if retry count< 3 for 2*2 seconds,
+ /* if retry count < 3 for 2*2 seconds,
* shrink wifi duration
*/
if (wait_count <= 2)
if (m >= 20)
m = 20;
- n = 3*m;
+ n = 3 * m;
up = 0;
dn = 0;
wait_count = 0;
if (m >= 20)
m = 20;
- n = 3*m;
+ n = 3 * m;
up = 0;
dn = 0;
wait_count = 0;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], max Interval = %d\n", max_interval);
- if (max_interval == 1)
- btc8821a2_int1(btcoexist, tx_pause, result);
- else if (max_interval == 2)
- btc8821a2_int2(btcoexist, tx_pause, result);
- else if (max_interval == 3)
- btc8821a2_int3(btcoexist, tx_pause, result);
}
/* if current PsTdma not match with the recorded one
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], PsTdma type dismatch!!!, cur_ps_tdma = %d, recordPsTdma = %d\n",
- coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type);
+ coex_dm->cur_ps_tdma, coex_dm->tdma_adj_type);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_SCAN, &scan);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_LINK, &link);
btcoexist->btc_get(btcoexist, BTC_GET_BL_WIFI_ROAM, &roam);
if (!scan && !link && !roam) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
- coex_dm->tdma_adj_type);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true,
+ coex_dm->tdma_adj_type);
} else {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], roaming/link/scan is under progress, will adjust next time!!!\n");
}
}
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 0x6);
}
/* SCO only or SCO+PAN(HS)*/
-static void halbtc8821a2ant_action_sco(struct btc_coexist *btcoexist)
+static void btc8821a2ant_action_sco(struct btc_coexist *btcoexist)
{
- u8 wifi_rssi_state, bt_rssi_state;
+ u8 wifi_rssi_state, bt_rssi_state;
u32 wifi_bw;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
- 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
+ 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 4);
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- if (BTC_WIFI_BW_LEGACY == wifi_bw) {
+ if (wifi_bw == BTC_WIFI_BW_LEGACY) {
/* for SCO quality at 11b/g mode */
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC,
- 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC,
+ 0x5a5a5a5a, 0x5a5a5a5a, 0xffff, 0x3);
} else {
/* for SCO quality & wifi performance balance at 11n mode */
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC,
- 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC,
+ 0x5aea5aea, 0x5aea5aea, 0xffff, 0x3);
}
- if (BTC_WIFI_BW_HT40 == wifi_bw) {
- /* fw mechanism
- * halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
- */
+ if (wifi_bw == BTC_WIFI_BW_HT40) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 0); /*for voice quality*/
+ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ /* for voice quality */
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ false, 0);
+ } else {
+ /* for voice quality */
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ false, 0);
+ }
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- /* fw mechanism
- * halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 5);
- */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 0); /*for voice quality*/
+ /* for voice quality */
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
} else {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- false, 0); /*for voice quality*/
+ /* for voice quality */
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 0);
}
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8821a2ant_action_hid(struct btc_coexist *btcoexist)
+static void btc8821a2ant_action_hid(struct btc_coexist *btcoexist)
{
- u8 wifi_rssi_state, bt_rssi_state;
- u32 wifi_bw;
+ u8 wifi_rssi_state, bt_rssi_state;
+ u32 wifi_bw;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist,
- 0, 2, 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- if (BTC_WIFI_BW_LEGACY == wifi_bw) {
+ if (wifi_bw == BTC_WIFI_BW_LEGACY) {
/* for HID at 11b/g mode */
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5a5a5a5a, 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5a5a5a5a, 0xffff, 0x3);
} else {
/* for HID quality & wifi performance balance at 11n mode */
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5aea5aea, 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5aea5aea, 0xffff, 0x3);
}
- if (BTC_WIFI_BW_HT40 == wifi_bw) {
+ if (wifi_bw == BTC_WIFI_BW_HT40) {
/* fw mechanism */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 9);
} else {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 13);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 13);
}
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
/* fw mechanism */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 9);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 9);
} else {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 13);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 13);
}
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
/* A2DP only / PAN(EDR) only/ A2DP+PAN(HS) */
-static void halbtc8821a2ant_action_a2dp(struct btc_coexist *btcoexist)
+static void btc8821a2ant_action_a2dp(struct btc_coexist *btcoexist)
{
- u8 wifi_rssi_state, bt_rssi_state;
- u32 wifi_bw;
+ u8 wifi_rssi_state, bt_rssi_state;
+ u32 wifi_bw;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
- 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
+ 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
/* fw dac swing is called in btc8821a2ant_tdma_dur_adj()
- * halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ * btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
*/
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
/* fw mechanism */
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8821a2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
+static void btc8821a2ant_action_a2dp_pan_hs(struct btc_coexist *btcoexist)
{
- u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
- u32 wifi_bw;
+ u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
+ u32 wifi_bw;
bt_info_ext = coex_sta->bt_info_ext;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
- 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
-
- /*fw dac swing is called in btc8821a2ant_tdma_dur_adj()
- *halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- */
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- if (BTC_WIFI_BW_HT40 == wifi_bw) {
+ if (wifi_bw == BTC_WIFI_BW_HT40) {
/* fw mechanism */
if (bt_info_ext&BIT0) {
- /*a2dp basic rate*/
+ /* a2dp basic rate */
btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 2);
} else {
- /*a2dp edr rate*/
+ /* a2dp edr rate */
btc8821a2ant_tdma_dur_adj(btcoexist, false, true, 1);
}
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
/* fw mechanism */
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8821a2ant_action_pan_edr(struct btc_coexist *btcoexist)
+static void btc8821a2ant_action_pan_edr(struct btc_coexist *btcoexist)
{
- u8 wifi_rssi_state, bt_rssi_state;
- u32 wifi_bw;
+ u8 wifi_rssi_state, bt_rssi_state;
+ u32 wifi_bw;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
- 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
if (BTC_WIFI_BW_LEGACY == wifi_bw) {
/* for HID at 11b/g mode */
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5aff5aff, 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5aff5aff, 0xffff, 0x3);
} else {
/* for HID quality & wifi performance balance at 11n mode */
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5aff5aff, 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5aff5aff, 0xffff, 0x3);
}
if (BTC_WIFI_BW_HT40 == wifi_bw) {
/* fw mechanism */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 1);
} else {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 5);
}
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
/* fw mechanism */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 1);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 1);
} else {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 5);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 5);
}
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
/* PAN(HS) only */
-static void halbtc8821a2ant_action_pan_hs(struct btc_coexist *btcoexist)
+static void btc8821a2ant_action_pan_hs(struct btc_coexist *btcoexist)
{
- u8 wifi_rssi_state, bt_rssi_state;
- u32 wifi_bw;
+ u8 wifi_rssi_state, bt_rssi_state;
+ u32 wifi_bw;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist,
- 0, 2, 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
/* fw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
- true);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
} else {
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC,
- false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
}
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
/* fw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a2ant_dec_bt_pwr(btcoexist,
- NORMAL_EXEC, true);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
} else {
- halbtc8821a2ant_dec_bt_pwr(btcoexist,
- NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
}
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
+ (bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ } else {
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, false, 1);
+ }
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
/* PAN(EDR)+A2DP */
-static void halbtc8821a2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
+static void btc8821a2ant_action_pan_edr_a2dp(struct btc_coexist *btcoexist)
{
u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
u32 wifi_bw;
bt_info_ext = coex_sta->bt_info_ext;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
- 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5afa5afa, 0xffff, 0x3);
+ if (wifi_bw == BTC_WIFI_BW_LEGACY) {
+ /* for HID at 11b/g mode */
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5afa5afa, 0xffff, 0x3);
+ } else {
+ /* for HID quality & wifi performance balance at 11n mode */
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5afa5afa, 0xffff, 0x3);
+ }
if (BTC_WIFI_BW_HT40 == wifi_bw) {
/* fw mechanism */
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
- }
+ btc8821a2ant_sw_mechanism1(btcoexist, true, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
+ };
} else {
/* fw mechanism */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, false,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, false,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8821a2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
+static void btc8821a2ant_action_pan_edr_hid(struct btc_coexist *btcoexist)
{
- u8 wifi_rssi_state, bt_rssi_state;
- u32 wifi_bw;
+ u8 wifi_rssi_state, bt_rssi_state;
+ u32 wifi_bw;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
- 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5a5f5a5f, 0xffff, 0x3);
+ if (wifi_bw == BTC_WIFI_BW_LEGACY) {
+ /* for HID at 11b/g mode */
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5a5f5a5f, 0xffff, 0x3);
+ } else {
+ /* for HID quality & wifi performance balance at 11n mode */
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5a5f5a5f, 0xffff, 0x3);
+ }
- if (BTC_WIFI_BW_HT40 == wifi_bw) {
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 3);
+ if (wifi_bw == BTC_WIFI_BW_HT40) {
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 3);
/* fw mechanism */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
+ true, 10);
} else {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
}
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
/* fw mechanism */
if ((bt_rssi_state == BTC_RSSI_STATE_HIGH) ||
(bt_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 10);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 10);
} else {
- halbtc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC,
- true, 14);
+ btc8821a2ant_ps_tdma(btcoexist, NORMAL_EXEC, true, 14);
}
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
/* HID+A2DP+PAN(EDR) */
static void btc8821a2ant_act_hid_a2dp_pan_edr(struct btc_coexist *btcoexist)
{
- u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
- u32 wifi_bw;
+ u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
+ u32 wifi_bw;
bt_info_ext = coex_sta->bt_info_ext;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist,
- 0, 2, 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
- halbtc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
+ btc8821a2ant_fw_dac_swing_lvl(btcoexist, NORMAL_EXEC, 6);
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5a5a5a5a, 0xffff, 0x3);
+ if (wifi_bw == BTC_WIFI_BW_LEGACY) {
+ /* for HID at 11b/g mode */
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5a5a5a5a, 0xffff, 0x3);
+ } else {
+ /* for HID quality & wifi performance balance at 11n mode */
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5a5a5a5a, 0xffff, 0x3);
+ }
if (BTC_WIFI_BW_HT40 == wifi_bw) {
/* fw mechanism */
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
/* fw mechanism */
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8821a2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
+static void btc8821a2ant_action_hid_a2dp(struct btc_coexist *btcoexist)
{
- u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
- u32 wifi_bw;
+ u8 wifi_rssi_state, bt_rssi_state, bt_info_ext;
+ u32 wifi_bw;
bt_info_ext = coex_sta->bt_info_ext;
- wifi_rssi_state = halbtc8821a2ant_wifi_rssi_state(btcoexist, 0, 2,
- 15, 0);
- bt_rssi_state = halbtc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
+ wifi_rssi_state = btc8821a2ant_wifi_rssi_state(btcoexist, 0, 2, 15, 0);
+ bt_rssi_state = btc8821a2ant_bt_rssi_state(btcoexist, 2, 35, 0);
- if (halbtc8821a2ant_need_to_dec_bt_pwr(btcoexist))
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
+ if (BTC_RSSI_HIGH(bt_rssi_state))
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, true);
else
- halbtc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
+ btc8821a2ant_dec_bt_pwr(btcoexist, NORMAL_EXEC, false);
btcoexist->btc_get(btcoexist, BTC_GET_U4_WIFI_BW, &wifi_bw);
- halbtc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
- 0x5f5b5f5b, 0xffffff, 0x3);
+ if (wifi_bw == BTC_WIFI_BW_LEGACY) {
+ /* for HID at 11b/g mode */
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5f5b5f5b, 0xffffff, 0x3);
+ } else {
+ /* for HID quality & wifi performance balance at 11n mode */
+ btc8821a2ant_coex_table(btcoexist, NORMAL_EXEC, 0x55ff55ff,
+ 0x5f5b5f5b, 0xffffff, 0x3);
+ }
if (BTC_WIFI_BW_HT40 == wifi_bw) {
/* fw mechanism */
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, true, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, true, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
} else {
/* fw mechanism */
/* sw mechanism */
if ((wifi_rssi_state == BTC_RSSI_STATE_HIGH) ||
(wifi_rssi_state == BTC_RSSI_STATE_STAY_HIGH)) {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, true, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, true, false,
+ false, 0x18);
} else {
- btc8821a2ant_sw_mech1(btcoexist, false, true,
- false, false);
- btc8821a2ant_sw_mech2(btcoexist, false, false,
- false, 0x18);
+ btc8821a2ant_sw_mechanism1(btcoexist, false, true,
+ false, false);
+ btc8821a2ant_sw_mechanism2(btcoexist, false, false,
+ false, 0x18);
}
}
}
-static void halbtc8821a2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
+static void btc8821a2ant_run_coexist_mechanism(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- bool wifi_under_5g = false;
- u8 algorithm = 0;
+ bool wifi_under_5g = false;
+ u8 algorithm = 0;
if (btcoexist->manual_control) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
if (wifi_under_5g) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], RunCoexistMechanism(), run 5G coex setting!!<===\n");
- halbtc8821a2ant_coex_under_5g(btcoexist);
+ btc8821a2ant_coex_under_5g(btcoexist);
return;
}
- algorithm = halbtc8821a2ant_action_algorithm(btcoexist);
+ algorithm = btc8821a2ant_action_algorithm(btcoexist);
if (coex_sta->c2h_bt_inquiry_page &&
(BT_8821A_2ANT_COEX_ALGO_PANHS != algorithm)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], BT is under inquiry/page scan !!\n");
- halbtc8821a2ant_bt_inquiry_page(btcoexist);
+ btc8821a2ant_bt_inquiry_page(btcoexist);
return;
}
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Algorithm = %d\n", coex_dm->cur_algorithm);
- if (halbtc8821a2ant_is_common_action(btcoexist)) {
+ if (btc8821a2ant_is_common_action(btcoexist)) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant common\n");
coex_dm->reset_tdma_adjust = true;
case BT_8821A_2ANT_COEX_ALGO_SCO:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = SCO\n");
- halbtc8821a2ant_action_sco(btcoexist);
+ btc8821a2ant_action_sco(btcoexist);
break;
case BT_8821A_2ANT_COEX_ALGO_HID:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = HID\n");
- halbtc8821a2ant_action_hid(btcoexist);
+ btc8821a2ant_action_hid(btcoexist);
break;
case BT_8821A_2ANT_COEX_ALGO_A2DP:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = A2DP\n");
- halbtc8821a2ant_action_a2dp(btcoexist);
+ btc8821a2ant_action_a2dp(btcoexist);
break;
case BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = A2DP+PAN(HS)\n");
- halbtc8821a2ant_action_a2dp_pan_hs(btcoexist);
+ btc8821a2ant_action_a2dp_pan_hs(btcoexist);
break;
case BT_8821A_2ANT_COEX_ALGO_PANEDR:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = PAN(EDR)\n");
- halbtc8821a2ant_action_pan_edr(btcoexist);
+ btc8821a2ant_action_pan_edr(btcoexist);
break;
case BT_8821A_2ANT_COEX_ALGO_PANHS:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = HS mode\n");
- halbtc8821a2ant_action_pan_hs(btcoexist);
+ btc8821a2ant_action_pan_hs(btcoexist);
break;
case BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = PAN+A2DP\n");
- halbtc8821a2ant_action_pan_edr_a2dp(btcoexist);
+ btc8821a2ant_action_pan_edr_a2dp(btcoexist);
break;
case BT_8821A_2ANT_COEX_ALGO_PANEDR_HID:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = PAN(EDR)+HID\n");
- halbtc8821a2ant_action_pan_edr_hid(btcoexist);
+ btc8821a2ant_action_pan_edr_hid(btcoexist);
break;
case BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
case BT_8821A_2ANT_COEX_ALGO_HID_A2DP:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = HID+A2DP\n");
- halbtc8821a2ant_action_hid_a2dp(btcoexist);
+ btc8821a2ant_action_hid_a2dp(btcoexist);
break;
default:
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Action 2-Ant, algorithm = coexist All Off!!\n");
- halbtc8821a2ant_coex_all_off(btcoexist);
+ btc8821a2ant_coex_all_off(btcoexist);
break;
}
coex_dm->pre_algorithm = coex_dm->cur_algorithm;
}
}
-/*============================================================
- *work around function start with wa_halbtc8821a2ant_
- *============================================================
- *============================================================
- * extern function start with EXhalbtc8821a2ant_
- *============================================================
- */
-void ex_halbtc8821a2ant_init_hwconfig(struct btc_coexist *btcoexist)
+/**************************************************************
+ * extern function start with ex_btc8821a2ant_
+ **************************************************************/
+void ex_btc8821a2ant_init_hwconfig(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
u8 u1tmp = 0;
btcoexist->btc_write_1byte(btcoexist, 0x790, u1tmp);
/*Antenna config */
- halbtc8821a2ant_set_ant_path(btcoexist,
- BTC_ANT_WIFI_AT_MAIN, true, false);
+ btc8821a2ant_set_ant_path(btcoexist, BTC_ANT_WIFI_AT_MAIN, true, false);
/* PTA parameter */
- halbtc8821a2ant_coex_table(btcoexist,
- FORCE_EXEC, 0x55555555, 0x55555555,
- 0xffff, 0x3);
+ btc8821a2ant_coex_table(btcoexist, FORCE_EXEC, 0x55555555, 0x55555555,
+ 0xffff, 0x3);
/* Enable counter statistics */
/*0x76e[3] = 1, WLAN_Act control by PTA*/
btcoexist->btc_write_1byte_bitmask(btcoexist, 0x40, 0x20, 0x1);
}
-void ex_halbtc8821a2ant_init_coex_dm(struct btc_coexist *btcoexist)
+void ex_btc8821a2ant_init_coex_dm(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Coex Mechanism Init!!\n");
- halbtc8821a2ant_init_coex_dm(btcoexist);
+ btc8821a2ant_init_coex_dm(btcoexist);
}
-void
-ex_halbtc8821a2ant_display_coex_info(
- struct btc_coexist *btcoexist
- )
+void ex_btc8821a2ant_display_coex_info(struct btc_coexist *btcoexist)
{
struct btc_board_info *board_info = &btcoexist->board_info;
struct btc_stack_info *stack_info = &btcoexist->stack_info;
btcoexist->btc_disp_dbg_msg(btcoexist, BTC_DBG_DISP_COEX_STATISTICS);
}
-void ex_halbtc8821a2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8821a2ant_ips_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], IPS ENTER notify\n");
coex_sta->under_ips = true;
- halbtc8821a2ant_coex_all_off(btcoexist);
+ btc8821a2ant_coex_all_off(btcoexist);
} else if (BTC_IPS_LEAVE == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], IPS LEAVE notify\n");
coex_sta->under_ips = false;
- /*halbtc8821a2ant_init_coex_dm(btcoexist);*/
}
}
-void ex_halbtc8821a2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8821a2ant_lps_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
}
}
-void ex_halbtc8821a2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8821a2ant_scan_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
}
}
-void ex_halbtc8821a2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
+void ex_btc8821a2ant_connect_notify(struct btc_coexist *btcoexist, u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
}
}
-void ex_halbtc8821a2ant_media_status_notify(struct btc_coexist *btcoexist,
- u8 type)
+void ex_btc8821a2ant_media_status_notify(struct btc_coexist *btcoexist,
+ u8 type)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 h2c_parameter[3] = {0};
- u32 wifi_bw;
- u8 wifi_central_chnl;
+ u8 h2c_parameter[3] = {0};
+ u32 wifi_bw;
+ u8 wifi_central_chnl;
if (BTC_MEDIA_CONNECT == type) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], MEDIA disconnect notify\n");
}
- /* only 2.4G we need to inform bt the chnl mask*/
+ /* only 2.4G we need to inform bt the chnl mask */
btcoexist->btc_get(btcoexist, BTC_GET_U1_WIFI_CENTRAL_CHNL,
&wifi_central_chnl);
if ((BTC_MEDIA_CONNECT == type) &&
btcoexist->btc_fill_h2c(btcoexist, 0x66, 3, h2c_parameter);
}
-void ex_halbtc8821a2ant_special_packet_notify(struct btc_coexist *btcoexist,
- u8 type) {
+void ex_btc8821a2ant_special_packet_notify(struct btc_coexist *btcoexist,
+ u8 type)
+{
struct rtl_priv *rtlpriv = btcoexist->adapter;
if (type == BTC_PACKET_DHCP) {
}
}
-void ex_halbtc8821a2ant_bt_info_notify(struct btc_coexist *btcoexist,
- u8 *tmp_buf, u8 length)
+void ex_btc8821a2ant_bt_info_notify(struct btc_coexist *btcoexist,
+ u8 *tmp_buf, u8 length)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- u8 bt_info = 0;
- u8 i, rsp_source = 0;
- static u32 set_bt_lna_cnt, set_bt_psd_mode;
- bool bt_busy = false, limited_dig = false;
- bool wifi_connected = false, bt_hs_on = false;
+ u8 bt_info = 0;
+ u8 i, rsp_source = 0;
+ bool bt_busy = false, limited_dig = false;
+ bool wifi_connected = false, bt_hs_on = false;
coex_sta->c2h_bt_info_req_sent = false;
- rsp_source = tmp_buf[0]&0xf;
+ rsp_source = tmp_buf[0] & 0xf;
if (rsp_source >= BT_INFO_SRC_8821A_2ANT_MAX)
rsp_source = BT_INFO_SRC_8821A_2ANT_WIFI_FW;
coex_sta->bt_info_c2h_cnt[rsp_source]++;
coex_sta->bt_info_c2h[rsp_source][i] = tmp_buf[i];
if (i == 1)
bt_info = tmp_buf[i];
- if (i == length-1) {
+ if (i == length - 1) {
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"0x%02x]\n", tmp_buf[i]);
} else {
}
if (BT_INFO_SRC_8821A_2ANT_WIFI_FW != rsp_source) {
- coex_sta->bt_retry_cnt = /* [3:0]*/
+ /* [3:0] */
+ coex_sta->bt_retry_cnt =
coex_sta->bt_info_c2h[rsp_source][2]&0xf;
coex_sta->bt_rssi =
coex_sta->bt_info_ext =
coex_sta->bt_info_c2h[rsp_source][4];
- /* Here we need to resend some wifi info to BT*/
- /* because bt is reset and loss of the info.*/
+ /* Here we need to resend some wifi info to BT
+ * because bt is reset and loss of the info
+ */
if ((coex_sta->bt_info_ext & BIT1)) {
btcoexist->btc_get(btcoexist,
BTC_GET_BL_WIFI_CONNECTED, &wifi_connected);
if (wifi_connected) {
- ex_halbtc8821a2ant_media_status_notify(btcoexist,
+ ex_btc8821a2ant_media_status_notify(btcoexist,
BTC_MEDIA_CONNECT);
} else {
- ex_halbtc8821a2ant_media_status_notify(btcoexist,
+ ex_btc8821a2ant_media_status_notify(btcoexist,
BTC_MEDIA_DISCONNECT);
}
- set_bt_psd_mode = 0;
- }
- if (set_bt_psd_mode <= 3) {
- halbtc8821a2ant_set_bt_psd_mode(btcoexist, FORCE_EXEC,
- 0x0); /*fix CH-BW mode*/
- set_bt_psd_mode++;
- }
-
- if (coex_dm->cur_bt_lna_constrain) {
- if (!(coex_sta->bt_info_ext & BIT2)) {
- if (set_bt_lna_cnt <= 3) {
- btc8821a2_set_bt_lna_const(btcoexist,
- FORCE_EXEC,
- true);
- set_bt_lna_cnt++;
- }
- }
- } else {
- set_bt_lna_cnt = 0;
}
if ((coex_sta->bt_info_ext & BIT3)) {
- halbtc8821a2ant_ignore_wlan_act(btcoexist,
- FORCE_EXEC, false);
+ btc8821a2ant_ignore_wlan_act(btcoexist,
+ FORCE_EXEC, false);
} else {
/* BT already NOT ignore Wlan active, do nothing here.*/
}
-
- if ((coex_sta->bt_info_ext & BIT4)) {
- /* BT auto report already enabled, do nothing*/
- } else {
- halbtc8821a2ant_bt_auto_report(btcoexist,
- FORCE_EXEC, true);
- }
}
btcoexist->btc_get(btcoexist, BTC_GET_BL_HS_OPERATION, &bt_hs_on);
btcoexist->btc_set(btcoexist,
BTC_SET_BL_BT_LIMITED_DIG, &limited_dig);
- halbtc8821a2ant_run_coexist_mechanism(btcoexist);
+ btc8821a2ant_run_coexist_mechanism(btcoexist);
}
-void ex_halbtc8821a2ant_halt_notify(struct btc_coexist *btcoexist)
+void ex_btc8821a2ant_halt_notify(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], Halt notify\n");
- halbtc8821a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
- ex_halbtc8821a2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
+ btc8821a2ant_ignore_wlan_act(btcoexist, FORCE_EXEC, true);
+ ex_btc8821a2ant_media_status_notify(btcoexist, BTC_MEDIA_DISCONNECT);
}
-void ex_halbtc8821a2ant_periodical(struct btc_coexist *btcoexist)
+void ex_btc8821a2ant_periodical(struct btc_coexist *btcoexist)
{
struct rtl_priv *rtlpriv = btcoexist->adapter;
- static u8 dis_ver_info_cnt;
- u32 fw_ver = 0, bt_patch_ver = 0;
+ static u8 dis_ver_info_cnt;
struct btc_board_info *board_info = &btcoexist->board_info;
struct btc_stack_info *stack_info = &btcoexist->stack_info;
+ u32 fw_ver = 0, bt_patch_ver = 0;
RT_TRACE(rtlpriv, COMP_BT_COEXIST, DBG_LOUD,
"[BTCoex], ==========================Periodical===========================\n");
"[BTCoex], ****************************************************************\n");
}
- halbtc8821a2ant_query_bt_info(btcoexist);
- halbtc8821a2ant_monitor_bt_ctr(btcoexist);
- btc8821a2ant_mon_bt_en_dis(btcoexist);
+ btc8821a2ant_query_bt_info(btcoexist);
+ btc8821a2ant_monitor_bt_ctr(btcoexist);
}
case BTC_SET_ACT_DISABLE_LOW_POWER:
halbtc_disable_low_power();
break;
- case BTC_SET_ACT_UPDATE_ra_mask:
+ case BTC_SET_ACT_UPDATE_RAMASK:
btcoexist->bt_info.ra_mask = *u32_tmp;
break;
case BTC_SET_ACT_SEND_MIMO_PS:
BTC_SET_ACT_NORMAL_LPS,
BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT,
BTC_SET_ACT_DISABLE_LOW_POWER,
- BTC_SET_ACT_UPDATE_ra_mask,
+ BTC_SET_ACT_UPDATE_RAMASK,
BTC_SET_ACT_SEND_MIMO_PS,
/* BT Coex related */
BTC_SET_ACT_CTRL_BT_INFO,
bool hid_only;
bool pan_exist;
bool pan_only;
+ bool slave_role;
};
enum btc_antenna_pos {
channel_plan_to_country_code(rtlpriv->efuse.channel_plan);
RT_TRACE(rtlpriv, COMP_REGD, DBG_DMESG,
- "rtl: EEPROM regdomain: 0x%0x conuntry code: %d\n",
+ "rtl: EEPROM regdomain: 0x%0x country code: %d\n",
rtlpriv->efuse.channel_plan, rtlpriv->regd.country_code);
if (rtlpriv->regd.country_code >= COUNTRY_CODE_MAX) {
#define PSPOLL_PG 2
#define NULL_PG 3
#define PROBERSP_PG 4 /* ->5 */
+#define QOS_NULL_PG 6
+#define BT_QOS_NULL_PG 7
-#define TOTAL_RESERVED_PKT_LEN 768
+#define TOTAL_RESERVED_PKT_LEN 1024
static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
/* page 0 beacon */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x1A, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+ /* page 6 qos null data */
+ 0xC8, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
+ 0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
+ 0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x1A, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
+ 0x00, 0x00, 0x80, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+ /* page 7 BT-qos null data */
+ 0xC8, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
+ 0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
+ 0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
u8 *p_pspoll;
u8 *nullfunc;
u8 *p_probersp;
+ u8 *qosnull;
+ u8 *btqosnull;
/*---------------------------------------------------------
* (1) beacon
*---------------------------------------------------------
SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1rsvdpageloc, PROBERSP_PG);
+ /*---------------------------------------------------------
+ * (5) QoS null data
+ *----------------------------------------------------------
+ */
+ qosnull = &reserved_page_packet[QOS_NULL_PG * 128];
+ SET_80211_HDR_ADDRESS1(qosnull, mac->bssid);
+ SET_80211_HDR_ADDRESS2(qosnull, mac->mac_addr);
+ SET_80211_HDR_ADDRESS3(qosnull, mac->bssid);
+
+ SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1rsvdpageloc, QOS_NULL_PG);
+
+ /*---------------------------------------------------------
+ * (6) BT QoS null data
+ *----------------------------------------------------------
+ */
+ btqosnull = &reserved_page_packet[BT_QOS_NULL_PG * 128];
+ SET_80211_HDR_ADDRESS1(btqosnull, mac->bssid);
+ SET_80211_HDR_ADDRESS2(btqosnull, mac->mac_addr);
+ SET_80211_HDR_ADDRESS3(btqosnull, mac->bssid);
+
+ SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1rsvdpageloc, BT_QOS_NULL_PG);
+
totalpacketlen = TOTAL_RESERVED_PKT_LEN;
RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD ,
SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \
SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
+#define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__ph2ccmd, __val) \
+ SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 3, 0, 8, __val)
+#define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__ph2ccmd, __val) \
+ SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 4, 0, 8, __val)
/* _MEDIA_STATUS_RPT_PARM_CMD1 */
#define SET_H2CCMD_MSRRPT_PARM_OPMODE(__cmd, __val) \
u8 txpktbuf_bndy;
u8 u8tmp, testcnt = 0;
- txpktbuf_bndy = 0xFA;
+ txpktbuf_bndy = 0xF7;
- rtl_write_dword(rtlpriv, REG_RQPN, 0x80E90808);
+ rtl_write_dword(rtlpriv, REG_RQPN, 0x80E60808);
rtl_write_byte(rtlpriv, REG_TRXFF_BNDY, txpktbuf_bndy);
rtl_write_word(rtlpriv, REG_TRXFF_BNDY + 2, 0x3d00 - 1);
#define PSPOLL_PG 2
#define NULL_PG 3
#define PROBERSP_PG 4 /* ->5 */
+#define QOS_NULL_PG 6
+#define BT_QOS_NULL_PG 7
-#define TOTAL_RESERVED_PKT_LEN 768
+#define TOTAL_RESERVED_PKT_LEN 1024 /* can be up to 1280 (tx_bndy=245) */
static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
/* page 0 beacon */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x1A, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+ /* page 6 qos null data */
+ 0xC8, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
+ 0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
+ 0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x1A, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
+ 0x00, 0x00, 0x80, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+ /* page 7 BT-qos null data */
+ 0xC8, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
+ 0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
+ 0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
};
void rtl8723be_set_fw_rsvdpagepkt(struct ieee80211_hw *hw,
u8 *p_pspoll;
u8 *nullfunc;
u8 *p_probersp;
+ u8 *qosnull;
+ u8 *btqosnull;
/*---------------------------------------------------------
* (1) beacon
*---------------------------------------------------------
SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1rsvdpageloc, PROBERSP_PG);
+ /*---------------------------------------------------------
+ * (5) QoS Null
+ *---------------------------------------------------------
+ */
+ qosnull = &reserved_page_packet[QOS_NULL_PG * 128];
+ SET_80211_HDR_ADDRESS1(qosnull, mac->bssid);
+ SET_80211_HDR_ADDRESS2(qosnull, mac->mac_addr);
+ SET_80211_HDR_ADDRESS3(qosnull, mac->bssid);
+
+ SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1rsvdpageloc, QOS_NULL_PG);
+
+ /*---------------------------------------------------------
+ * (5) QoS Null
+ *---------------------------------------------------------
+ */
+ btqosnull = &reserved_page_packet[BT_QOS_NULL_PG * 128];
+ SET_80211_HDR_ADDRESS1(btqosnull, mac->bssid);
+ SET_80211_HDR_ADDRESS2(btqosnull, mac->mac_addr);
+ SET_80211_HDR_ADDRESS3(btqosnull, mac->bssid);
+
+ SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1rsvdpageloc, BT_QOS_NULL_PG);
+
totalpacketlen = TOTAL_RESERVED_PKT_LEN;
RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
&reserved_page_packet[0], totalpacketlen);
RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
"rtl8723be_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
- u1rsvdpageloc, 3);
+ u1rsvdpageloc, sizeof(u1rsvdpageloc));
skb = dev_alloc_skb(totalpacketlen);
memcpy((u8 *)skb_put(skb, totalpacketlen),
RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
"Set RSVD page location to Fw.\n");
RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG, "H2C_RSVDPAGE:\n",
- u1rsvdpageloc, 3);
+ u1rsvdpageloc, sizeof(u1rsvdpageloc));
rtl8723be_fill_h2c_cmd(hw, H2C_8723B_RSVDPAGE,
sizeof(u1rsvdpageloc), u1rsvdpageloc);
} else
SET_BITS_TO_LE_1BYTE((__ph2ccmd)+1, 0, 8, __val)
#define SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(__ph2ccmd, __val) \
SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
+#define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__ph2ccmd, __val) \
+ SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 3, 0, 8, __val)
+#define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__ph2ccmd, __val) \
+ SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 4, 0, 8, __val)
void rtl8723be_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
- char *fw_name = "rtlwifi/rtl8723befw.bin";
+ char *fw_name = "rtlwifi/rtl8723befw_36.bin";
rtl8723be_bt_reg_init(hw);
rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer();
rtlpriv->io.dev, GFP_KERNEL, hw,
rtl_fw_cb);
if (err) {
- pr_err("Failed to request firmware!\n");
- return 1;
+ /* Failed to get firmware. Check if old version available */
+ fw_name = "rtlwifi/rtl8723befw.bin";
+ pr_info("Using firmware %s\n", fw_name);
+ err = request_firmware_nowait(THIS_MODULE, 1, fw_name,
+ rtlpriv->io.dev, GFP_KERNEL, hw,
+ rtl_fw_cb);
+ if (err) {
+ pr_err("Failed to request firmware!\n");
+ return 1;
+ }
}
return 0;
}
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Realtek 8723BE 802.11n PCI wireless");
MODULE_FIRMWARE("rtlwifi/rtl8723befw.bin");
+MODULE_FIRMWARE("rtlwifi/rtl8723befw_36.bin");
module_param_named(swenc, rtl8723be_mod_params.sw_crypto, bool, 0444);
module_param_named(debug_level, rtl8723be_mod_params.debug_level, int, 0644);
#define PSPOLL_PG 1
#define NULL_PG 2
#define QOSNULL_PG 3
-#define ARPRESP_PG 4
-#define REMOTE_PG 5
-#define GTKEXT_PG 6
+#define BT_QOSNULL_PG 4
+#define ARPRESP_PG 5
+#define REMOTE_PG 6
+#define GTKEXT_PG 7
-#define TOTAL_RESERVED_PKT_LEN_8812 3584
-#define TOTAL_RESERVED_PKT_LEN_8821 1792
+#define TOTAL_RESERVED_PKT_LEN_8812 4096
+#define TOTAL_RESERVED_PKT_LEN_8821 2048
static u8 reserved_page_packet_8821[TOTAL_RESERVED_PKT_LEN_8821] = {
/* page 0: beacon */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x1A, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
+ 0x00, 0x00, 0x80, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* page 4: BT qos null data */
+ 0xC8, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
+ 0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
+ 0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x3C, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /* page 4~6 is for wowlan */
- /* page 4: ARP resp */
+ /* page 5~7 is for wowlan */
+ /* page 5: ARP resp */
0x08, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /* page 5: H2C_REMOTE_WAKE_CTRL_INFO */
+ /* page 6: H2C_REMOTE_WAKE_CTRL_INFO */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /* page 6: Rsvd GTK extend memory (zero memory) */
+ /* page 7: Rsvd GTK extend memory (zero memory) */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x1A, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
+ 0x00, 0x00, 0x80, 0x00, 0x00, 0x01, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ /* page 4: BT Qos null data */
+ 0xC8, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
+ 0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
+ 0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x3C, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /* page 4~6 is for wowlan */
- /* page 4: ARP resp */
+ /* page 5~7 is for wowlan */
+ /* page 5: ARP resp */
0x08, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /* page 5: H2C_REMOTE_WAKE_CTRL_INFO */
+ /* page 6: H2C_REMOTE_WAKE_CTRL_INFO */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- /* page 6: Rsvd GTK extend memory (zero memory) */
+ /* page 7: Rsvd GTK extend memory (zero memory) */
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
u8 *p_pspoll;
u8 *nullfunc;
u8 *qosnull;
+ u8 *btqosnull;
u8 *arpresp;
/*---------------------------------------------------------
SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1RsvdPageLoc, QOSNULL_PG);
+ /*---------------------------------------------------------
+ * (5) BT Qos null data
+ *----------------------------------------------------------
+ */
+ btqosnull = &reserved_page_packet_8812[BT_QOSNULL_PG * 512];
+ SET_80211_HDR_ADDRESS1(btqosnull, mac->bssid);
+ SET_80211_HDR_ADDRESS2(btqosnull, mac->mac_addr);
+ SET_80211_HDR_ADDRESS3(btqosnull, mac->bssid);
+
+ SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1RsvdPageLoc, BT_QOSNULL_PG);
+
if (!dl_whole_packets) {
- totalpacketlen = 512 * (QOSNULL_PG + 1) - 40;
+ totalpacketlen = 512 * (BT_QOSNULL_PG + 1) - 40;
goto out;
}
/*---------------------------------------------------------
- * (5) ARP Resp
+ * (6) ARP Resp
*----------------------------------------------------------
*/
arpresp = &reserved_page_packet_8812[ARPRESP_PG * 512];
SET_8821AE_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1RsvdPageLoc2, ARPRESP_PG);
/*---------------------------------------------------------
- * (6) Remote Wake Ctrl
+ * (7) Remote Wake Ctrl
*----------------------------------------------------------
*/
SET_8821AE_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1RsvdPageLoc2,
REMOTE_PG);
/*---------------------------------------------------------
- * (7) GTK Ext Memory
+ * (8) GTK Ext Memory
*----------------------------------------------------------
*/
SET_8821AE_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(u1RsvdPageLoc2, GTKEXT_PG);
u8 *p_pspoll;
u8 *nullfunc;
u8 *qosnull;
+ u8 *btqosnull;
u8 *arpresp;
/*---------------------------------------------------------
SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1RsvdPageLoc, QOSNULL_PG);
+ /*---------------------------------------------------------
+ * (5) Qos null data
+ *----------------------------------------------------------
+ */
+ btqosnull = &reserved_page_packet_8821[BT_QOSNULL_PG * 256];
+ SET_80211_HDR_ADDRESS1(btqosnull, mac->bssid);
+ SET_80211_HDR_ADDRESS2(btqosnull, mac->mac_addr);
+ SET_80211_HDR_ADDRESS3(btqosnull, mac->bssid);
+
+ SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1RsvdPageLoc, BT_QOSNULL_PG);
+
if (!dl_whole_packets) {
- totalpacketlen = 256 * (QOSNULL_PG + 1) - 40;
+ totalpacketlen = 256 * (BT_QOSNULL_PG + 1) - 40;
goto out;
}
/*---------------------------------------------------------
- * (5) ARP Resp
+ * (6) ARP Resp
*----------------------------------------------------------
*/
arpresp = &reserved_page_packet_8821[ARPRESP_PG * 256];
SET_8821AE_H2CCMD_AOAC_RSVDPAGE_LOC_ARP_RSP(u1RsvdPageLoc2, ARPRESP_PG);
/*---------------------------------------------------------
- * (6) Remote Wake Ctrl
+ * (7) Remote Wake Ctrl
*----------------------------------------------------------
*/
SET_8821AE_H2CCMD_AOAC_RSVDPAGE_LOC_REMOTE_WAKE_CTRL_INFO(u1RsvdPageLoc2,
REMOTE_PG);
/*---------------------------------------------------------
- * (7) GTK Ext Memory
+ * (8) GTK Ext Memory
*----------------------------------------------------------
*/
SET_8821AE_H2CCMD_AOAC_RSVDPAGE_LOC_GTK_EXT_MEM(u1RsvdPageLoc2, GTKEXT_PG);
SET_BITS_TO_LE_1BYTE((__ph2ccmd)+2, 0, 8, __val)
#define SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(__ph2ccmd, __val) \
SET_BITS_TO_LE_1BYTE((__ph2ccmd)+3, 0, 8, __val)
+#define SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(__ph2ccmd, __val) \
+ SET_BITS_TO_LE_1BYTE((__ph2ccmd) + 4, 0, 8, __val)
/* _MEDIA_STATUS_RPT_PARM_CMD1 */
#define SET_H2CCMD_MSRRPT_PARM_OPMODE(__cmd, __value) \
bool status;
maxpage = 255;
- txpktbuf_bndy = 0xF8;
- rqpn = 0x80e70808;
- if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8812AE) {
- txpktbuf_bndy = 0xFA;
- rqpn = 0x80e90808;
- }
+ txpktbuf_bndy = 0xF7;
+ rqpn = 0x80e60808;
rtl_write_byte(rtlpriv, REG_TRXFF_BNDY, txpktbuf_bndy);
rtl_write_word(rtlpriv, REG_TRXFF_BNDY + 2, MAX_RX_DMA_BUFFER_SIZE - 1);
return;
}
+static bool _rtl8821ae_check_positive(struct ieee80211_hw *hw,
+ const u32 condition1,
+ const u32 condition2)
+{
+ struct rtl_priv *rtlpriv = rtl_priv(hw);
+ struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
+ u32 cut_ver = ((rtlhal->version & CHIP_VER_RTL_MASK)
+ >> CHIP_VER_RTL_SHIFT);
+ u32 intf = (rtlhal->interface == INTF_USB ? BIT(1) : BIT(0));
+
+ u8 board_type = ((rtlhal->board_type & BIT(4)) >> 4) << 0 | /* _GLNA */
+ ((rtlhal->board_type & BIT(3)) >> 3) << 1 | /* _GPA */
+ ((rtlhal->board_type & BIT(7)) >> 7) << 2 | /* _ALNA */
+ ((rtlhal->board_type & BIT(6)) >> 6) << 3 | /* _APA */
+ ((rtlhal->board_type & BIT(2)) >> 2) << 4; /* _BT */
+
+ u32 cond1 = condition1, cond2 = condition2;
+ u32 driver1 = cut_ver << 24 | /* CUT ver */
+ 0 << 20 | /* interface 2/2 */
+ 0x04 << 16 | /* platform */
+ rtlhal->package_type << 12 |
+ intf << 8 | /* interface 1/2 */
+ board_type;
+
+ u32 driver2 = rtlhal->type_glna << 0 |
+ rtlhal->type_gpa << 8 |
+ rtlhal->type_alna << 16 |
+ rtlhal->type_apa << 24;
+
+ RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+ "===> [8812A] CheckPositive (cond1, cond2) = (0x%X 0x%X)\n",
+ cond1, cond2);
+ RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+ "===> [8812A] CheckPositive (driver1, driver2) = (0x%X 0x%X)\n",
+ driver1, driver2);
+
+ RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+ " (Platform, Interface) = (0x%X, 0x%X)\n", 0x04, intf);
+ RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
+ " (Board, Package) = (0x%X, 0x%X)\n",
+ rtlhal->board_type, rtlhal->package_type);
+
+ /*============== Value Defined Check ===============*/
+ /*QFN Type [15:12] and Cut Version [27:24] need to do value check*/
+
+ if (((cond1 & 0x0000F000) != 0) && ((cond1 & 0x0000F000) !=
+ (driver1 & 0x0000F000)))
+ return false;
+ if (((cond1 & 0x0F000000) != 0) && ((cond1 & 0x0F000000) !=
+ (driver1 & 0x0F000000)))
+ return false;
+
+ /*=============== Bit Defined Check ================*/
+ /* We don't care [31:28] */
+
+ cond1 &= 0x00FF0FFF;
+ driver1 &= 0x00FF0FFF;
+
+ if ((cond1 & driver1) == cond1) {
+ u32 mask = 0;
+
+ if ((cond1 & 0x0F) == 0) /* BoardType is DONTCARE*/
+ return true;
+
+ if ((cond1 & BIT(0)) != 0) /*GLNA*/
+ mask |= 0x000000FF;
+ if ((cond1 & BIT(1)) != 0) /*GPA*/
+ mask |= 0x0000FF00;
+ if ((cond1 & BIT(2)) != 0) /*ALNA*/
+ mask |= 0x00FF0000;
+ if ((cond1 & BIT(3)) != 0) /*APA*/
+ mask |= 0xFF000000;
+
+ /* BoardType of each RF path is matched*/
+ if ((cond2 & mask) == (driver2 & mask))
+ return true;
+ else
+ return false;
+ } else
+ return false;
+}
+
static bool _rtl8821ae_check_condition(struct ieee80211_hw *hw,
const u32 condition)
{
return true;
}
+static bool
+__rtl8821ae_phy_config_with_headerfile(struct ieee80211_hw *hw,
+ u32 *array_table, u16 arraylen,
+ void (*set_reg)(struct ieee80211_hw *hw,
+ u32 regaddr, u32 data))
+{
+ #define COND_ELSE 2
+ #define COND_ENDIF 3
+
+ int i = 0;
+ u8 cond;
+ bool matched = true, skipped = false;
+
+ while ((i + 1) < arraylen) {
+ u32 v1 = array_table[i];
+ u32 v2 = array_table[i + 1];
+
+ if (v1 & (BIT(31) | BIT(30))) {/*positive & negative condition*/
+ if (v1 & BIT(31)) {/* positive condition*/
+ cond = (u8)((v1 & (BIT(29) | BIT(28))) >> 28);
+ if (cond == COND_ENDIF) {/*end*/
+ matched = true;
+ skipped = false;
+ } else if (cond == COND_ELSE) /*else*/
+ matched = skipped ? false : true;
+ else {/*if , else if*/
+ if (skipped) {
+ matched = false;
+ } else {
+ if (_rtl8821ae_check_positive(
+ hw, v1, v2)) {
+ matched = true;
+ skipped = true;
+ } else {
+ matched = false;
+ skipped = false;
+ }
+ }
+ }
+ } else if (v1 & BIT(30)) { /*negative condition*/
+ /*do nothing*/
+ }
+ } else {
+ if (matched)
+ set_reg(hw, v1, v2);
+ }
+ i = i + 2;
+ }
+
+ return true;
+}
+
static bool _rtl8821ae_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
- u32 i, v1, v2;
u32 arraylength;
u32 *ptrarray;
RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Read MAC_REG_Array\n");
if (rtlhal->hw_type == HARDWARE_TYPE_RTL8821AE) {
- arraylength = RTL8821AEMAC_1T_ARRAYLEN;
+ arraylength = RTL8821AE_MAC_1T_ARRAYLEN;
ptrarray = RTL8821AE_MAC_REG_ARRAY;
} else {
- arraylength = RTL8812AEMAC_1T_ARRAYLEN;
+ arraylength = RTL8812AE_MAC_1T_ARRAYLEN;
ptrarray = RTL8812AE_MAC_REG_ARRAY;
}
RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
"Img: MAC_REG_ARRAY LEN %d\n", arraylength);
- for (i = 0; i < arraylength; i += 2) {
- v1 = ptrarray[i];
- v2 = (u8)ptrarray[i + 1];
- if (v1 < 0xCDCDCDCD) {
- rtl_write_byte(rtlpriv, v1, (u8)v2);
- continue;
- } else {
- if (!_rtl8821ae_check_condition(hw, v1)) {
- /*Discard the following (offset, data) pairs*/
- READ_NEXT_PAIR(ptrarray, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD && i < arraylength - 2) {
- READ_NEXT_PAIR(ptrarray, v1, v2, i);
- }
- i -= 2; /* prevent from for-loop += 2*/
- } else {/*Configure matched pairs and skip to end of if-else.*/
- READ_NEXT_PAIR(ptrarray, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD && i < arraylength - 2) {
- rtl_write_byte(rtlpriv, v1, v2);
- READ_NEXT_PAIR(ptrarray, v1, v2, i);
- }
- while (v2 != 0xDEAD && i < arraylength - 2)
- READ_NEXT_PAIR(ptrarray, v1, v2, i);
- }
- }
- }
- return true;
+ return __rtl8821ae_phy_config_with_headerfile(hw,
+ ptrarray, arraylength, rtl_write_byte_with_val32);
}
static bool _rtl8821ae_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
{
struct rtl_priv *rtlpriv = rtl_priv(hw);
struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
- int i;
u32 *array_table;
u16 arraylen;
- u32 v1 = 0, v2 = 0;
if (configtype == BASEBAND_CONFIG_PHY_REG) {
if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) {
- arraylen = RTL8812AEPHY_REG_1TARRAYLEN;
+ arraylen = RTL8812AE_PHY_REG_1TARRAYLEN;
array_table = RTL8812AE_PHY_REG_ARRAY;
} else {
- arraylen = RTL8821AEPHY_REG_1TARRAYLEN;
+ arraylen = RTL8821AE_PHY_REG_1TARRAYLEN;
array_table = RTL8821AE_PHY_REG_ARRAY;
}
- for (i = 0; i < arraylen; i += 2) {
- v1 = array_table[i];
- v2 = array_table[i + 1];
- if (v1 < 0xCDCDCDCD) {
- _rtl8821ae_config_bb_reg(hw, v1, v2);
- continue;
- } else {/*This line is the start line of branch.*/
- if (!_rtl8821ae_check_condition(hw, v1)) {
- /*Discard the following (offset, data) pairs*/
- READ_NEXT_PAIR(array_table, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD &&
- i < arraylen - 2) {
- READ_NEXT_PAIR(array_table, v1,
- v2, i);
- }
-
- i -= 2; /* prevent from for-loop += 2*/
- } else {/*Configure matched pairs and skip to end of if-else.*/
- READ_NEXT_PAIR(array_table, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD &&
- i < arraylen - 2) {
- _rtl8821ae_config_bb_reg(hw, v1,
- v2);
- READ_NEXT_PAIR(array_table, v1,
- v2, i);
- }
-
- while (v2 != 0xDEAD &&
- i < arraylen - 2) {
- READ_NEXT_PAIR(array_table, v1,
- v2, i);
- }
- }
- }
- }
+ return __rtl8821ae_phy_config_with_headerfile(hw,
+ array_table, arraylen,
+ _rtl8821ae_config_bb_reg);
} else if (configtype == BASEBAND_CONFIG_AGC_TAB) {
if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) {
- arraylen = RTL8812AEAGCTAB_1TARRAYLEN;
+ arraylen = RTL8812AE_AGC_TAB_1TARRAYLEN;
array_table = RTL8812AE_AGC_TAB_ARRAY;
} else {
- arraylen = RTL8821AEAGCTAB_1TARRAYLEN;
+ arraylen = RTL8821AE_AGC_TAB_1TARRAYLEN;
array_table = RTL8821AE_AGC_TAB_ARRAY;
}
- for (i = 0; i < arraylen; i = i + 2) {
- v1 = array_table[i];
- v2 = array_table[i+1];
- if (v1 < 0xCDCDCDCD) {
- rtl_set_bbreg(hw, v1, MASKDWORD, v2);
- udelay(1);
- continue;
- } else {/*This line is the start line of branch.*/
- if (!_rtl8821ae_check_condition(hw, v1)) {
- /*Discard the following (offset, data) pairs*/
- READ_NEXT_PAIR(array_table, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD &&
- i < arraylen - 2) {
- READ_NEXT_PAIR(array_table, v1,
- v2, i);
- }
- i -= 2; /* prevent from for-loop += 2*/
- } else {/*Configure matched pairs and skip to end of if-else.*/
- READ_NEXT_PAIR(array_table, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD &&
- i < arraylen - 2) {
- rtl_set_bbreg(hw, v1, MASKDWORD,
- v2);
- udelay(1);
- READ_NEXT_PAIR(array_table, v1,
- v2, i);
- }
-
- while (v2 != 0xDEAD &&
- i < arraylen - 2) {
- READ_NEXT_PAIR(array_table, v1,
- v2, i);
- }
- }
- RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
- "The agctab_array_table[0] is %x Rtl818EEPHY_REGArray[1] is %x\n",
- array_table[i], array_table[i + 1]);
- }
- }
+ return __rtl8821ae_phy_config_with_headerfile(hw,
+ array_table, arraylen,
+ rtl_set_bbreg_with_dwmask);
}
return true;
}
u32 v1, v2, v3, v4, v5, v6;
if (rtlhal->hw_type == HARDWARE_TYPE_RTL8812AE) {
- arraylen = RTL8812AEPHY_REG_ARRAY_PGLEN;
+ arraylen = RTL8812AE_PHY_REG_ARRAY_PGLEN;
array = RTL8812AE_PHY_REG_ARRAY_PG;
} else {
- arraylen = RTL8821AEPHY_REG_ARRAY_PGLEN;
+ arraylen = RTL8821AE_PHY_REG_ARRAY_PGLEN;
array = RTL8821AE_PHY_REG_ARRAY_PG;
}
bool rtl8812ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
enum radio_path rfpath)
{
- int i;
bool rtstatus = true;
u32 *radioa_array_table_a, *radioa_array_table_b;
u16 radioa_arraylen_a, radioa_arraylen_b;
struct rtl_priv *rtlpriv = rtl_priv(hw);
- u32 v1 = 0, v2 = 0;
radioa_arraylen_a = RTL8812AE_RADIOA_1TARRAYLEN;
radioa_array_table_a = RTL8812AE_RADIOA_ARRAY;
rtstatus = true;
switch (rfpath) {
case RF90_PATH_A:
- for (i = 0; i < radioa_arraylen_a; i = i + 2) {
- v1 = radioa_array_table_a[i];
- v2 = radioa_array_table_a[i+1];
- if (v1 < 0xcdcdcdcd) {
- _rtl8821ae_config_rf_radio_a(hw, v1, v2);
- continue;
- } else{/*This line is the start line of branch.*/
- if (!_rtl8821ae_check_condition(hw, v1)) {
- /*Discard the following (offset, data) pairs*/
- READ_NEXT_PAIR(radioa_array_table_a, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD && i < radioa_arraylen_a-2)
- READ_NEXT_PAIR(radioa_array_table_a, v1, v2, i);
-
- i -= 2; /* prevent from for-loop += 2*/
- } else {/*Configure matched pairs and skip to end of if-else.*/
- READ_NEXT_PAIR(radioa_array_table_a, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD && i < radioa_arraylen_a - 2) {
- _rtl8821ae_config_rf_radio_a(hw, v1, v2);
- READ_NEXT_PAIR(radioa_array_table_a, v1, v2, i);
- }
-
- while (v2 != 0xDEAD && i < radioa_arraylen_a-2)
- READ_NEXT_PAIR(radioa_array_table_a, v1, v2, i);
-
- }
- }
- }
+ return __rtl8821ae_phy_config_with_headerfile(hw,
+ radioa_array_table_a, radioa_arraylen_a,
+ _rtl8821ae_config_rf_radio_a);
break;
case RF90_PATH_B:
- for (i = 0; i < radioa_arraylen_b; i = i + 2) {
- v1 = radioa_array_table_b[i];
- v2 = radioa_array_table_b[i+1];
- if (v1 < 0xcdcdcdcd) {
- _rtl8821ae_config_rf_radio_b(hw, v1, v2);
- continue;
- } else{/*This line is the start line of branch.*/
- if (!_rtl8821ae_check_condition(hw, v1)) {
- /*Discard the following (offset, data) pairs*/
- READ_NEXT_PAIR(radioa_array_table_b, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD && i < radioa_arraylen_b-2)
- READ_NEXT_PAIR(radioa_array_table_b, v1, v2, i);
-
- i -= 2; /* prevent from for-loop += 2*/
- } else {/*Configure matched pairs and skip to end of if-else.*/
- READ_NEXT_PAIR(radioa_array_table_b, v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD && i < radioa_arraylen_b-2) {
- _rtl8821ae_config_rf_radio_b(hw, v1, v2);
- READ_NEXT_PAIR(radioa_array_table_b, v1, v2, i);
- }
-
- while (v2 != 0xDEAD && i < radioa_arraylen_b-2)
- READ_NEXT_PAIR(radioa_array_table_b, v1, v2, i);
- }
- }
- }
+ return __rtl8821ae_phy_config_with_headerfile(hw,
+ radioa_array_table_b, radioa_arraylen_b,
+ _rtl8821ae_config_rf_radio_b);
break;
case RF90_PATH_C:
case RF90_PATH_D:
bool rtl8821ae_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
enum radio_path rfpath)
{
- #define READ_NEXT_RF_PAIR(v1, v2, i) \
- do { \
- i += 2; \
- v1 = radioa_array_table[i]; \
- v2 = radioa_array_table[i+1]; \
- } \
- while (0)
-
- int i;
bool rtstatus = true;
u32 *radioa_array_table;
u16 radioa_arraylen;
struct rtl_priv *rtlpriv = rtl_priv(hw);
- /* struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); */
- u32 v1 = 0, v2 = 0;
radioa_arraylen = RTL8821AE_RADIOA_1TARRAYLEN;
radioa_array_table = RTL8821AE_RADIOA_ARRAY;
rtstatus = true;
switch (rfpath) {
case RF90_PATH_A:
- for (i = 0; i < radioa_arraylen; i = i + 2) {
- v1 = radioa_array_table[i];
- v2 = radioa_array_table[i+1];
- if (v1 < 0xcdcdcdcd)
- _rtl8821ae_config_rf_radio_a(hw, v1, v2);
- else{/*This line is the start line of branch.*/
- if (!_rtl8821ae_check_condition(hw, v1)) {
- /*Discard the following (offset, data) pairs*/
- READ_NEXT_RF_PAIR(v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD && i < radioa_arraylen - 2)
- READ_NEXT_RF_PAIR(v1, v2, i);
-
- i -= 2; /* prevent from for-loop += 2*/
- } else {/*Configure matched pairs and skip to end of if-else.*/
- READ_NEXT_RF_PAIR(v1, v2, i);
- while (v2 != 0xDEAD &&
- v2 != 0xCDEF &&
- v2 != 0xCDCD && i < radioa_arraylen - 2) {
- _rtl8821ae_config_rf_radio_a(hw, v1, v2);
- READ_NEXT_RF_PAIR(v1, v2, i);
- }
-
- while (v2 != 0xDEAD && i < radioa_arraylen - 2)
- READ_NEXT_RF_PAIR(v1, v2, i);
- }
- }
- }
+ return __rtl8821ae_phy_config_with_headerfile(hw,
+ radioa_array_table, radioa_arraylen,
+ _rtl8821ae_config_rf_radio_a);
break;
case RF90_PATH_B:
fw_name = "rtlwifi/rtl8812aefw.bin";
wowlan_fw_name = "rtlwifi/rtl8812aefw_wowlan.bin";
} else {
- fw_name = "rtlwifi/rtl8821aefw.bin";
+ fw_name = "rtlwifi/rtl8821aefw_29.bin";
wowlan_fw_name = "rtlwifi/rtl8821aefw_wowlan.bin";
}
rtlpriv->io.dev, GFP_KERNEL, hw,
rtl_fw_cb);
if (err) {
- pr_err("Failed to request normal firmware!\n");
- return 1;
+ /* Failed to get firmware. Check if old version available */
+ fw_name = "rtlwifi/rtl8821aefw.bin";
+ pr_info("Using firmware %s\n", fw_name);
+ err = request_firmware_nowait(THIS_MODULE, 1, fw_name,
+ rtlpriv->io.dev, GFP_KERNEL, hw,
+ rtl_fw_cb);
+ if (err) {
+ pr_err("Failed to request normal firmware!\n");
+ return 1;
+ }
}
/*load wowlan firmware*/
pr_info("Using firmware %s\n", wowlan_fw_name);
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION("Realtek 8821ae 802.11ac PCI wireless");
MODULE_FIRMWARE("rtlwifi/rtl8821aefw.bin");
+MODULE_FIRMWARE("rtlwifi/rtl8821aefw_29.bin");
module_param_named(swenc, rtl8821ae_mod_params.sw_crypto, bool, 0444);
module_param_named(debug_level, rtl8821ae_mod_params.debug_level, int, 0644);
0x824, 0x00030FE0,
0x828, 0x00000000,
0x82C, 0x002083DD,
- 0x830, 0x2AAA6C86,
+ 0x830, 0x2EAAEEB8,
0x834, 0x0037A706,
0x838, 0x06C89B44,
0x83C, 0x0000095B,
0x8BC, 0x4CA520A3,
0x8C0, 0x27F00020,
0x8C4, 0x00000000,
- 0x8C8, 0x00013169,
+ 0x8C8, 0x00012D69,
0x8CC, 0x08248492,
0x8D0, 0x0000B800,
0x8DC, 0x00000000,
0x8D8, 0x290B5612,
0x8F8, 0x400002C0,
0x8FC, 0x00000000,
- 0xFF0F07D8, 0xABCD,
0x900, 0x00000701,
- 0xFF0F07D0, 0xCDEF,
- 0x900, 0x00000701,
- 0xCDCDCDCD, 0xCDCD,
- 0x900, 0x00000700,
- 0xFF0F07D8, 0xDEAD,
0x90C, 0x00000000,
0x910, 0x0000FC00,
0x914, 0x00000404,
0x9D4, 0x00000000,
0x9D8, 0x00000000,
0x9DC, 0x00000000,
- 0x9E4, 0x00000002,
+ 0x9E4, 0x00000003,
0x9E8, 0x000002D5,
0xA00, 0x00D047C8,
0xA04, 0x01FF000C,
0xC5C, 0x00000058,
0xC60, 0x34344443,
0xC64, 0x07003333,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
+ 0xC68, 0x59791979,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
+ 0xC68, 0x59791979,
+ 0x90000002, 0x00000000, 0x40000000, 0x00000000,
0xC68, 0x59791979,
+ 0x90000004, 0x00000000, 0x40000000, 0x00000000,
+ 0xC68, 0x59791979,
+ 0x90000001, 0x00000000, 0x40000000, 0x00000000,
+ 0xC68, 0x59791979,
+ 0x90000001, 0x00000005, 0x40000000, 0x00000000,
+ 0xC68, 0x59791979,
+ 0xA0000000, 0x00000000,
+ 0xC68, 0x59799979,
+ 0xB0000000, 0x00000000,
0xC6C, 0x59795979,
0xC70, 0x19795979,
0xC74, 0x19795979,
0xCA0, 0x00000029,
0xCA4, 0x08040201,
0xCA8, 0x80402010,
- 0xFF0F0740, 0xABCD,
- 0xCB0, 0x77547717,
- 0xFF0F01C0, 0xCDEF,
- 0xCB0, 0x77547717,
- 0xFF0F02C0, 0xCDEF,
- 0xCB0, 0x77547717,
- 0xFF0F07D8, 0xCDEF,
- 0xCB0, 0x54547710,
- 0xFF0F07D0, 0xCDEF,
- 0xCB0, 0x54547710,
- 0xCDCDCDCD, 0xCDCD,
0xCB0, 0x77547777,
- 0xFF0F0740, 0xDEAD,
0xCB4, 0x00000077,
0xCB8, 0x00508242,
0xE00, 0x00000007,
0xEA0, 0x00000029,
0xEA4, 0x08040201,
0xEA8, 0x80402010,
- 0xFF0F0740, 0xABCD,
- 0xEB0, 0x77547717,
- 0xFF0F01C0, 0xCDEF,
- 0xEB0, 0x77547717,
- 0xFF0F02C0, 0xCDEF,
- 0xEB0, 0x77547717,
- 0xFF0F07D8, 0xCDEF,
- 0xEB0, 0x54547710,
- 0xFF0F07D0, 0xCDEF,
- 0xEB0, 0x54547710,
- 0xCDCDCDCD, 0xCDCD,
0xEB0, 0x77547777,
- 0xFF0F0740, 0xDEAD,
0xEB4, 0x00000077,
0xEB8, 0x00508242,
};
+u32 RTL8812AE_PHY_REG_1TARRAYLEN =
+ sizeof(RTL8812AE_PHY_REG_ARRAY) / sizeof(u32);
+
u32 RTL8821AE_PHY_REG_ARRAY[] = {
0x800, 0x0020D090,
0x804, 0x080112E0,
0xCB8, 0x00508240,
};
+u32 RTL8821AE_PHY_REG_1TARRAYLEN =
+ sizeof(RTL8821AE_PHY_REG_ARRAY) / sizeof(u32);
+
u32 RTL8812AE_PHY_REG_ARRAY_PG[] = {
0, 0, 0, 0x00000c20, 0xffffffff, 0x34363840,
0, 0, 0, 0x00000c24, 0xffffffff, 0x42424444,
1, 1, 1, 0x00000e4c, 0xffffffff, 0x22242628
};
+u32 RTL8812AE_PHY_REG_ARRAY_PGLEN =
+ sizeof(RTL8812AE_PHY_REG_ARRAY_PG) / sizeof(u32);
+
u32 RTL8821AE_PHY_REG_ARRAY_PG[] = {
0, 0, 0, 0x00000c20, 0xffffffff, 0x32343638,
0, 0, 0, 0x00000c24, 0xffffffff, 0x36363838,
1, 0, 0, 0x00000c44, 0x0000ffff, 0x00002022
};
+u32 RTL8821AE_PHY_REG_ARRAY_PGLEN =
+ sizeof(RTL8821AE_PHY_REG_ARRAY_PG) / sizeof(u32);
+
u32 RTL8812AE_RADIOA_ARRAY[] = {
0x000, 0x00010000,
0x018, 0x0001712A,
0x066, 0x00040000,
0x01E, 0x00080000,
0x089, 0x00000080,
- 0xFF0F0740, 0xABCD,
- 0x086, 0x00014B38,
- 0xFF0F02C0, 0xCDEF,
- 0x086, 0x00014B38,
- 0xFF0F01C0, 0xCDEF,
- 0x086, 0x00014B38,
- 0xFF0F07D8, 0xCDEF,
+ 0x80000001, 0x00000000, 0x40000000, 0x00000000,
0x086, 0x00014B3A,
- 0xFF0F07D0, 0xCDEF,
+ 0x90000001, 0x00000005, 0x40000000, 0x00000000,
0x086, 0x00014B3A,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x086, 0x00014B38,
- 0xFF0F0740, 0xDEAD,
+ 0xB0000000, 0x00000000,
+ 0x80000004, 0x00000000, 0x40000000, 0x00000000,
+ 0x08B, 0x00080180,
+ 0xA0000000, 0x00000000,
+ 0x08B, 0x00087180,
+ 0xB0000000, 0x00000000,
0x0B1, 0x0001FC1A,
0x0B3, 0x000F0810,
0x0B4, 0x0001A78D,
0x0BA, 0x00086180,
0x018, 0x00000006,
0x0EF, 0x00002000,
- 0xFF0F07D8, 0xABCD,
+ 0x80000001, 0x00000000, 0x40000000, 0x00000000,
0x03B, 0x0003F218,
0x03B, 0x00030A58,
0x03B, 0x0002FA58,
0x03B, 0x0001FA50,
0x03B, 0x00010248,
0x03B, 0x00008240,
- 0xFF0F07D0, 0xCDEF,
+ 0x90000001, 0x00000005, 0x40000000, 0x00000000,
0x03B, 0x0003F218,
0x03B, 0x00030A58,
0x03B, 0x0002FA58,
0x03B, 0x0001FA50,
0x03B, 0x00010248,
0x03B, 0x00008240,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x03B, 0x00038A58,
0x03B, 0x00037A58,
0x03B, 0x0002A590,
0x03B, 0x00018248,
0x03B, 0x00010240,
0x03B, 0x00008240,
- 0xFF0F07D8, 0xDEAD,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000100,
- 0xFF0F07D8, 0xABCD,
+ 0x80000002, 0x00000000, 0x40000000, 0x00000000,
0x034, 0x0000A4EE,
0x034, 0x00009076,
0x034, 0x00008073,
0x034, 0x00002028,
0x034, 0x00001025,
0x034, 0x00000022,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x034, 0x0000ADF4,
0x034, 0x00009DF1,
0x034, 0x00008DEE,
0x034, 0x000024E7,
0x034, 0x0000146B,
0x034, 0x0000006D,
- 0xFF0F07D8, 0xDEAD,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000000,
0x0EF, 0x000020A2,
0x0DF, 0x00000080,
0x03B, 0x0006B064,
0x03C, 0x00004000,
0x03A, 0x000000D8,
- 0x03B, 0x00023070,
+ 0x03B, 0x00063070,
0x03C, 0x00004000,
0x03A, 0x00000468,
0x03B, 0x0005B870,
0x03B, 0x00082080,
0x03C, 0x00010000,
0x0EF, 0x00001100,
- 0xFF0F0740, 0xABCD,
- 0x034, 0x0004A0B2,
- 0x034, 0x000490AF,
- 0x034, 0x00048070,
- 0x034, 0x0004706D,
- 0x034, 0x00046050,
- 0x034, 0x0004504D,
- 0x034, 0x0004404A,
- 0x034, 0x00043047,
- 0x034, 0x0004200A,
- 0x034, 0x00041007,
- 0x034, 0x00040004,
- 0xFF0F02C0, 0xCDEF,
- 0x034, 0x0004A0B2,
- 0x034, 0x000490AF,
- 0x034, 0x00048070,
- 0x034, 0x0004706D,
- 0x034, 0x00046050,
- 0x034, 0x0004504D,
- 0x034, 0x0004404A,
- 0x034, 0x00043047,
- 0x034, 0x0004200A,
- 0x034, 0x00041007,
- 0x034, 0x00040004,
- 0xFF0F01C0, 0xCDEF,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x034, 0x0004A0B2,
0x034, 0x000490AF,
0x034, 0x00048070,
0x034, 0x0004200A,
0x034, 0x00041007,
0x034, 0x00040004,
- 0xFF0F07D8, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x034, 0x0004A0B2,
0x034, 0x000490AF,
0x034, 0x00048070,
0x034, 0x0004706D,
- 0x034, 0x00046050,
- 0x034, 0x0004504D,
- 0x034, 0x0004404A,
- 0x034, 0x00043047,
- 0x034, 0x0004200A,
- 0x034, 0x00041007,
- 0x034, 0x00040004,
- 0xFF0F07D0, 0xCDEF,
- 0x034, 0x0004A0B2,
- 0x034, 0x000490AF,
- 0x034, 0x00048070,
- 0x034, 0x0004706D,
- 0x034, 0x00046050,
- 0x034, 0x0004504D,
- 0x034, 0x0004404A,
- 0x034, 0x00043047,
- 0x034, 0x0004200A,
- 0x034, 0x00041007,
- 0x034, 0x00040004,
- 0xCDCDCDCD, 0xCDCD,
+ 0x034, 0x0004604D,
+ 0x034, 0x0004504A,
+ 0x034, 0x00044047,
+ 0x034, 0x00043044,
+ 0x034, 0x00042007,
+ 0x034, 0x00041004,
+ 0x034, 0x00040001,
+ 0xA0000000, 0x00000000,
0x034, 0x0004ADF5,
0x034, 0x00049DF2,
0x034, 0x00048DEF,
0x034, 0x00047DEC,
0x034, 0x00046DE9,
- 0x034, 0x00045DC9,
- 0x034, 0x00044CE8,
- 0x034, 0x000438CA,
- 0x034, 0x00042889,
- 0x034, 0x0004184A,
- 0x034, 0x0004044A,
- 0xFF0F0740, 0xDEAD,
- 0xFF0F0740, 0xABCD,
- 0x034, 0x0002A0B2,
- 0x034, 0x000290AF,
- 0x034, 0x00028070,
- 0x034, 0x0002706D,
- 0x034, 0x00026050,
- 0x034, 0x0002504D,
- 0x034, 0x0002404A,
- 0x034, 0x00023047,
- 0x034, 0x0002200A,
- 0x034, 0x00021007,
- 0x034, 0x00020004,
- 0xFF0F02C0, 0xCDEF,
- 0x034, 0x0002A0B2,
- 0x034, 0x000290AF,
- 0x034, 0x00028070,
- 0x034, 0x0002706D,
- 0x034, 0x00026050,
- 0x034, 0x0002504D,
- 0x034, 0x0002404A,
- 0x034, 0x00023047,
- 0x034, 0x0002200A,
- 0x034, 0x00021007,
- 0x034, 0x00020004,
- 0xFF0F01C0, 0xCDEF,
- 0x034, 0x0002A0B2,
- 0x034, 0x000290AF,
- 0x034, 0x00028070,
- 0x034, 0x0002706D,
- 0x034, 0x00026050,
- 0x034, 0x0002504D,
- 0x034, 0x0002404A,
- 0x034, 0x00023047,
- 0x034, 0x0002200A,
- 0x034, 0x00021007,
- 0x034, 0x00020004,
- 0xFF0F07D8, 0xCDEF,
- 0x034, 0x0002A0B2,
- 0x034, 0x000290AF,
- 0x034, 0x00028070,
- 0x034, 0x0002706D,
- 0x034, 0x00026050,
- 0x034, 0x0002504D,
- 0x034, 0x0002404A,
- 0x034, 0x00023047,
- 0x034, 0x0002200A,
- 0x034, 0x00021007,
- 0x034, 0x00020004,
- 0xFF0F07D0, 0xCDEF,
+ 0x034, 0x00045DE6,
+ 0x034, 0x00044DE3,
+ 0x034, 0x000438C8,
+ 0x034, 0x000428C5,
+ 0x034, 0x000418C2,
+ 0x034, 0x000408C0,
+ 0xB0000000, 0x00000000,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x034, 0x0002A0B2,
0x034, 0x000290AF,
0x034, 0x00028070,
0x034, 0x0002200A,
0x034, 0x00021007,
0x034, 0x00020004,
- 0xCDCDCDCD, 0xCDCD,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
+ 0x034, 0x0002A0B4,
+ 0x034, 0x000290B1,
+ 0x034, 0x00028072,
+ 0x034, 0x0002706F,
+ 0x034, 0x0002604F,
+ 0x034, 0x0002504C,
+ 0x034, 0x00024049,
+ 0x034, 0x00023046,
+ 0x034, 0x00022009,
+ 0x034, 0x00021006,
+ 0x034, 0x00020003,
+ 0xA0000000, 0x00000000,
0x034, 0x0002ADF5,
0x034, 0x00029DF2,
0x034, 0x00028DEF,
0x034, 0x00027DEC,
0x034, 0x00026DE9,
- 0x034, 0x00025DC9,
- 0x034, 0x00024CE8,
- 0x034, 0x000238CA,
- 0x034, 0x00022889,
- 0x034, 0x0002184A,
- 0x034, 0x0002044A,
- 0xFF0F0740, 0xDEAD,
- 0xFF0F0740, 0xABCD,
- 0x034, 0x0000A0B2,
- 0x034, 0x000090AF,
- 0x034, 0x00008070,
- 0x034, 0x0000706D,
- 0x034, 0x00006050,
- 0x034, 0x0000504D,
- 0x034, 0x0000404A,
- 0x034, 0x00003047,
- 0x034, 0x0000200A,
- 0x034, 0x00001007,
- 0x034, 0x00000004,
- 0xFF0F02C0, 0xCDEF,
+ 0x034, 0x00025DE6,
+ 0x034, 0x00024DE3,
+ 0x034, 0x000238C8,
+ 0x034, 0x000228C5,
+ 0x034, 0x000218C2,
+ 0x034, 0x000208C0,
+ 0xB0000000, 0x00000000,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x034, 0x0000A0B2,
0x034, 0x000090AF,
0x034, 0x00008070,
0x034, 0x0000200A,
0x034, 0x00001007,
0x034, 0x00000004,
- 0xFF0F01C0, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x034, 0x0000A0B2,
0x034, 0x000090AF,
0x034, 0x00008070,
0x034, 0x0000706D,
- 0x034, 0x00006050,
- 0x034, 0x0000504D,
- 0x034, 0x0000404A,
- 0x034, 0x00003047,
- 0x034, 0x0000200A,
- 0x034, 0x00001007,
- 0x034, 0x00000004,
- 0xFF0F07D8, 0xCDEF,
- 0x034, 0x0000A0B2,
- 0x034, 0x000090AF,
- 0x034, 0x00008070,
- 0x034, 0x0000706D,
- 0x034, 0x00006050,
- 0x034, 0x0000504D,
- 0x034, 0x0000404A,
- 0x034, 0x00003047,
- 0x034, 0x0000200A,
- 0x034, 0x00001007,
- 0x034, 0x00000004,
- 0xFF0F07D0, 0xCDEF,
- 0x034, 0x0000A0B2,
- 0x034, 0x000090AF,
- 0x034, 0x00008070,
- 0x034, 0x0000706D,
- 0x034, 0x00006050,
- 0x034, 0x0000504D,
- 0x034, 0x0000404A,
- 0x034, 0x00003047,
- 0x034, 0x0000200A,
- 0x034, 0x00001007,
- 0x034, 0x00000004,
- 0xCDCDCDCD, 0xCDCD,
+ 0x034, 0x0000604D,
+ 0x034, 0x0000504A,
+ 0x034, 0x00004047,
+ 0x034, 0x00003044,
+ 0x034, 0x00002007,
+ 0x034, 0x00001004,
+ 0x034, 0x00000001,
+ 0xA0000000, 0x00000000,
0x034, 0x0000AFF7,
0x034, 0x00009DF7,
0x034, 0x00008DF4,
0x034, 0x00007DF1,
0x034, 0x00006DEE,
- 0x034, 0x00005DCD,
- 0x034, 0x00004CEB,
+ 0x034, 0x00005DEB,
+ 0x034, 0x00004DE8,
0x034, 0x000038CC,
- 0x034, 0x0000288B,
- 0x034, 0x0000184C,
- 0x034, 0x0000044C,
- 0xFF0F0740, 0xDEAD,
+ 0x034, 0x000028C9,
+ 0x034, 0x000018C6,
+ 0x034, 0x000008C3,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000000,
- 0xFF0F0740, 0xABCD,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000040,
- 0x035, 0x000001D4,
- 0x035, 0x000081D4,
- 0x035, 0x000101D4,
- 0x035, 0x000201B4,
- 0x035, 0x000281B4,
- 0x035, 0x000301B4,
- 0x035, 0x000401B4,
- 0x035, 0x000481B4,
- 0x035, 0x000501B4,
- 0xFF0F02C0, 0xCDEF,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000040,
- 0x035, 0x000001D4,
- 0x035, 0x000081D4,
- 0x035, 0x000101D4,
- 0x035, 0x000201B4,
- 0x035, 0x000281B4,
- 0x035, 0x000301B4,
- 0x035, 0x000401B4,
- 0x035, 0x000481B4,
- 0x035, 0x000501B4,
- 0xFF0F01C0, 0xCDEF,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000040,
- 0x035, 0x000001D4,
- 0x035, 0x000081D4,
- 0x035, 0x000101D4,
- 0x035, 0x000201B4,
- 0x035, 0x000281B4,
- 0x035, 0x000301B4,
- 0x035, 0x000401B4,
- 0x035, 0x000481B4,
- 0x035, 0x000501B4,
- 0xFF0F07D8, 0xCDEF,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000040,
0x035, 0x000001D4,
0x035, 0x000401B4,
0x035, 0x000481B4,
0x035, 0x000501B4,
- 0xFF0F07D0, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000040,
0x035, 0x000001D4,
0x035, 0x000401B4,
0x035, 0x000481B4,
0x035, 0x000501B4,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000040,
0x035, 0x00000188,
0x035, 0x000401D8,
0x035, 0x000481D8,
0x035, 0x000501D8,
- 0xFF0F0740, 0xDEAD,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000000,
- 0xFF0F0740, 0xABCD,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000010,
- 0x036, 0x00004BFB,
- 0x036, 0x0000CBFB,
- 0x036, 0x00014BFB,
- 0x036, 0x0001CBFB,
- 0x036, 0x00024F4B,
- 0x036, 0x0002CF4B,
- 0x036, 0x00034F4B,
- 0x036, 0x0003CF4B,
- 0x036, 0x00044F4B,
- 0x036, 0x0004CF4B,
- 0x036, 0x00054F4B,
- 0x036, 0x0005CF4B,
- 0xFF0F02C0, 0xCDEF,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000010,
- 0x036, 0x00004BFB,
- 0x036, 0x0000CBFB,
- 0x036, 0x00014BFB,
- 0x036, 0x0001CBFB,
- 0x036, 0x00024F4B,
- 0x036, 0x0002CF4B,
- 0x036, 0x00034F4B,
- 0x036, 0x0003CF4B,
- 0x036, 0x00044F4B,
- 0x036, 0x0004CF4B,
- 0x036, 0x00054F4B,
- 0x036, 0x0005CF4B,
- 0xFF0F01C0, 0xCDEF,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000010,
- 0x036, 0x00004BFB,
- 0x036, 0x0000CBFB,
- 0x036, 0x00014BFB,
- 0x036, 0x0001CBFB,
- 0x036, 0x00024F4B,
- 0x036, 0x0002CF4B,
- 0x036, 0x00034F4B,
- 0x036, 0x0003CF4B,
- 0x036, 0x00044F4B,
- 0x036, 0x0004CF4B,
- 0x036, 0x00054F4B,
- 0x036, 0x0005CF4B,
- 0xFF0F07D8, 0xCDEF,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000010,
0x036, 0x00004BFB,
0x036, 0x0004CF4B,
0x036, 0x00054F4B,
0x036, 0x0005CF4B,
- 0xFF0F07D0, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000010,
0x036, 0x00004BFB,
0x036, 0x0004CF4B,
0x036, 0x00054F4B,
0x036, 0x0005CF4B,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000010,
0x036, 0x00084EB4,
0x036, 0x0008CC35,
0x036, 0x00094C35,
0x036, 0x0009CC35,
- 0x036, 0x000A4935,
+ 0x036, 0x000A4C35,
0x036, 0x000ACC35,
0x036, 0x000B4C35,
0x036, 0x000BCC35,
- 0x036, 0x000C4EB4,
- 0x036, 0x000CCEB5,
- 0x036, 0x000D4EB5,
- 0x036, 0x000DCEB5,
- 0xFF0F0740, 0xDEAD,
+ 0x036, 0x000C4C34,
+ 0x036, 0x000CCC35,
+ 0x036, 0x000D4C35,
+ 0x036, 0x000DCC35,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000000,
0x0EF, 0x00000008,
- 0xFF0F0740, 0xABCD,
- 0x03C, 0x000002CC,
- 0x03C, 0x00000522,
- 0x03C, 0x00000902,
- 0xFF0F02C0, 0xCDEF,
- 0x03C, 0x000002CC,
- 0x03C, 0x00000522,
- 0x03C, 0x00000902,
- 0xFF0F01C0, 0xCDEF,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x03C, 0x000002CC,
0x03C, 0x00000522,
0x03C, 0x00000902,
- 0xFF0F07D8, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x03C, 0x000002CC,
0x03C, 0x00000522,
0x03C, 0x00000902,
- 0xFF0F07D0, 0xCDEF,
- 0x03C, 0x000002CC,
- 0x03C, 0x00000522,
- 0x03C, 0x00000902,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x03C, 0x000002A8,
0x03C, 0x000005A2,
0x03C, 0x00000880,
- 0xFF0F0740, 0xDEAD,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000002,
0x0DF, 0x00000080,
- 0x01F, 0x00040064,
- 0xFF0F0740, 0xABCD,
- 0x061, 0x000FDD43,
- 0x062, 0x00038F4B,
- 0x063, 0x00032117,
- 0x064, 0x000194AC,
- 0x065, 0x000931D1,
- 0xFF0F02C0, 0xCDEF,
+ 0x01F, 0x00000064,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x061, 0x000FDD43,
0x062, 0x00038F4B,
0x063, 0x00032117,
0x064, 0x000194AC,
0x065, 0x000931D1,
- 0xFF0F01C0, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x061, 0x000FDD43,
0x062, 0x00038F4B,
0x063, 0x00032117,
0x064, 0x000194AC,
- 0x065, 0x000931D1,
- 0xFF0F07D8, 0xCDEF,
- 0x061, 0x000FDD43,
- 0x062, 0x00038F4B,
- 0x063, 0x00032117,
- 0x064, 0x000194AC,
- 0x065, 0x000931D1,
- 0xFF0F07D0, 0xCDEF,
- 0x061, 0x000FDD43,
- 0x062, 0x00038F4B,
- 0x063, 0x00032117,
- 0x064, 0x000194AC,
- 0x065, 0x000931D1,
- 0xCDCDCDCD, 0xCDCD,
+ 0x065, 0x000931D2,
+ 0xA0000000, 0x00000000,
0x061, 0x000E5D53,
0x062, 0x00038FCD,
- 0x063, 0x000314EB,
+ 0x063, 0x000114EB,
0x064, 0x000196AC,
0x065, 0x000911D7,
- 0xFF0F0740, 0xDEAD,
+ 0xB0000000, 0x00000000,
0x008, 0x00008400,
0x01C, 0x000739D2,
0x0B4, 0x0001E78D,
0x0FE, 0x00000000,
0x0B4, 0x0001A78D,
0x018, 0x0001712A,
-
};
+u32 RTL8812AE_RADIOA_1TARRAYLEN = sizeof(RTL8812AE_RADIOA_ARRAY) / sizeof(u32);
+
u32 RTL8812AE_RADIOB_ARRAY[] = {
0x056, 0x00051CF2,
0x066, 0x00040000,
0x089, 0x00000080,
- 0xFF0F0740, 0xABCD,
- 0x086, 0x00014B38,
- 0xFF0F01C0, 0xCDEF,
- 0x086, 0x00014B38,
- 0xFF0F02C0, 0xCDEF,
- 0x086, 0x00014B38,
- 0xFF0F07D8, 0xCDEF,
+ 0x80000001, 0x00000000, 0x40000000, 0x00000000,
0x086, 0x00014B3A,
- 0xFF0F07D0, 0xCDEF,
+ 0x90000001, 0x00000005, 0x40000000, 0x00000000,
0x086, 0x00014B3A,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x086, 0x00014B38,
- 0xFF0F0740, 0xDEAD,
+ 0xB0000000, 0x00000000,
+ 0x80000004, 0x00000000, 0x40000000, 0x00000000,
+ 0x08B, 0x00080180,
+ 0xA0000000, 0x00000000,
+ 0x08B, 0x00087180,
+ 0xB0000000, 0x00000000,
0x018, 0x00000006,
0x0EF, 0x00002000,
- 0xFF0F07D8, 0xABCD,
+ 0x80000001, 0x00000000, 0x40000000, 0x00000000,
0x03B, 0x0003F218,
0x03B, 0x00030A58,
0x03B, 0x0002FA58,
0x03B, 0x0001FA50,
0x03B, 0x00010248,
0x03B, 0x00008240,
- 0xFF0F07D0, 0xCDEF,
+ 0x90000001, 0x00000005, 0x40000000, 0x00000000,
0x03B, 0x0003F218,
0x03B, 0x00030A58,
0x03B, 0x0002FA58,
0x03B, 0x0001FA50,
0x03B, 0x00010248,
0x03B, 0x00008240,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x03B, 0x00038A58,
0x03B, 0x00037A58,
0x03B, 0x0002A590,
0x03B, 0x00018248,
0x03B, 0x00010240,
0x03B, 0x00008240,
- 0xFF0F07D8, 0xDEAD,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000100,
- 0xFF0F07D8, 0xABCD,
+ 0x80000002, 0x00000000, 0x40000000, 0x00000000,
0x034, 0x0000A4EE,
0x034, 0x00009076,
0x034, 0x00008073,
0x034, 0x00002028,
0x034, 0x00001025,
0x034, 0x00000022,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x034, 0x0000ADF4,
0x034, 0x00009DF1,
0x034, 0x00008DEE,
0x034, 0x000024E7,
0x034, 0x0000146B,
0x034, 0x0000006D,
- 0xFF0F07D8, 0xDEAD,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000000,
0x0EF, 0x000020A2,
0x0DF, 0x00000080,
0x03B, 0x00082080,
0x03C, 0x00010000,
0x0EF, 0x00001100,
- 0xFF0F0740, 0xABCD,
- 0x034, 0x0004A0B2,
- 0x034, 0x000490AF,
- 0x034, 0x00048070,
- 0x034, 0x0004706D,
- 0x034, 0x00046050,
- 0x034, 0x0004504D,
- 0x034, 0x0004404A,
- 0x034, 0x00043047,
- 0x034, 0x0004200A,
- 0x034, 0x00041007,
- 0x034, 0x00040004,
- 0xFF0F01C0, 0xCDEF,
- 0x034, 0x0004A0B2,
- 0x034, 0x000490AF,
- 0x034, 0x00048070,
- 0x034, 0x0004706D,
- 0x034, 0x00046050,
- 0x034, 0x0004504D,
- 0x034, 0x0004404A,
- 0x034, 0x00043047,
- 0x034, 0x0004200A,
- 0x034, 0x00041007,
- 0x034, 0x00040004,
- 0xFF0F02C0, 0xCDEF,
- 0x034, 0x0004A0B2,
- 0x034, 0x000490AF,
- 0x034, 0x00048070,
- 0x034, 0x0004706D,
- 0x034, 0x00046050,
- 0x034, 0x0004504D,
- 0x034, 0x0004404A,
- 0x034, 0x00043047,
- 0x034, 0x0004200A,
- 0x034, 0x00041007,
- 0x034, 0x00040004,
- 0xFF0F07D8, 0xCDEF,
- 0x034, 0x0004A0B2,
- 0x034, 0x000490AF,
- 0x034, 0x00048070,
- 0x034, 0x0004706D,
- 0x034, 0x00046050,
- 0x034, 0x0004504D,
- 0x034, 0x0004404A,
- 0x034, 0x00043047,
- 0x034, 0x0004200A,
- 0x034, 0x00041007,
- 0x034, 0x00040004,
- 0xFF0F07D0, 0xCDEF,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x034, 0x0004A0B2,
0x034, 0x000490AF,
0x034, 0x00048070,
0x034, 0x0004200A,
0x034, 0x00041007,
0x034, 0x00040004,
- 0xCDCDCDCD, 0xCDCD,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
+ 0x034, 0x0004A0B1,
+ 0x034, 0x000490AE,
+ 0x034, 0x0004806F,
+ 0x034, 0x0004706C,
+ 0x034, 0x0004604C,
+ 0x034, 0x00045049,
+ 0x034, 0x00044046,
+ 0x034, 0x00043043,
+ 0x034, 0x00042006,
+ 0x034, 0x00041003,
+ 0x034, 0x00040000,
+ 0xA0000000, 0x00000000,
0x034, 0x0004ADF5,
0x034, 0x00049DF2,
0x034, 0x00048DEF,
0x034, 0x00047DEC,
0x034, 0x00046DE9,
- 0x034, 0x00045DC9,
- 0x034, 0x00044CE8,
- 0x034, 0x000438CA,
- 0x034, 0x00042889,
- 0x034, 0x0004184A,
- 0x034, 0x0004044A,
- 0xFF0F0740, 0xDEAD,
- 0xFF0F0740, 0xABCD,
- 0x034, 0x0002A0B2,
- 0x034, 0x000290AF,
- 0x034, 0x00028070,
- 0x034, 0x0002706D,
- 0x034, 0x00026050,
- 0x034, 0x0002504D,
- 0x034, 0x0002404A,
- 0x034, 0x00023047,
- 0x034, 0x0002200A,
- 0x034, 0x00021007,
- 0x034, 0x00020004,
- 0xFF0F01C0, 0xCDEF,
- 0x034, 0x0002A0B2,
- 0x034, 0x000290AF,
- 0x034, 0x00028070,
- 0x034, 0x0002706D,
- 0x034, 0x00026050,
- 0x034, 0x0002504D,
- 0x034, 0x0002404A,
- 0x034, 0x00023047,
- 0x034, 0x0002200A,
- 0x034, 0x00021007,
- 0x034, 0x00020004,
- 0xFF0F02C0, 0xCDEF,
- 0x034, 0x0002A0B2,
- 0x034, 0x000290AF,
- 0x034, 0x00028070,
- 0x034, 0x0002706D,
- 0x034, 0x00026050,
- 0x034, 0x0002504D,
- 0x034, 0x0002404A,
- 0x034, 0x00023047,
- 0x034, 0x0002200A,
- 0x034, 0x00021007,
- 0x034, 0x00020004,
- 0xFF0F07D8, 0xCDEF,
- 0x034, 0x0002A0B2,
- 0x034, 0x000290AF,
- 0x034, 0x00028070,
- 0x034, 0x0002706D,
- 0x034, 0x00026050,
- 0x034, 0x0002504D,
- 0x034, 0x0002404A,
- 0x034, 0x00023047,
- 0x034, 0x0002200A,
- 0x034, 0x00021007,
- 0x034, 0x00020004,
- 0xFF0F07D0, 0xCDEF,
+ 0x034, 0x00045DE6,
+ 0x034, 0x00044DE3,
+ 0x034, 0x000438C8,
+ 0x034, 0x000428C5,
+ 0x034, 0x000418C2,
+ 0x034, 0x000408C0,
+ 0xB0000000, 0x00000000,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x034, 0x0002A0B2,
0x034, 0x000290AF,
0x034, 0x00028070,
0x034, 0x0002200A,
0x034, 0x00021007,
0x034, 0x00020004,
- 0xCDCDCDCD, 0xCDCD,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
+ 0x034, 0x0002A0B3,
+ 0x034, 0x000290B0,
+ 0x034, 0x00028071,
+ 0x034, 0x0002706E,
+ 0x034, 0x0002604E,
+ 0x034, 0x0002504B,
+ 0x034, 0x00024048,
+ 0x034, 0x00023045,
+ 0x034, 0x00022008,
+ 0x034, 0x00021005,
+ 0x034, 0x00020002,
+ 0xA0000000, 0x00000000,
0x034, 0x0002ADF5,
0x034, 0x00029DF2,
0x034, 0x00028DEF,
0x034, 0x00027DEC,
0x034, 0x00026DE9,
- 0x034, 0x00025DC9,
- 0x034, 0x00024CE8,
- 0x034, 0x000238CA,
- 0x034, 0x00022889,
- 0x034, 0x0002184A,
- 0x034, 0x0002044A,
- 0xFF0F0740, 0xDEAD,
- 0xFF0F0740, 0xABCD,
- 0x034, 0x0000A0B2,
- 0x034, 0x000090AF,
- 0x034, 0x00008070,
- 0x034, 0x0000706D,
- 0x034, 0x00006050,
- 0x034, 0x0000504D,
- 0x034, 0x0000404A,
- 0x034, 0x00003047,
- 0x034, 0x0000200A,
- 0x034, 0x00001007,
- 0x034, 0x00000004,
- 0xFF0F01C0, 0xCDEF,
- 0x034, 0x0000A0B2,
- 0x034, 0x000090AF,
- 0x034, 0x00008070,
- 0x034, 0x0000706D,
- 0x034, 0x00006050,
- 0x034, 0x0000504D,
- 0x034, 0x0000404A,
- 0x034, 0x00003047,
- 0x034, 0x0000200A,
- 0x034, 0x00001007,
- 0x034, 0x00000004,
- 0xFF0F02C0, 0xCDEF,
- 0x034, 0x0000A0B2,
- 0x034, 0x000090AF,
- 0x034, 0x00008070,
- 0x034, 0x0000706D,
- 0x034, 0x00006050,
- 0x034, 0x0000504D,
- 0x034, 0x0000404A,
- 0x034, 0x00003047,
- 0x034, 0x0000200A,
- 0x034, 0x00001007,
- 0x034, 0x00000004,
- 0xFF0F07D8, 0xCDEF,
+ 0x034, 0x00025DE6,
+ 0x034, 0x00024DE3,
+ 0x034, 0x000238C8,
+ 0x034, 0x000228C5,
+ 0x034, 0x000218C2,
+ 0x034, 0x000208C0,
+ 0xB0000000, 0x00000000,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x034, 0x0000A0B2,
0x034, 0x000090AF,
0x034, 0x00008070,
0x034, 0x0000200A,
0x034, 0x00001007,
0x034, 0x00000004,
- 0xFF0F07D0, 0xCDEF,
- 0x034, 0x0000A0B2,
- 0x034, 0x000090AF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
+ 0x034, 0x0000A0B3,
+ 0x034, 0x000090B0,
0x034, 0x00008070,
0x034, 0x0000706D,
- 0x034, 0x00006050,
- 0x034, 0x0000504D,
- 0x034, 0x0000404A,
- 0x034, 0x00003047,
- 0x034, 0x0000200A,
- 0x034, 0x00001007,
- 0x034, 0x00000004,
- 0xCDCDCDCD, 0xCDCD,
+ 0x034, 0x0000604D,
+ 0x034, 0x0000504A,
+ 0x034, 0x00004047,
+ 0x034, 0x00003044,
+ 0x034, 0x00002007,
+ 0x034, 0x00001004,
+ 0x034, 0x00000001,
+ 0xA0000000, 0x00000000,
0x034, 0x0000AFF7,
0x034, 0x00009DF7,
0x034, 0x00008DF4,
0x034, 0x00007DF1,
0x034, 0x00006DEE,
- 0x034, 0x00005DCD,
- 0x034, 0x00004CEB,
+ 0x034, 0x00005DEB,
+ 0x034, 0x00004DE8,
0x034, 0x000038CC,
- 0x034, 0x0000288B,
- 0x034, 0x0000184C,
- 0x034, 0x0000044C,
- 0xFF0F0740, 0xDEAD,
- 0x0EF, 0x00000000,
- 0xFF0F0740, 0xABCD,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000040,
- 0x035, 0x000001C5,
- 0x035, 0x000081C5,
- 0x035, 0x000101C5,
- 0x035, 0x00020174,
- 0x035, 0x00028174,
- 0x035, 0x00030174,
- 0x035, 0x00040185,
- 0x035, 0x00048185,
- 0x035, 0x00050185,
- 0x0EF, 0x00000000,
- 0xFF0F01C0, 0xCDEF,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000040,
- 0x035, 0x000001C5,
- 0x035, 0x000081C5,
- 0x035, 0x000101C5,
- 0x035, 0x00020174,
- 0x035, 0x00028174,
- 0x035, 0x00030174,
- 0x035, 0x00040185,
- 0x035, 0x00048185,
- 0x035, 0x00050185,
- 0x0EF, 0x00000000,
- 0xFF0F02C0, 0xCDEF,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000040,
- 0x035, 0x000001C5,
- 0x035, 0x000081C5,
- 0x035, 0x000101C5,
- 0x035, 0x00020174,
- 0x035, 0x00028174,
- 0x035, 0x00030174,
- 0x035, 0x00040185,
- 0x035, 0x00048185,
- 0x035, 0x00050185,
+ 0x034, 0x000028C9,
+ 0x034, 0x000018C6,
+ 0x034, 0x000008C3,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000000,
- 0xFF0F07D8, 0xCDEF,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000040,
0x035, 0x000001C5,
0x035, 0x00048185,
0x035, 0x00050185,
0x0EF, 0x00000000,
- 0xFF0F07D0, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000040,
0x035, 0x000001C5,
0x035, 0x00048185,
0x035, 0x00050185,
0x0EF, 0x00000000,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000040,
- 0x035, 0x00000186,
- 0x035, 0x00008186,
- 0x035, 0x00010185,
- 0x035, 0x000201D5,
- 0x035, 0x000281D5,
- 0x035, 0x000301D5,
- 0x035, 0x000401D5,
- 0x035, 0x000481D5,
- 0x035, 0x000501D5,
+ 0x035, 0x00000188,
+ 0x035, 0x00008147,
+ 0x035, 0x00010147,
+ 0x035, 0x000201D7,
+ 0x035, 0x000281D7,
+ 0x035, 0x000301D7,
+ 0x035, 0x000401D8,
+ 0x035, 0x000481D8,
+ 0x035, 0x000501D8,
0x0EF, 0x00000000,
- 0xFF0F0740, 0xDEAD,
- 0xFF0F0740, 0xABCD,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000010,
- 0x036, 0x00005B8B,
- 0x036, 0x0000DB8B,
- 0x036, 0x00015B8B,
- 0x036, 0x0001DB8B,
- 0x036, 0x000262DB,
- 0x036, 0x0002E2DB,
- 0x036, 0x000362DB,
- 0x036, 0x0003E2DB,
- 0x036, 0x0004553B,
- 0x036, 0x0004D53B,
- 0x036, 0x0005553B,
- 0x036, 0x0005D53B,
- 0xFF0F01C0, 0xCDEF,
+ 0xB0000000, 0x00000000,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000010,
0x036, 0x00005B8B,
0x036, 0x0004D53B,
0x036, 0x0005553B,
0x036, 0x0005D53B,
- 0xFF0F02C0, 0xCDEF,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000010,
- 0x036, 0x00005B8B,
- 0x036, 0x0000DB8B,
- 0x036, 0x00015B8B,
- 0x036, 0x0001DB8B,
- 0x036, 0x000262DB,
- 0x036, 0x0002E2DB,
- 0x036, 0x000362DB,
- 0x036, 0x0003E2DB,
- 0x036, 0x0004553B,
- 0x036, 0x0004D53B,
- 0x036, 0x0005553B,
- 0x036, 0x0005D53B,
- 0xFF0F07D8, 0xCDEF,
- 0x018, 0x0001712A,
- 0x0EF, 0x00000010,
- 0x036, 0x00005B8B,
- 0x036, 0x0000DB8B,
- 0x036, 0x00015B8B,
- 0x036, 0x0001DB8B,
- 0x036, 0x000262DB,
- 0x036, 0x0002E2DB,
- 0x036, 0x000362DB,
- 0x036, 0x0003E2DB,
- 0x036, 0x0004553B,
- 0x036, 0x0004D53B,
- 0x036, 0x0005553B,
- 0x036, 0x0005D53B,
- 0xFF0F07D0, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000010,
0x036, 0x00005B8B,
0x036, 0x0004D53B,
0x036, 0x0005553B,
0x036, 0x0005D53B,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000010,
0x036, 0x00084EB4,
- 0x036, 0x0008C9B4,
- 0x036, 0x000949B4,
- 0x036, 0x0009C9B4,
- 0x036, 0x000A4935,
- 0x036, 0x000AC935,
- 0x036, 0x000B4935,
- 0x036, 0x000BC935,
- 0x036, 0x000C4EB4,
- 0x036, 0x000CCEB4,
- 0x036, 0x000D4EB4,
- 0x036, 0x000DCEB4,
- 0xFF0F0740, 0xDEAD,
- 0x0EF, 0x00000000,
- 0x0EF, 0x00000008,
- 0xFF0F0740, 0xABCD,
- 0x03C, 0x000002DC,
- 0x03C, 0x00000524,
- 0x03C, 0x00000902,
- 0xFF0F01C0, 0xCDEF,
- 0x03C, 0x000002DC,
- 0x03C, 0x00000524,
- 0x03C, 0x00000902,
- 0xFF0F02C0, 0xCDEF,
- 0x03C, 0x000002DC,
- 0x03C, 0x00000524,
- 0x03C, 0x00000902,
- 0xFF0F07D8, 0xCDEF,
+ 0x036, 0x0008CC35,
+ 0x036, 0x00094C35,
+ 0x036, 0x0009CC35,
+ 0x036, 0x000A4C35,
+ 0x036, 0x000ACC35,
+ 0x036, 0x000B4C35,
+ 0x036, 0x000BCC35,
+ 0x036, 0x000C4C34,
+ 0x036, 0x000CCC35,
+ 0x036, 0x000D4C35,
+ 0x036, 0x000DCC35,
+ 0xB0000000, 0x00000000,
+ 0x0EF, 0x00000000,
+ 0x0EF, 0x00000008,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x03C, 0x000002DC,
0x03C, 0x00000524,
0x03C, 0x00000902,
- 0xFF0F07D0, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x03C, 0x000002DC,
0x03C, 0x00000524,
0x03C, 0x00000902,
- 0xCDCDCDCD, 0xCDCD,
- 0x03C, 0x000002AA,
+ 0xA0000000, 0x00000000,
+ 0x03C, 0x000002A8,
0x03C, 0x000005A2,
0x03C, 0x00000880,
- 0xFF0F0740, 0xDEAD,
+ 0xB0000000, 0x00000000,
0x0EF, 0x00000000,
0x018, 0x0001712A,
0x0EF, 0x00000002,
0x0DF, 0x00000080,
- 0xFF0F0740, 0xABCD,
- 0x061, 0x000EAC43,
- 0x062, 0x00038F47,
- 0x063, 0x00031157,
- 0x064, 0x0001C4AC,
- 0x065, 0x000931D1,
- 0xFF0F01C0, 0xCDEF,
- 0x061, 0x000EAC43,
- 0x062, 0x00038F47,
- 0x063, 0x00031157,
- 0x064, 0x0001C4AC,
- 0x065, 0x000931D1,
- 0xFF0F02C0, 0xCDEF,
+ 0x80000008, 0x00000000, 0x40000000, 0x00000000,
0x061, 0x000EAC43,
0x062, 0x00038F47,
0x063, 0x00031157,
0x064, 0x0001C4AC,
0x065, 0x000931D1,
- 0xFF0F07D8, 0xCDEF,
+ 0x90000008, 0x05000000, 0x40000000, 0x00000000,
0x061, 0x000EAC43,
0x062, 0x00038F47,
0x063, 0x00031157,
0x064, 0x0001C4AC,
- 0x065, 0x000931D1,
- 0xFF0F07D0, 0xCDEF,
+ 0x065, 0x000931D2,
+ 0x90000002, 0x00000000, 0x40000000, 0x00000000,
0x061, 0x000EAC43,
0x062, 0x00038F47,
0x063, 0x00031157,
0x064, 0x0001C4AC,
0x065, 0x000931D1,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x061, 0x000E5D53,
0x062, 0x00038FCD,
- 0x063, 0x000314EB,
+ 0x063, 0x000114EB,
0x064, 0x000196AC,
- 0x065, 0x000931D7,
- 0xFF0F0740, 0xDEAD,
+ 0x065, 0x000911D7,
+ 0xB0000000, 0x00000000,
0x008, 0x00008400,
-
};
+u32 RTL8812AE_RADIOB_1TARRAYLEN = sizeof(RTL8812AE_RADIOB_ARRAY) / sizeof(u32);
+
u32 RTL8821AE_RADIOA_ARRAY[] = {
0x018, 0x0001712A,
0x056, 0x00051CF2,
0x0EF, 0x00000000,
0x0EF, 0x00000100,
0x034, 0x0000ADF3,
- 0x034, 0x00009DEF,
- 0x034, 0x00008DEC,
- 0x034, 0x00007DE9,
- 0x034, 0x00006CED,
- 0x034, 0x00005CE9,
- 0x034, 0x000044E9,
- 0x034, 0x000034E6,
- 0x034, 0x0000246A,
- 0x034, 0x00001467,
- 0x034, 0x00000068,
+ 0x034, 0x00009DF0,
+ 0x034, 0x00008D70,
+ 0x034, 0x00007D6D,
+ 0x034, 0x00006CEE,
+ 0x034, 0x00005CCC,
+ 0x034, 0x000044EC,
+ 0x034, 0x000034AC,
+ 0x034, 0x0000246D,
+ 0x034, 0x0000106F,
+ 0x034, 0x0000006C,
0x0EF, 0x00000000,
0x0ED, 0x00000010,
0x044, 0x0000ADF2,
0x0FE, 0x00000000,
0x0FE, 0x00000000,
0x018, 0x0001712A,
+
};
+u32 RTL8821AE_RADIOA_1TARRAYLEN = sizeof(RTL8821AE_RADIOA_ARRAY) / sizeof(u32);
+
u32 RTL8812AE_MAC_REG_ARRAY[] = {
0x010, 0x0000000C,
- 0xFF0F0180, 0xABCD,
+ 0x80000200, 0x00000000, 0x40000000, 0x00000000,
+ 0x011, 0x00000066,
+ 0xA0000000, 0x00000000,
+ 0x011, 0x0000005A,
+ 0xB0000000, 0x00000000,
0x025, 0x0000000F,
- 0xFF0F01C0, 0xCDEF,
- 0x025, 0x0000000F,
- 0xCDCDCDCD, 0xCDCD,
- 0x025, 0x0000006F,
- 0xFF0F0180, 0xDEAD,
0x072, 0x00000000,
+ 0x420, 0x00000080,
0x428, 0x0000000A,
0x429, 0x00000010,
0x430, 0x00000000,
0x559, 0x00000002,
0x55C, 0x00000050,
0x55D, 0x000000FF,
- 0x604, 0x00000001,
+ 0x604, 0x00000009,
0x605, 0x00000030,
0x607, 0x00000003,
0x608, 0x0000000E,
0x70A, 0x00000065,
0x70B, 0x00000087,
0x718, 0x00000040,
-
};
+u32 RTL8812AE_MAC_1T_ARRAYLEN = sizeof(RTL8812AE_MAC_REG_ARRAY) / sizeof(u32);
+
u32 RTL8821AE_MAC_REG_ARRAY[] = {
0x428, 0x0000000A,
0x429, 0x00000010,
0x500, 0x00000026,
0x501, 0x000000A2,
0x502, 0x0000002F,
- 0x503, 0x00000000,
- 0x504, 0x00000028,
- 0x505, 0x000000A3,
- 0x506, 0x0000005E,
- 0x507, 0x00000000,
- 0x508, 0x0000002B,
- 0x509, 0x000000A4,
- 0x50A, 0x0000005E,
- 0x50B, 0x00000000,
- 0x50C, 0x0000004F,
- 0x50D, 0x000000A4,
- 0x50E, 0x00000000,
- 0x50F, 0x00000000,
- 0x512, 0x0000001C,
- 0x514, 0x0000000A,
- 0x516, 0x0000000A,
- 0x525, 0x0000004F,
- 0x550, 0x00000010,
- 0x551, 0x00000010,
- 0x559, 0x00000002,
- 0x55C, 0x00000050,
- 0x55D, 0x000000FF,
- 0x605, 0x00000030,
- 0x607, 0x00000007,
- 0x608, 0x0000000E,
- 0x609, 0x0000002A,
- 0x620, 0x000000FF,
- 0x621, 0x000000FF,
- 0x622, 0x000000FF,
- 0x623, 0x000000FF,
- 0x624, 0x000000FF,
- 0x625, 0x000000FF,
- 0x626, 0x000000FF,
- 0x627, 0x000000FF,
- 0x638, 0x00000050,
- 0x63C, 0x0000000A,
- 0x63D, 0x0000000A,
- 0x63E, 0x0000000E,
- 0x63F, 0x0000000E,
- 0x640, 0x00000040,
- 0x642, 0x00000040,
- 0x643, 0x00000000,
- 0x652, 0x000000C8,
- 0x66E, 0x00000005,
- 0x700, 0x00000021,
- 0x701, 0x00000043,
- 0x702, 0x00000065,
- 0x703, 0x00000087,
- 0x708, 0x00000021,
- 0x709, 0x00000043,
- 0x70A, 0x00000065,
- 0x70B, 0x00000087,
- 0x718, 0x00000040,
-};
-
-u32 RTL8812AE_AGC_TAB_ARRAY[] = {
- 0xFF0F07D8, 0xABCD,
- 0x81C, 0xFC000001,
- 0x81C, 0xFB020001,
- 0x81C, 0xFA040001,
- 0x81C, 0xF9060001,
- 0x81C, 0xF8080001,
- 0x81C, 0xF70A0001,
- 0x81C, 0xF60C0001,
- 0x81C, 0xF50E0001,
- 0x81C, 0xF4100001,
- 0x81C, 0xF3120001,
- 0x81C, 0xF2140001,
- 0x81C, 0xF1160001,
- 0x81C, 0xF0180001,
- 0x81C, 0xEF1A0001,
- 0x81C, 0xEE1C0001,
- 0x81C, 0xED1E0001,
- 0x81C, 0xEC200001,
- 0x81C, 0xEB220001,
- 0x81C, 0xEA240001,
- 0x81C, 0xCD260001,
- 0x81C, 0xCC280001,
- 0x81C, 0xCB2A0001,
- 0x81C, 0xCA2C0001,
- 0x81C, 0xC92E0001,
- 0x81C, 0xC8300001,
- 0x81C, 0xA6320001,
- 0x81C, 0xA5340001,
- 0x81C, 0xA4360001,
- 0x81C, 0xA3380001,
- 0x81C, 0xA23A0001,
- 0x81C, 0x883C0001,
- 0x81C, 0x873E0001,
- 0x81C, 0x86400001,
- 0x81C, 0x85420001,
- 0x81C, 0x84440001,
- 0x81C, 0x83460001,
- 0x81C, 0x82480001,
- 0x81C, 0x814A0001,
- 0x81C, 0x484C0001,
- 0x81C, 0x474E0001,
- 0x81C, 0x46500001,
- 0x81C, 0x45520001,
- 0x81C, 0x44540001,
- 0x81C, 0x43560001,
- 0x81C, 0x42580001,
- 0x81C, 0x415A0001,
- 0x81C, 0x255C0001,
- 0x81C, 0x245E0001,
- 0x81C, 0x23600001,
- 0x81C, 0x22620001,
- 0x81C, 0x21640001,
- 0x81C, 0x21660001,
- 0x81C, 0x21680001,
- 0x81C, 0x216A0001,
- 0x81C, 0x216C0001,
- 0x81C, 0x216E0001,
- 0x81C, 0x21700001,
- 0x81C, 0x21720001,
- 0x81C, 0x21740001,
- 0x81C, 0x21760001,
- 0x81C, 0x21780001,
- 0x81C, 0x217A0001,
- 0x81C, 0x217C0001,
- 0x81C, 0x217E0001,
- 0xFF0F07D0, 0xCDEF,
- 0x81C, 0xF9000001,
- 0x81C, 0xF8020001,
- 0x81C, 0xF7040001,
- 0x81C, 0xF6060001,
- 0x81C, 0xF5080001,
- 0x81C, 0xF40A0001,
- 0x81C, 0xF30C0001,
- 0x81C, 0xF20E0001,
- 0x81C, 0xF1100001,
- 0x81C, 0xF0120001,
- 0x81C, 0xEF140001,
- 0x81C, 0xEE160001,
- 0x81C, 0xED180001,
- 0x81C, 0xEC1A0001,
- 0x81C, 0xEB1C0001,
- 0x81C, 0xEA1E0001,
- 0x81C, 0xCD200001,
- 0x81C, 0xCC220001,
- 0x81C, 0xCB240001,
- 0x81C, 0xCA260001,
- 0x81C, 0xC9280001,
- 0x81C, 0xC82A0001,
- 0x81C, 0xC72C0001,
- 0x81C, 0xC62E0001,
- 0x81C, 0xA5300001,
- 0x81C, 0xA4320001,
- 0x81C, 0xA3340001,
- 0x81C, 0xA2360001,
- 0x81C, 0x88380001,
- 0x81C, 0x873A0001,
- 0x81C, 0x863C0001,
- 0x81C, 0x853E0001,
- 0x81C, 0x84400001,
- 0x81C, 0x83420001,
- 0x81C, 0x82440001,
- 0x81C, 0x81460001,
- 0x81C, 0x48480001,
- 0x81C, 0x474A0001,
- 0x81C, 0x464C0001,
- 0x81C, 0x454E0001,
- 0x81C, 0x44500001,
- 0x81C, 0x43520001,
- 0x81C, 0x42540001,
- 0x81C, 0x41560001,
- 0x81C, 0x25580001,
- 0x81C, 0x245A0001,
- 0x81C, 0x235C0001,
- 0x81C, 0x225E0001,
- 0x81C, 0x21600001,
- 0x81C, 0x21620001,
- 0x81C, 0x21640001,
- 0x81C, 0x21660001,
- 0x81C, 0x21680001,
- 0x81C, 0x216A0001,
- 0x81C, 0x236C0001,
- 0x81C, 0x226E0001,
- 0x81C, 0x21700001,
- 0x81C, 0x21720001,
- 0x81C, 0x21740001,
- 0x81C, 0x21760001,
- 0x81C, 0x21780001,
- 0x81C, 0x217A0001,
- 0x81C, 0x217C0001,
- 0x81C, 0x217E0001,
- 0xCDCDCDCD, 0xCDCD,
- 0x81C, 0xFF000001,
- 0x81C, 0xFF020001,
- 0x81C, 0xFF040001,
- 0x81C, 0xFF060001,
- 0x81C, 0xFF080001,
- 0x81C, 0xFE0A0001,
- 0x81C, 0xFD0C0001,
- 0x81C, 0xFC0E0001,
- 0x81C, 0xFB100001,
- 0x81C, 0xFA120001,
- 0x81C, 0xF9140001,
- 0x81C, 0xF8160001,
- 0x81C, 0xF7180001,
- 0x81C, 0xF61A0001,
- 0x81C, 0xF51C0001,
- 0x81C, 0xF41E0001,
- 0x81C, 0xF3200001,
- 0x81C, 0xF2220001,
- 0x81C, 0xF1240001,
- 0x81C, 0xF0260001,
- 0x81C, 0xEF280001,
- 0x81C, 0xEE2A0001,
- 0x81C, 0xED2C0001,
- 0x81C, 0xEC2E0001,
- 0x81C, 0xEB300001,
- 0x81C, 0xEA320001,
- 0x81C, 0xE9340001,
- 0x81C, 0xE8360001,
- 0x81C, 0xE7380001,
- 0x81C, 0xE63A0001,
- 0x81C, 0xE53C0001,
- 0x81C, 0xC73E0001,
- 0x81C, 0xC6400001,
- 0x81C, 0xC5420001,
- 0x81C, 0xC4440001,
- 0x81C, 0xC3460001,
- 0x81C, 0xC2480001,
- 0x81C, 0xC14A0001,
- 0x81C, 0xA74C0001,
- 0x81C, 0xA64E0001,
- 0x81C, 0xA5500001,
- 0x81C, 0xA4520001,
- 0x81C, 0xA3540001,
- 0x81C, 0xA2560001,
- 0x81C, 0xA1580001,
- 0x81C, 0x675A0001,
- 0x81C, 0x665C0001,
- 0x81C, 0x655E0001,
- 0x81C, 0x64600001,
- 0x81C, 0x63620001,
- 0x81C, 0x48640001,
- 0x81C, 0x47660001,
- 0x81C, 0x46680001,
- 0x81C, 0x456A0001,
- 0x81C, 0x446C0001,
- 0x81C, 0x436E0001,
- 0x81C, 0x42700001,
- 0x81C, 0x41720001,
- 0x81C, 0x41740001,
- 0x81C, 0x41760001,
- 0x81C, 0x41780001,
- 0x81C, 0x417A0001,
- 0x81C, 0x417C0001,
- 0x81C, 0x417E0001,
- 0xFF0F07D8, 0xDEAD,
- 0xFF0F0180, 0xABCD,
- 0x81C, 0xFC800001,
- 0x81C, 0xFB820001,
- 0x81C, 0xFA840001,
- 0x81C, 0xF9860001,
- 0x81C, 0xF8880001,
- 0x81C, 0xF78A0001,
- 0x81C, 0xF68C0001,
- 0x81C, 0xF58E0001,
- 0x81C, 0xF4900001,
- 0x81C, 0xF3920001,
- 0x81C, 0xF2940001,
- 0x81C, 0xF1960001,
- 0x81C, 0xF0980001,
- 0x81C, 0xEF9A0001,
- 0x81C, 0xEE9C0001,
- 0x81C, 0xED9E0001,
- 0x81C, 0xECA00001,
- 0x81C, 0xEBA20001,
- 0x81C, 0xEAA40001,
- 0x81C, 0xE9A60001,
- 0x81C, 0xE8A80001,
- 0x81C, 0xE7AA0001,
- 0x81C, 0xE6AC0001,
- 0x81C, 0xE5AE0001,
- 0x81C, 0xE4B00001,
- 0x81C, 0xE3B20001,
- 0x81C, 0xA8B40001,
- 0x81C, 0xA7B60001,
- 0x81C, 0xA6B80001,
- 0x81C, 0xA5BA0001,
- 0x81C, 0xA4BC0001,
- 0x81C, 0xA3BE0001,
- 0x81C, 0xA2C00001,
- 0x81C, 0xA1C20001,
- 0x81C, 0x68C40001,
- 0x81C, 0x67C60001,
- 0x81C, 0x66C80001,
- 0x81C, 0x65CA0001,
- 0x81C, 0x64CC0001,
- 0x81C, 0x47CE0001,
- 0x81C, 0x46D00001,
- 0x81C, 0x45D20001,
- 0x81C, 0x44D40001,
- 0x81C, 0x43D60001,
- 0x81C, 0x42D80001,
- 0x81C, 0x08DA0001,
- 0x81C, 0x07DC0001,
- 0x81C, 0x06DE0001,
- 0x81C, 0x05E00001,
- 0x81C, 0x04E20001,
- 0x81C, 0x03E40001,
- 0x81C, 0x02E60001,
- 0x81C, 0x01E80001,
- 0x81C, 0x01EA0001,
- 0x81C, 0x01EC0001,
- 0x81C, 0x01EE0001,
- 0x81C, 0x01F00001,
- 0x81C, 0x01F20001,
- 0x81C, 0x01F40001,
- 0x81C, 0x01F60001,
- 0x81C, 0x01F80001,
- 0x81C, 0x01FA0001,
- 0x81C, 0x01FC0001,
- 0x81C, 0x01FE0001,
- 0xFF0F0280, 0xCDEF,
- 0x81C, 0xFC800001,
- 0x81C, 0xFB820001,
- 0x81C, 0xFA840001,
- 0x81C, 0xF9860001,
- 0x81C, 0xF8880001,
- 0x81C, 0xF78A0001,
- 0x81C, 0xF68C0001,
- 0x81C, 0xF58E0001,
- 0x81C, 0xF4900001,
- 0x81C, 0xF3920001,
- 0x81C, 0xF2940001,
- 0x81C, 0xF1960001,
- 0x81C, 0xF0980001,
- 0x81C, 0xEF9A0001,
- 0x81C, 0xEE9C0001,
- 0x81C, 0xED9E0001,
- 0x81C, 0xECA00001,
- 0x81C, 0xEBA20001,
- 0x81C, 0xEAA40001,
- 0x81C, 0xE9A60001,
- 0x81C, 0xE8A80001,
- 0x81C, 0xE7AA0001,
- 0x81C, 0xE6AC0001,
- 0x81C, 0xE5AE0001,
- 0x81C, 0xE4B00001,
- 0x81C, 0xE3B20001,
- 0x81C, 0xA8B40001,
- 0x81C, 0xA7B60001,
- 0x81C, 0xA6B80001,
- 0x81C, 0xA5BA0001,
- 0x81C, 0xA4BC0001,
- 0x81C, 0xA3BE0001,
- 0x81C, 0xA2C00001,
- 0x81C, 0xA1C20001,
- 0x81C, 0x68C40001,
- 0x81C, 0x67C60001,
- 0x81C, 0x66C80001,
- 0x81C, 0x65CA0001,
- 0x81C, 0x64CC0001,
- 0x81C, 0x47CE0001,
- 0x81C, 0x46D00001,
- 0x81C, 0x45D20001,
- 0x81C, 0x44D40001,
- 0x81C, 0x43D60001,
- 0x81C, 0x42D80001,
- 0x81C, 0x08DA0001,
- 0x81C, 0x07DC0001,
- 0x81C, 0x06DE0001,
- 0x81C, 0x05E00001,
- 0x81C, 0x04E20001,
- 0x81C, 0x03E40001,
- 0x81C, 0x02E60001,
- 0x81C, 0x01E80001,
- 0x81C, 0x01EA0001,
- 0x81C, 0x01EC0001,
- 0x81C, 0x01EE0001,
- 0x81C, 0x01F00001,
- 0x81C, 0x01F20001,
- 0x81C, 0x01F40001,
- 0x81C, 0x01F60001,
- 0x81C, 0x01F80001,
- 0x81C, 0x01FA0001,
- 0x81C, 0x01FC0001,
- 0x81C, 0x01FE0001,
- 0xFF0F01C0, 0xCDEF,
- 0x81C, 0xFC800001,
- 0x81C, 0xFB820001,
- 0x81C, 0xFA840001,
- 0x81C, 0xF9860001,
- 0x81C, 0xF8880001,
- 0x81C, 0xF78A0001,
- 0x81C, 0xF68C0001,
- 0x81C, 0xF58E0001,
- 0x81C, 0xF4900001,
- 0x81C, 0xF3920001,
- 0x81C, 0xF2940001,
- 0x81C, 0xF1960001,
- 0x81C, 0xF0980001,
- 0x81C, 0xEF9A0001,
- 0x81C, 0xEE9C0001,
- 0x81C, 0xED9E0001,
- 0x81C, 0xECA00001,
- 0x81C, 0xEBA20001,
- 0x81C, 0xEAA40001,
- 0x81C, 0xE9A60001,
- 0x81C, 0xE8A80001,
- 0x81C, 0xE7AA0001,
- 0x81C, 0xE6AC0001,
- 0x81C, 0xE5AE0001,
- 0x81C, 0xE4B00001,
- 0x81C, 0xE3B20001,
- 0x81C, 0xA8B40001,
- 0x81C, 0xA7B60001,
- 0x81C, 0xA6B80001,
- 0x81C, 0xA5BA0001,
- 0x81C, 0xA4BC0001,
- 0x81C, 0xA3BE0001,
- 0x81C, 0xA2C00001,
- 0x81C, 0xA1C20001,
- 0x81C, 0x68C40001,
- 0x81C, 0x67C60001,
- 0x81C, 0x66C80001,
- 0x81C, 0x65CA0001,
- 0x81C, 0x64CC0001,
- 0x81C, 0x47CE0001,
- 0x81C, 0x46D00001,
- 0x81C, 0x45D20001,
- 0x81C, 0x44D40001,
- 0x81C, 0x43D60001,
- 0x81C, 0x42D80001,
- 0x81C, 0x08DA0001,
- 0x81C, 0x07DC0001,
- 0x81C, 0x06DE0001,
- 0x81C, 0x05E00001,
- 0x81C, 0x04E20001,
- 0x81C, 0x03E40001,
- 0x81C, 0x02E60001,
- 0x81C, 0x01E80001,
- 0x81C, 0x01EA0001,
- 0x81C, 0x01EC0001,
- 0x81C, 0x01EE0001,
- 0x81C, 0x01F00001,
- 0x81C, 0x01F20001,
- 0x81C, 0x01F40001,
- 0x81C, 0x01F60001,
- 0x81C, 0x01F80001,
- 0x81C, 0x01FA0001,
- 0x81C, 0x01FC0001,
- 0x81C, 0x01FE0001,
- 0xFF0F02C0, 0xCDEF,
- 0x81C, 0xFC800001,
- 0x81C, 0xFB820001,
- 0x81C, 0xFA840001,
- 0x81C, 0xF9860001,
- 0x81C, 0xF8880001,
- 0x81C, 0xF78A0001,
- 0x81C, 0xF68C0001,
- 0x81C, 0xF58E0001,
- 0x81C, 0xF4900001,
- 0x81C, 0xF3920001,
- 0x81C, 0xF2940001,
- 0x81C, 0xF1960001,
- 0x81C, 0xF0980001,
- 0x81C, 0xEF9A0001,
- 0x81C, 0xEE9C0001,
- 0x81C, 0xED9E0001,
- 0x81C, 0xECA00001,
- 0x81C, 0xEBA20001,
- 0x81C, 0xEAA40001,
- 0x81C, 0xE9A60001,
- 0x81C, 0xE8A80001,
- 0x81C, 0xE7AA0001,
- 0x81C, 0xE6AC0001,
- 0x81C, 0xE5AE0001,
- 0x81C, 0xE4B00001,
- 0x81C, 0xE3B20001,
- 0x81C, 0xA8B40001,
- 0x81C, 0xA7B60001,
- 0x81C, 0xA6B80001,
- 0x81C, 0xA5BA0001,
- 0x81C, 0xA4BC0001,
- 0x81C, 0xA3BE0001,
- 0x81C, 0xA2C00001,
- 0x81C, 0xA1C20001,
- 0x81C, 0x68C40001,
- 0x81C, 0x67C60001,
- 0x81C, 0x66C80001,
- 0x81C, 0x65CA0001,
- 0x81C, 0x64CC0001,
- 0x81C, 0x47CE0001,
- 0x81C, 0x46D00001,
- 0x81C, 0x45D20001,
- 0x81C, 0x44D40001,
- 0x81C, 0x43D60001,
- 0x81C, 0x42D80001,
- 0x81C, 0x08DA0001,
- 0x81C, 0x07DC0001,
- 0x81C, 0x06DE0001,
- 0x81C, 0x05E00001,
- 0x81C, 0x04E20001,
- 0x81C, 0x03E40001,
- 0x81C, 0x02E60001,
- 0x81C, 0x01E80001,
- 0x81C, 0x01EA0001,
- 0x81C, 0x01EC0001,
- 0x81C, 0x01EE0001,
- 0x81C, 0x01F00001,
- 0x81C, 0x01F20001,
- 0x81C, 0x01F40001,
- 0x81C, 0x01F60001,
- 0x81C, 0x01F80001,
- 0x81C, 0x01FA0001,
- 0x81C, 0x01FC0001,
- 0x81C, 0x01FE0001,
- 0xFF0F07D8, 0xCDEF,
- 0x81C, 0xFC800001,
- 0x81C, 0xFB820001,
- 0x81C, 0xFA840001,
- 0x81C, 0xF9860001,
- 0x81C, 0xF8880001,
- 0x81C, 0xF78A0001,
- 0x81C, 0xF68C0001,
- 0x81C, 0xF58E0001,
- 0x81C, 0xF4900001,
- 0x81C, 0xF3920001,
- 0x81C, 0xF2940001,
- 0x81C, 0xF1960001,
- 0x81C, 0xF0980001,
- 0x81C, 0xEF9A0001,
- 0x81C, 0xEE9C0001,
- 0x81C, 0xED9E0001,
- 0x81C, 0xECA00001,
- 0x81C, 0xEBA20001,
- 0x81C, 0xEAA40001,
- 0x81C, 0xE9A60001,
- 0x81C, 0xE8A80001,
- 0x81C, 0xE7AA0001,
- 0x81C, 0xE6AC0001,
- 0x81C, 0xE5AE0001,
- 0x81C, 0xE4B00001,
- 0x81C, 0xE3B20001,
- 0x81C, 0xA8B40001,
- 0x81C, 0xA7B60001,
- 0x81C, 0xA6B80001,
- 0x81C, 0xA5BA0001,
- 0x81C, 0xA4BC0001,
- 0x81C, 0xA3BE0001,
- 0x81C, 0xA2C00001,
- 0x81C, 0xA1C20001,
- 0x81C, 0x68C40001,
- 0x81C, 0x67C60001,
- 0x81C, 0x66C80001,
- 0x81C, 0x65CA0001,
- 0x81C, 0x64CC0001,
- 0x81C, 0x47CE0001,
- 0x81C, 0x46D00001,
- 0x81C, 0x45D20001,
- 0x81C, 0x44D40001,
- 0x81C, 0x43D60001,
- 0x81C, 0x42D80001,
- 0x81C, 0x08DA0001,
- 0x81C, 0x07DC0001,
- 0x81C, 0x06DE0001,
- 0x81C, 0x05E00001,
- 0x81C, 0x04E20001,
- 0x81C, 0x03E40001,
- 0x81C, 0x02E60001,
- 0x81C, 0x01E80001,
- 0x81C, 0x01EA0001,
- 0x81C, 0x01EC0001,
- 0x81C, 0x01EE0001,
- 0x81C, 0x01F00001,
- 0x81C, 0x01F20001,
- 0x81C, 0x01F40001,
- 0x81C, 0x01F60001,
- 0x81C, 0x01F80001,
- 0x81C, 0x01FA0001,
- 0x81C, 0x01FC0001,
- 0x81C, 0x01FE0001,
- 0xFF0F07D0, 0xCDEF,
+ 0x503, 0x00000000,
+ 0x504, 0x00000028,
+ 0x505, 0x000000A3,
+ 0x506, 0x0000005E,
+ 0x507, 0x00000000,
+ 0x508, 0x0000002B,
+ 0x509, 0x000000A4,
+ 0x50A, 0x0000005E,
+ 0x50B, 0x00000000,
+ 0x50C, 0x0000004F,
+ 0x50D, 0x000000A4,
+ 0x50E, 0x00000000,
+ 0x50F, 0x00000000,
+ 0x512, 0x0000001C,
+ 0x514, 0x0000000A,
+ 0x516, 0x0000000A,
+ 0x525, 0x0000004F,
+ 0x550, 0x00000010,
+ 0x551, 0x00000010,
+ 0x559, 0x00000002,
+ 0x55C, 0x00000050,
+ 0x55D, 0x000000FF,
+ 0x605, 0x00000030,
+ 0x607, 0x00000007,
+ 0x608, 0x0000000E,
+ 0x609, 0x0000002A,
+ 0x620, 0x000000FF,
+ 0x621, 0x000000FF,
+ 0x622, 0x000000FF,
+ 0x623, 0x000000FF,
+ 0x624, 0x000000FF,
+ 0x625, 0x000000FF,
+ 0x626, 0x000000FF,
+ 0x627, 0x000000FF,
+ 0x638, 0x00000050,
+ 0x63C, 0x0000000A,
+ 0x63D, 0x0000000A,
+ 0x63E, 0x0000000E,
+ 0x63F, 0x0000000E,
+ 0x640, 0x00000040,
+ 0x642, 0x00000040,
+ 0x643, 0x00000000,
+ 0x652, 0x000000C8,
+ 0x66E, 0x00000005,
+ 0x700, 0x00000021,
+ 0x701, 0x00000043,
+ 0x702, 0x00000065,
+ 0x703, 0x00000087,
+ 0x708, 0x00000021,
+ 0x709, 0x00000043,
+ 0x70A, 0x00000065,
+ 0x70B, 0x00000087,
+ 0x718, 0x00000040,
+};
+
+u32 RTL8821AE_MAC_1T_ARRAYLEN = sizeof(RTL8821AE_MAC_REG_ARRAY) / sizeof(u32);
+
+u32 RTL8812AE_AGC_TAB_ARRAY[] = {
+ 0x80000001, 0x00000000, 0x40000000, 0x00000000,
+ 0x81C, 0xFC000001,
+ 0x81C, 0xFB020001,
+ 0x81C, 0xFA040001,
+ 0x81C, 0xF9060001,
+ 0x81C, 0xF8080001,
+ 0x81C, 0xF70A0001,
+ 0x81C, 0xF60C0001,
+ 0x81C, 0xF50E0001,
+ 0x81C, 0xF4100001,
+ 0x81C, 0xF3120001,
+ 0x81C, 0xF2140001,
+ 0x81C, 0xF1160001,
+ 0x81C, 0xF0180001,
+ 0x81C, 0xEF1A0001,
+ 0x81C, 0xEE1C0001,
+ 0x81C, 0xED1E0001,
+ 0x81C, 0xEC200001,
+ 0x81C, 0xEB220001,
+ 0x81C, 0xEA240001,
+ 0x81C, 0xCD260001,
+ 0x81C, 0xCC280001,
+ 0x81C, 0xCB2A0001,
+ 0x81C, 0xCA2C0001,
+ 0x81C, 0xC92E0001,
+ 0x81C, 0xC8300001,
+ 0x81C, 0xA6320001,
+ 0x81C, 0xA5340001,
+ 0x81C, 0xA4360001,
+ 0x81C, 0xA3380001,
+ 0x81C, 0xA23A0001,
+ 0x81C, 0x883C0001,
+ 0x81C, 0x873E0001,
+ 0x81C, 0x86400001,
+ 0x81C, 0x85420001,
+ 0x81C, 0x84440001,
+ 0x81C, 0x83460001,
+ 0x81C, 0x82480001,
+ 0x81C, 0x814A0001,
+ 0x81C, 0x484C0001,
+ 0x81C, 0x474E0001,
+ 0x81C, 0x46500001,
+ 0x81C, 0x45520001,
+ 0x81C, 0x44540001,
+ 0x81C, 0x43560001,
+ 0x81C, 0x42580001,
+ 0x81C, 0x415A0001,
+ 0x81C, 0x255C0001,
+ 0x81C, 0x245E0001,
+ 0x81C, 0x23600001,
+ 0x81C, 0x22620001,
+ 0x81C, 0x21640001,
+ 0x81C, 0x21660001,
+ 0x81C, 0x21680001,
+ 0x81C, 0x216A0001,
+ 0x81C, 0x216C0001,
+ 0x81C, 0x216E0001,
+ 0x81C, 0x21700001,
+ 0x81C, 0x21720001,
+ 0x81C, 0x21740001,
+ 0x81C, 0x21760001,
+ 0x81C, 0x21780001,
+ 0x81C, 0x217A0001,
+ 0x81C, 0x217C0001,
+ 0x81C, 0x217E0001,
+ 0x90000001, 0x00000005, 0x40000000, 0x00000000,
+ 0x81C, 0xF9000001,
+ 0x81C, 0xF8020001,
+ 0x81C, 0xF7040001,
+ 0x81C, 0xF6060001,
+ 0x81C, 0xF5080001,
+ 0x81C, 0xF40A0001,
+ 0x81C, 0xF30C0001,
+ 0x81C, 0xF20E0001,
+ 0x81C, 0xF1100001,
+ 0x81C, 0xF0120001,
+ 0x81C, 0xEF140001,
+ 0x81C, 0xEE160001,
+ 0x81C, 0xED180001,
+ 0x81C, 0xEC1A0001,
+ 0x81C, 0xEB1C0001,
+ 0x81C, 0xEA1E0001,
+ 0x81C, 0xCD200001,
+ 0x81C, 0xCC220001,
+ 0x81C, 0xCB240001,
+ 0x81C, 0xCA260001,
+ 0x81C, 0xC9280001,
+ 0x81C, 0xC82A0001,
+ 0x81C, 0xC72C0001,
+ 0x81C, 0xC62E0001,
+ 0x81C, 0xA5300001,
+ 0x81C, 0xA4320001,
+ 0x81C, 0xA3340001,
+ 0x81C, 0xA2360001,
+ 0x81C, 0x88380001,
+ 0x81C, 0x873A0001,
+ 0x81C, 0x863C0001,
+ 0x81C, 0x853E0001,
+ 0x81C, 0x84400001,
+ 0x81C, 0x83420001,
+ 0x81C, 0x82440001,
+ 0x81C, 0x81460001,
+ 0x81C, 0x48480001,
+ 0x81C, 0x474A0001,
+ 0x81C, 0x464C0001,
+ 0x81C, 0x454E0001,
+ 0x81C, 0x44500001,
+ 0x81C, 0x43520001,
+ 0x81C, 0x42540001,
+ 0x81C, 0x41560001,
+ 0x81C, 0x25580001,
+ 0x81C, 0x245A0001,
+ 0x81C, 0x235C0001,
+ 0x81C, 0x225E0001,
+ 0x81C, 0x21600001,
+ 0x81C, 0x21620001,
+ 0x81C, 0x21640001,
+ 0x81C, 0x21660001,
+ 0x81C, 0x21680001,
+ 0x81C, 0x216A0001,
+ 0x81C, 0x236C0001,
+ 0x81C, 0x226E0001,
+ 0x81C, 0x21700001,
+ 0x81C, 0x21720001,
+ 0x81C, 0x21740001,
+ 0x81C, 0x21760001,
+ 0x81C, 0x21780001,
+ 0x81C, 0x217A0001,
+ 0x81C, 0x217C0001,
+ 0x81C, 0x217E0001,
+ 0xA0000000, 0x00000000,
+ 0x81C, 0xFF000001,
+ 0x81C, 0xFF020001,
+ 0x81C, 0xFF040001,
+ 0x81C, 0xFF060001,
+ 0x81C, 0xFF080001,
+ 0x81C, 0xFE0A0001,
+ 0x81C, 0xFD0C0001,
+ 0x81C, 0xFC0E0001,
+ 0x81C, 0xFB100001,
+ 0x81C, 0xFA120001,
+ 0x81C, 0xF9140001,
+ 0x81C, 0xF8160001,
+ 0x81C, 0xF7180001,
+ 0x81C, 0xF61A0001,
+ 0x81C, 0xF51C0001,
+ 0x81C, 0xF41E0001,
+ 0x81C, 0xF3200001,
+ 0x81C, 0xF2220001,
+ 0x81C, 0xF1240001,
+ 0x81C, 0xF0260001,
+ 0x81C, 0xEF280001,
+ 0x81C, 0xEE2A0001,
+ 0x81C, 0xED2C0001,
+ 0x81C, 0xEC2E0001,
+ 0x81C, 0xEB300001,
+ 0x81C, 0xEA320001,
+ 0x81C, 0xE9340001,
+ 0x81C, 0xE8360001,
+ 0x81C, 0xE7380001,
+ 0x81C, 0xE63A0001,
+ 0x81C, 0xE53C0001,
+ 0x81C, 0xC73E0001,
+ 0x81C, 0xC6400001,
+ 0x81C, 0xC5420001,
+ 0x81C, 0xC4440001,
+ 0x81C, 0xC3460001,
+ 0x81C, 0xC2480001,
+ 0x81C, 0xC14A0001,
+ 0x81C, 0xA74C0001,
+ 0x81C, 0xA64E0001,
+ 0x81C, 0xA5500001,
+ 0x81C, 0xA4520001,
+ 0x81C, 0xA3540001,
+ 0x81C, 0xA2560001,
+ 0x81C, 0xA1580001,
+ 0x81C, 0x675A0001,
+ 0x81C, 0x665C0001,
+ 0x81C, 0x655E0001,
+ 0x81C, 0x64600001,
+ 0x81C, 0x63620001,
+ 0x81C, 0x48640001,
+ 0x81C, 0x47660001,
+ 0x81C, 0x46680001,
+ 0x81C, 0x456A0001,
+ 0x81C, 0x446C0001,
+ 0x81C, 0x436E0001,
+ 0x81C, 0x42700001,
+ 0x81C, 0x41720001,
+ 0x81C, 0x41740001,
+ 0x81C, 0x41760001,
+ 0x81C, 0x41780001,
+ 0x81C, 0x417A0001,
+ 0x81C, 0x417C0001,
+ 0x81C, 0x417E0001,
+ 0xB0000000, 0x00000000,
+ 0x80000004, 0x00000000, 0x40000000, 0x00000000,
0x81C, 0xFC800001,
0x81C, 0xFB820001,
0x81C, 0xFA840001,
0x81C, 0x01FA0001,
0x81C, 0x01FC0001,
0x81C, 0x01FE0001,
- 0xCDCDCDCD, 0xCDCD,
+ 0xA0000000, 0x00000000,
0x81C, 0xFF800001,
0x81C, 0xFF820001,
0x81C, 0xFF840001,
0x81C, 0x01FA0001,
0x81C, 0x01FC0001,
0x81C, 0x01FE0001,
- 0xFF0F0180, 0xDEAD,
+ 0xB0000000, 0x00000000,
0xC50, 0x00000022,
0xC50, 0x00000020,
0xE50, 0x00000022,
0xE50, 0x00000020,
-
};
+u32 RTL8812AE_AGC_TAB_1TARRAYLEN =
+ sizeof(RTL8812AE_AGC_TAB_ARRAY) / sizeof(u32);
+
u32 RTL8821AE_AGC_TAB_ARRAY[] = {
0x81C, 0xBF000001,
0x81C, 0xBF020001,
0x81C, 0x017E0101,
0xC50, 0x00000022,
0xC50, 0x00000020,
-
};
+u32 RTL8821AE_AGC_TAB_1TARRAYLEN =
+ sizeof(RTL8821AE_AGC_TAB_ARRAY) / sizeof(u32);
+
/******************************************************************************
* TXPWR_LMT.TXT
******************************************************************************/
"FCC", "5G", "20M", "OFDM", "1T", "100", "30",
"ETSI", "5G", "20M", "OFDM", "1T", "100", "32",
"MKK", "5G", "20M", "OFDM", "1T", "100", "32",
- "FCC", "5G", "20M", "OFDM", "1T", "114", "30",
- "ETSI", "5G", "20M", "OFDM", "1T", "114", "32",
- "MKK", "5G", "20M", "OFDM", "1T", "114", "32",
+ "FCC", "5G", "20M", "OFDM", "1T", "104", "30",
+ "ETSI", "5G", "20M", "OFDM", "1T", "104", "32",
+ "MKK", "5G", "20M", "OFDM", "1T", "104", "32",
"FCC", "5G", "20M", "OFDM", "1T", "108", "32",
"ETSI", "5G", "20M", "OFDM", "1T", "108", "32",
"MKK", "5G", "20M", "OFDM", "1T", "108", "32",
"FCC", "5G", "20M", "HT", "1T", "100", "30",
"ETSI", "5G", "20M", "HT", "1T", "100", "32",
"MKK", "5G", "20M", "HT", "1T", "100", "32",
- "FCC", "5G", "20M", "HT", "1T", "114", "30",
- "ETSI", "5G", "20M", "HT", "1T", "114", "32",
- "MKK", "5G", "20M", "HT", "1T", "114", "32",
+ "FCC", "5G", "20M", "HT", "1T", "104", "30",
+ "ETSI", "5G", "20M", "HT", "1T", "104", "32",
+ "MKK", "5G", "20M", "HT", "1T", "104", "32",
"FCC", "5G", "20M", "HT", "1T", "108", "32",
"ETSI", "5G", "20M", "HT", "1T", "108", "32",
"MKK", "5G", "20M", "HT", "1T", "108", "32",
"FCC", "5G", "20M", "HT", "2T", "100", "28",
"ETSI", "5G", "20M", "HT", "2T", "100", "30",
"MKK", "5G", "20M", "HT", "2T", "100", "30",
- "FCC", "5G", "20M", "HT", "2T", "114", "28",
- "ETSI", "5G", "20M", "HT", "2T", "114", "30",
- "MKK", "5G", "20M", "HT", "2T", "114", "30",
+ "FCC", "5G", "20M", "HT", "2T", "104", "28",
+ "ETSI", "5G", "20M", "HT", "2T", "104", "30",
+ "MKK", "5G", "20M", "HT", "2T", "104", "30",
"FCC", "5G", "20M", "HT", "2T", "108", "30",
"ETSI", "5G", "20M", "HT", "2T", "108", "30",
"MKK", "5G", "20M", "HT", "2T", "108", "30",
"MKK", "5G", "80M", "VHT", "2T", "155", "63"
};
+u32 RTL8812AE_TXPWR_LMT_ARRAY_LEN = sizeof(RTL8812AE_TXPWR_LMT) / sizeof(u8 *);
+
u8 *RTL8821AE_TXPWR_LMT[] = {
"FCC", "2.4G", "20M", "CCK", "1T", "01", "32",
"ETSI", "2.4G", "20M", "CCK", "1T", "01", "32",
"FCC", "5G", "20M", "OFDM", "1T", "100", "32",
"ETSI", "5G", "20M", "OFDM", "1T", "100", "30",
"MKK", "5G", "20M", "OFDM", "1T", "100", "30",
- "FCC", "5G", "20M", "OFDM", "1T", "114", "32",
- "ETSI", "5G", "20M", "OFDM", "1T", "114", "30",
- "MKK", "5G", "20M", "OFDM", "1T", "114", "30",
+ "FCC", "5G", "20M", "OFDM", "1T", "104", "32",
+ "ETSI", "5G", "20M", "OFDM", "1T", "104", "30",
+ "MKK", "5G", "20M", "OFDM", "1T", "104", "30",
"FCC", "5G", "20M", "OFDM", "1T", "108", "32",
"ETSI", "5G", "20M", "OFDM", "1T", "108", "30",
"MKK", "5G", "20M", "OFDM", "1T", "108", "30",
"FCC", "5G", "20M", "HT", "1T", "100", "32",
"ETSI", "5G", "20M", "HT", "1T", "100", "30",
"MKK", "5G", "20M", "HT", "1T", "100", "30",
- "FCC", "5G", "20M", "HT", "1T", "114", "32",
- "ETSI", "5G", "20M", "HT", "1T", "114", "30",
- "MKK", "5G", "20M", "HT", "1T", "114", "30",
+ "FCC", "5G", "20M", "HT", "1T", "104", "32",
+ "ETSI", "5G", "20M", "HT", "1T", "104", "30",
+ "MKK", "5G", "20M", "HT", "1T", "104", "30",
"FCC", "5G", "20M", "HT", "1T", "108", "32",
"ETSI", "5G", "20M", "HT", "1T", "108", "30",
"MKK", "5G", "20M", "HT", "1T", "108", "30",
"FCC", "5G", "20M", "HT", "2T", "100", "28",
"ETSI", "5G", "20M", "HT", "2T", "100", "30",
"MKK", "5G", "20M", "HT", "2T", "100", "30",
- "FCC", "5G", "20M", "HT", "2T", "114", "28",
- "ETSI", "5G", "20M", "HT", "2T", "114", "30",
- "MKK", "5G", "20M", "HT", "2T", "114", "30",
+ "FCC", "5G", "20M", "HT", "2T", "104", "28",
+ "ETSI", "5G", "20M", "HT", "2T", "104", "30",
+ "MKK", "5G", "20M", "HT", "2T", "104", "30",
"FCC", "5G", "20M", "HT", "2T", "108", "30",
"ETSI", "5G", "20M", "HT", "2T", "108", "30",
"MKK", "5G", "20M", "HT", "2T", "108", "30",
"ETSI", "5G", "80M", "VHT", "2T", "155", "30",
"MKK", "5G", "80M", "VHT", "2T", "155", "63"
};
+
+u32 RTL8821AE_TXPWR_LMT_ARRAY_LEN = sizeof(RTL8821AE_TXPWR_LMT) / sizeof(u8 *);
#define __RTL8821AE_TABLE__H_
#include <linux/types.h>
-#define RTL8821AEPHY_REG_1TARRAYLEN 344
+extern u32 RTL8821AE_PHY_REG_1TARRAYLEN;
extern u32 RTL8821AE_PHY_REG_ARRAY[];
-#define RTL8812AEPHY_REG_1TARRAYLEN 490
+extern u32 RTL8812AE_PHY_REG_1TARRAYLEN;
extern u32 RTL8812AE_PHY_REG_ARRAY[];
-#define RTL8821AEPHY_REG_ARRAY_PGLEN 90
+extern u32 RTL8821AE_PHY_REG_ARRAY_PGLEN;
extern u32 RTL8821AE_PHY_REG_ARRAY_PG[];
-#define RTL8812AEPHY_REG_ARRAY_PGLEN 276
+extern u32 RTL8812AE_PHY_REG_ARRAY_PGLEN;
extern u32 RTL8812AE_PHY_REG_ARRAY_PG[];
-/* #define RTL8723BE_RADIOA_1TARRAYLEN 206 */
-/* extern u8 *RTL8821AE_TXPWR_LMT_ARRAY[]; */
-#define RTL8812AE_RADIOA_1TARRAYLEN 1264
+extern u32 RTL8812AE_RADIOA_1TARRAYLEN;
extern u32 RTL8812AE_RADIOA_ARRAY[];
-#define RTL8812AE_RADIOB_1TARRAYLEN 1240
+extern u32 RTL8812AE_RADIOB_1TARRAYLEN;
extern u32 RTL8812AE_RADIOB_ARRAY[];
-#define RTL8821AE_RADIOA_1TARRAYLEN 1176
+extern u32 RTL8821AE_RADIOA_1TARRAYLEN;
extern u32 RTL8821AE_RADIOA_ARRAY[];
-#define RTL8821AEMAC_1T_ARRAYLEN 194
+extern u32 RTL8821AE_MAC_1T_ARRAYLEN;
extern u32 RTL8821AE_MAC_REG_ARRAY[];
-#define RTL8812AEMAC_1T_ARRAYLEN 214
+extern u32 RTL8812AE_MAC_1T_ARRAYLEN;
extern u32 RTL8812AE_MAC_REG_ARRAY[];
-#define RTL8821AEAGCTAB_1TARRAYLEN 382
+extern u32 RTL8821AE_AGC_TAB_1TARRAYLEN;
extern u32 RTL8821AE_AGC_TAB_ARRAY[];
-#define RTL8812AEAGCTAB_1TARRAYLEN 1312
+extern u32 RTL8812AE_AGC_TAB_1TARRAYLEN;
extern u32 RTL8812AE_AGC_TAB_ARRAY[];
-#define RTL8812AE_TXPWR_LMT_ARRAY_LEN 3948
+extern u32 RTL8812AE_TXPWR_LMT_ARRAY_LEN;
extern u8 *RTL8812AE_TXPWR_LMT[];
-#define RTL8821AE_TXPWR_LMT_ARRAY_LEN 3948
+extern u32 RTL8821AE_TXPWR_LMT_ARRAY_LEN;
extern u8 *RTL8821AE_TXPWR_LMT[];
#endif
u8 external_lna_2g;
u8 external_pa_5g;
u8 external_lna_5g;
+ u8 type_glna;
+ u8 type_gpa;
+ u8 type_alna;
+ u8 type_apa;
u8 rfe_type;
/*firmware */
rtlpriv->io.read8_sync(rtlpriv, addr);
}
+static inline void rtl_write_byte_with_val32(struct ieee80211_hw *hw,
+ u32 addr, u32 val8)
+{
+ struct rtl_priv *rtlpriv = rtl_priv(hw);
+
+ rtl_write_byte(rtlpriv, addr, (u8)val8);
+}
+
static inline void rtl_write_word(struct rtl_priv *rtlpriv, u32 addr, u16 val16)
{
rtlpriv->io.write16_async(rtlpriv, addr, val16);
rtlpriv->cfg->ops->set_bbreg(hw, regaddr, bitmask, data);
}
+static inline void rtl_set_bbreg_with_dwmask(struct ieee80211_hw *hw,
+ u32 regaddr, u32 data)
+{
+ rtl_set_bbreg(hw, regaddr, 0xffffffff, data);
+}
+
static inline u32 rtl_get_rfreg(struct ieee80211_hw *hw,
enum radio_path rfpath, u32 regaddr,
u32 bitmask)
}
if (wl->conf.fwlog.output == 0) {
- wl1271_warning("iligal opperation - fw logger disabled by default, please change mode via wlconf");
+ wl1271_warning("invalid operation - fw logger disabled by default, please change mode via wlconf");
return -EINVAL;
}
u8 bulk_out_ep;
int r;
+ if (iface_desc->desc.bNumEndpoints < 2)
+ return -ENODEV;
+
/* Find bulk out endpoint */
for (r = 1; r >= 0; r--) {
endpoint = &iface_desc->endpoint[r].desc;
projects / platform / kernel / linux-starfive.git / commitdiff