[TargetInstPredicate] Add definition of CheckInvalidRegisterOperand.

This should have been part of r337378. I forgot to svn add it before committing
the change.

llvm-svn: 337380

diff --git a/llvm/include/llvm/Target/TargetInstrPredicate.td b/llvm/include/llvm/Target/TargetInstrPredicate.td
index e6e5c06..d38279b 100644 (file)
--- a/llvm/include/llvm/Target/TargetInstrPredicate.td
+++ b/llvm/include/llvm/Target/TargetInstrPredicate.td
@@ -111,6 +111,9 @@ class CheckRegOperand<int Index, Register R> : MCOperandPredicate<Index> {
   Register Reg = R;
 }
 
+// Check if register operand at index `Index` is the invalid register.
+class CheckInvalidRegOperand<int Index> : MCOperandPredicate<Index>;
+
 // Check that the operand at position `Index` is immediate `Imm`.
 class CheckImmOperand<int Index, int Imm> : MCOperandPredicate<Index> {
   int ImmVal = Imm;