clk: imx: scu: Add A53 frequency scaling support
authorAnson Huang <Anson.Huang@nxp.com>
Fri, 4 Jun 2021 09:09:39 +0000 (17:09 +0800)
committerAbel Vesa <abel.vesa@nxp.com>
Mon, 14 Jun 2021 09:34:35 +0000 (12:34 +0300)
Add i.MX8QM cpufreq support for A53 cluster.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
drivers/clk/imx/clk-scu.c

index 2537e68..8b3eb58 100644 (file)
@@ -273,7 +273,7 @@ static int clk_scu_atf_set_cpu_rate(struct clk_hw *hw, unsigned long rate,
        struct arm_smccc_res res;
        unsigned long cluster_id;
 
-       if (clk->rsrc_id == IMX_SC_R_A35)
+       if (clk->rsrc_id == IMX_SC_R_A35 || clk->rsrc_id == IMX_SC_R_A53)
                cluster_id = 0;
        else
                return -EINVAL;
@@ -449,7 +449,7 @@ struct clk_hw *__imx_clk_scu(struct device *dev, const char *name,
 
        init.name = name;
        init.ops = &clk_scu_ops;
-       if (rsrc_id == IMX_SC_R_A35)
+       if (rsrc_id == IMX_SC_R_A35 || rsrc_id == IMX_SC_R_A53)
                init.ops = &clk_scu_cpu_ops;
        else if (rsrc_id == IMX_SC_R_PI_0_PLL)
                init.ops = &clk_scu_pi_ops;