si_sampler_and_image_descriptors_idx(PIPE_SHADER_COMPUTE);
sel->info.base.shared_size = cso->req_local_mem;
program->shader.selector = &program->sel;
- program->shader.wave_size = si_get_shader_wave_size(sscreen, &program->shader);
+ program->shader.wave_size = si_determine_wave_size(sscreen, &program->shader);
program->ir_type = cso->ir_type;
program->private_size = cso->req_private_mem;
program->input_size = cso->req_input_mem;
unsigned instructions_per_thread = MAX2(1, dwords_per_thread / 4);
unsigned dwords_per_instruction = dwords_per_thread / instructions_per_thread;
/* The shader declares the block size like this: */
- unsigned block_size = si_get_shader_wave_size(sctx->screen, NULL);
+ unsigned block_size = si_determine_wave_size(sctx->screen, NULL);
unsigned dwords_per_wave = dwords_per_thread * block_size;
unsigned num_dwords = size / 4;
info.block[1] = ssrc->surface.u.gfx9.color.dcc_block_height;
info.block[2] = ssrc->surface.u.gfx9.color.dcc_block_depth;
- unsigned default_wave_size = si_get_shader_wave_size(sctx->screen, NULL);;
+ unsigned default_wave_size = si_determine_wave_size(sctx->screen, NULL);;
/* Make sure the block size is at least the same as wave size. */
while (info.block[0] * info.block[1] * info.block[2] < default_wave_size) {
case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
if (ret) {
uint32_t *subgroup_size = ret;
- *subgroup_size = si_get_shader_wave_size(sscreen, NULL);
+ *subgroup_size = si_determine_wave_size(sscreen, NULL);
}
return sizeof(uint32_t);
case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
radeon_add_to_buffer_list(sctx, &sctx->gfx_cs, bo, usage);
}
-static inline unsigned si_get_shader_wave_size(struct si_screen *sscreen, struct si_shader *shader)
-{
- /* There are a few uses that pass shader=NULL here, expecting the default compute wave size. */
- struct si_shader_info *info = shader ? &shader->selector->info : NULL;
- gl_shader_stage stage = info ? info->stage : MESA_SHADER_COMPUTE;
-
- if (sscreen->info.chip_class < GFX10)
- return 64;
-
- /* Legacy GS only supports Wave64. */
- if ((stage == MESA_SHADER_VERTEX && shader->key.ge.as_es && !shader->key.ge.as_ngg) ||
- (stage == MESA_SHADER_TESS_EVAL && shader->key.ge.as_es && !shader->key.ge.as_ngg) ||
- (stage == MESA_SHADER_GEOMETRY && !shader->key.ge.as_ngg))
- return 64;
-
- if (stage == MESA_SHADER_COMPUTE)
- return sscreen->debug_flags & DBG(W32_CS) ? 32 : 64;
-
- if (stage == MESA_SHADER_FRAGMENT)
- return sscreen->debug_flags & DBG(W32_PS) ? 32 : 64;
-
- return sscreen->debug_flags & DBG(W32_GE) ? 32 : 64;
-}
-
static inline void si_select_draw_vbo(struct si_context *sctx)
{
pipe_draw_vbo_func draw_vbo = sctx->draw_vbo[!!sctx->shader.tes.cso]
char *si_finalize_nir(struct pipe_screen *screen, void *nirptr);
/* si_state_shaders.cpp */
+unsigned si_determine_wave_size(struct si_screen *sscreen, struct si_shader *shader);
void gfx9_get_gs_info(struct si_shader_selector *es, struct si_shader_selector *gs,
struct gfx9_gs_info *out);
bool gfx10_is_ngg_passthrough(struct si_shader *shader);
shader->selector = gs_selector;
shader->is_gs_copy_shader = true;
- shader->wave_size = si_get_shader_wave_size(sscreen, shader);
+ shader->wave_size = si_determine_wave_size(sscreen, shader);
si_llvm_context_init(&ctx, sscreen, compiler, shader->wave_size);
ctx.shader = shader;
if (!ureg)
return NULL;
- unsigned default_wave_size = si_get_shader_wave_size(sscreen, NULL);
+ unsigned default_wave_size = si_determine_wave_size(sscreen, NULL);
ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH, default_wave_size);
ureg_property(ureg, TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT, 1);
#include "util/u_prim.h"
#include "tgsi/tgsi_from_mesa.h"
+unsigned si_determine_wave_size(struct si_screen *sscreen, struct si_shader *shader)
+{
+ /* There are a few uses that pass shader=NULL here, expecting the default compute wave size. */
+ struct si_shader_info *info = shader ? &shader->selector->info : NULL;
+ gl_shader_stage stage = info ? info->stage : MESA_SHADER_COMPUTE;
+
+ if (sscreen->info.chip_class < GFX10)
+ return 64;
+
+ /* Legacy GS only supports Wave64. */
+ if ((stage == MESA_SHADER_VERTEX && shader->key.ge.as_es && !shader->key.ge.as_ngg) ||
+ (stage == MESA_SHADER_TESS_EVAL && shader->key.ge.as_es && !shader->key.ge.as_ngg) ||
+ (stage == MESA_SHADER_GEOMETRY && !shader->key.ge.as_ngg))
+ return 64;
+
+ if (stage == MESA_SHADER_COMPUTE)
+ return sscreen->debug_flags & DBG(W32_CS) ? 32 : 64;
+
+ if (stage == MESA_SHADER_FRAGMENT)
+ return sscreen->debug_flags & DBG(W32_PS) ? 32 : 64;
+
+ return sscreen->debug_flags & DBG(W32_GE) ? 32 : 64;
+}
+
/* SHADER_CACHE */
/**
main_part->key.ge.as_ngg = key->ge.as_ngg;
}
main_part->is_monolithic = false;
- main_part->wave_size = si_get_shader_wave_size(sscreen, main_part);
+ main_part->wave_size = si_determine_wave_size(sscreen, main_part);
if (!si_compile_shader(sscreen, compiler_state->compiler, main_part,
&compiler_state->debug)) {
shader->selector = sel;
*((SHADER_KEY_TYPE*)&shader->key) = *key;
- shader->wave_size = si_get_shader_wave_size(sscreen, shader);
+ shader->wave_size = si_determine_wave_size(sscreen, shader);
shader->compiler_ctx_state.compiler = &sctx->compiler;
shader->compiler_ctx_state.debug = sctx->debug;
shader->compiler_ctx_state.is_debug_context = sctx->is_debug;
sel->info.stage == MESA_SHADER_TESS_EVAL || sel->info.stage == MESA_SHADER_GEOMETRY))
shader->key.ge.as_ngg = 1;
- shader->wave_size = si_get_shader_wave_size(sscreen, shader);
+ shader->wave_size = si_determine_wave_size(sscreen, shader);
if (sel->nir) {
if (sel->info.stage <= MESA_SHADER_GEOMETRY) {