ARM: dts: imx53-ppd: Fix ACHC entry

PPD has only one ACHC device, which effectively is a Kinetis
microcontroller. It has one SPI interface used for normal
communication. Additionally it's possible to flash the device
firmware using NXP's EzPort protocol by correctly driving a
second chip select pin and the device reset pin.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20210802172309.164365-3-sebastian.reichel@collabora.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/arch/arm/boot/dts/imx53-ppd.dts b/arch/arm/boot/dts/imx53-ppd.dts
index 5a5fa61..37d0cff 100644 (file)
--- a/arch/arm/boot/dts/imx53-ppd.dts
+++ b/arch/arm/boot/dts/imx53-ppd.dts
@@ -70,6 +70,12 @@
                clock-frequency = <11289600>;
        };
 
+       achc_24M: achc-clock {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <24000000>;
+       };
+
        sgtlsound: sound {
                compatible = "fsl,imx53-cpuvo-sgtl5000",
                             "fsl,imx-audio-sgtl5000";
@@ -314,16 +320,13 @@
                    &gpio4 12 GPIO_ACTIVE_LOW>;
        status = "okay";
 
-       spidev0: spi@0 {
-               compatible = "ge,achc";
-               reg = <0>;
-               spi-max-frequency = <1000000>;
-       };
-
-       spidev1: spi@1 {
-               compatible = "ge,achc";
-               reg = <1>;
-               spi-max-frequency = <1000000>;
+       spidev0: spi@1 {
+               compatible = "ge,achc", "nxp,kinetis-k20";
+               reg = <1>, <0>;
+               vdd-supply = <&reg_3v3>;
+               vdda-supply = <&reg_3v3>;
+               clocks = <&achc_24M>;
+               reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
        };
 
        gpioxra0: gpio@2 {