There is no longer a ras dependency so it's safe to expose
on all boards.
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].version = 0x01;
priv->smu_tables.entry[TABLE_ACTIVITY_MONITOR_COEFF].size = sizeof(DpmActivityMonitorCoeffInt_t);
- if (adev->psp.ras.ras) {
- ret = smu_v11_0_i2c_control_init(&adev->pm.smu_i2c);
- if (ret)
- goto err4;
- }
+ ret = smu_v11_0_i2c_control_init(&adev->pm.smu_i2c);
+ if (ret)
+ goto err4;
return 0;
(struct vega20_smumgr *)(hwmgr->smu_backend);
struct amdgpu_device *adev = hwmgr->adev;
- if (adev->psp.ras.ras)
- smu_v11_0_i2c_control_fini(&adev->pm.smu_i2c);
+ smu_v11_0_i2c_control_fini(&adev->pm.smu_i2c);
if (priv) {
amdgpu_bo_free_kernel(&priv->smu_tables.entry[TABLE_PPTABLE].handle,