vpu: code coverity fix
authorEvoke Zhang <evoke.zhang@amlogic.com>
Wed, 20 Jun 2018 07:15:45 +0000 (15:15 +0800)
committerJianxin Pan <jianxin.pan@amlogic.com>
Mon, 25 Jun 2018 05:29:29 +0000 (22:29 -0700)
PD#168737: vpu: code coverity fix

Change-Id: Icbeb972a7022531c9146559046c1bddd28f44ab3
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
drivers/amlogic/media/common/vpu/vpu.c

index 19e5ad6..590877d 100644 (file)
@@ -268,12 +268,18 @@ static int set_vpu_clk(unsigned int vclk)
                ret = 1;
                VPUERR("set vpu clk out of supported range\n");
                goto set_vpu_clk_limit;
-       } else if (clk_level < vpu_conf.data->clk_level_dft) {
+       }
 #ifdef LIMIT_VPU_CLK_LOW
+       if (clk_level < vpu_conf.data->clk_level_dft) {
                ret = 3;
                VPUERR("set vpu clk less than system default\n");
                goto set_vpu_clk_limit;
+       }
 #endif
+       if (clk_level >= sizeof(vpu_clk_table) / sizeof(struct vpu_clk_s)) {
+               ret = 7;
+               VPUERR("clk_level %d is invalid\n", clk_level);
+               goto set_vpu_clk_limit;
        }
 
        clk = get_vpu_clk();
@@ -382,10 +388,12 @@ int request_vpu_clk_vmod(unsigned int vclk, unsigned int vmod)
 
        vpu_conf.clk_vmod[vmod] = clk_level;
        if (vpu_debug_print_flag) {
-               VPUPR("request vpu clk: %s %uHz\n",
-                       vpu_mod_table[vmod],
-                       vpu_clk_table[clk_level].freq);
-               dump_stack();
+               if (vmod < VPU_MOD_MAX) {
+                       VPUPR("request vpu clk: %s %uHz\n",
+                               vpu_mod_table[vmod],
+                               vpu_clk_table[clk_level].freq);
+                       dump_stack();
+               }
        }
 
        clk_level = get_vpu_clk_level_max_vmod();
@@ -439,8 +447,10 @@ int release_vpu_clk_vmod(unsigned int vmod)
        clk_level = 0;
        vpu_conf.clk_vmod[vmod] = clk_level;
        if (vpu_debug_print_flag) {
-               VPUPR("release vpu clk: %s\n", vpu_mod_table[vmod]);
-               dump_stack();
+               if (vmod < VPU_MOD_MAX) {
+                       VPUPR("release vpu clk: %s\n", vpu_mod_table[vmod]);
+                       dump_stack();
+               }
        }
 
        clk_level = get_vpu_clk_level_max_vmod();
@@ -512,10 +522,12 @@ void switch_vpu_mem_pd_vmod(unsigned int vmod, int flag)
        if (table[i].vmod == VPU_MOD_MAX)
                VPUPR("switch_vpu_mem_pd: unsupport vpu mod: %d\n", vmod);
        if (vpu_debug_print_flag) {
-               VPUPR("switch_vpu_mem_pd: %s %s\n",
-                       vpu_mod_table[vmod],
-                       ((flag == VPU_MEM_POWER_ON) ? "ON" : "OFF"));
-               dump_stack();
+               if (vmod < VPU_MOD_MAX) {
+                       VPUPR("switch_vpu_mem_pd: %s %s\n",
+                               vpu_mod_table[vmod],
+                               ((flag == VPU_MEM_POWER_ON) ? "ON" : "OFF"));
+                       dump_stack();
+               }
        }
 }
 
@@ -638,10 +650,12 @@ void switch_vpu_clk_gate_vmod(unsigned int vmod, int flag)
                VPUPR("switch_vpu_clk_gate: unsupport vpu mod: %d\n", vmod);
 
        if (vpu_debug_print_flag) {
-               VPUPR("switch_vpu_clk_gate: %s %s\n",
-                       vpu_mod_table[vmod],
-                       ((flag == VPU_CLK_GATE_ON) ? "ON" : "OFF"));
-               dump_stack();
+               if (vmod < VPU_MAX) {
+                       VPUPR("switch_vpu_clk_gate: %s %s\n",
+                               vpu_mod_table[vmod],
+                               ((flag == VPU_CLK_GATE_ON) ? "ON" : "OFF"));
+                       dump_stack();
+               }
        }
 }
 
@@ -737,6 +751,7 @@ static ssize_t vpu_clk_debug(struct class *class, struct class_attribute *attr,
                tmp[0] = VPU_MOD_MAX;
                ret = sscanf(buf, "dump %u", &tmp[0]);
                if (ret == 1) {
+                       tmp[0] = (tmp[0] >= VPU_MOD_MAX) ? VPU_MOD_MAX : tmp[0];
                        VPUPR("clk holdings:\n");
                        pr_info("%s:  %uHz(%u)\n", vpu_mod_table[tmp[0]],
                                vpu_clk_table[vpu_conf.clk_vmod[tmp[0]]].freq,