drm/amd/display: Set minimum requirement for using PSR-SU on Phoenix
authorMario Limonciello <mario.limonciello@amd.com>
Fri, 23 Jun 2023 15:05:21 +0000 (10:05 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Jun 2023 17:11:36 +0000 (13:11 -0400)
The same parade TCON issue can potentially happen on Phoenix, and the same
PSR resilience changes have been ported into the DMUB firmware.

Don't allow running PSR-SU unless on the newer firmware.

Cc: stable@vger.kernel.org
Cc: Sean Wang <sean.ns.wang@amd.com>
Cc: Marc Rossi <Marc.Rossi@amd.com>
Cc: Hamza Mahfooz <Hamza.Mahfooz@amd.com>
Cc: Tsung-hua (Ryan) Lin <Tsung-hua.Lin@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c
drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.h
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c

index 48a06db..f161aeb 100644 (file)
@@ -60,3 +60,8 @@ const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs = {
        { DMUB_DCN31_FIELDS() },
 #undef DMUB_SF
 };
+
+bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub)
+{
+       return dmub->fw_version >= DMUB_FW_VERSION(8, 0, 16);
+}
index 674267a..f213bd8 100644 (file)
@@ -30,4 +30,6 @@
 
 extern const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs;
 
+bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub);
+
 #endif /* _DMUB_DCN314_H_ */
index 7a31e3e..bdaf438 100644 (file)
@@ -228,6 +228,7 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
        case DMUB_ASIC_DCN316:
                if (asic == DMUB_ASIC_DCN314) {
                        dmub->regs_dcn31 = &dmub_srv_dcn314_regs;
+                       funcs->is_psrsu_supported = dmub_dcn314_is_psrsu_supported;
                } else if (asic == DMUB_ASIC_DCN315) {
                        dmub->regs_dcn31 = &dmub_srv_dcn315_regs;
                } else if (asic == DMUB_ASIC_DCN316) {