drm/i915: add rc6 residency times to debugfs
authorBen Widawsky <ben@bwidawsk.net>
Wed, 28 Mar 2012 01:59:38 +0000 (18:59 -0700)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Thu, 12 Apr 2012 19:14:04 +0000 (21:14 +0200)
RC6 residency should be in intervals of 1.28us, and the counter wraps.
Here is an example using awk to get the various RC6 and RC6+ residency
times in seconds, since boot.

cat /sys/kernel/debug/dri/0/i915_drpc_info  | grep residency | awk -F':' -F' '  '{print $5 * 1.28 / 1000000}'

This is primarily for QA, but has other applications as well. An
upcoming patch to add interfaces should be more interesting to
application developers.

v2: move comment to the correct place

v3: display with %u instead of %d, for Ouping

CC: Ouping Zhang <ouping.zhang@intel.com>
Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_reg.h

index 967fb92..97c9630 100644 (file)
@@ -1171,6 +1171,17 @@ static int gen6_drpc_info(struct seq_file *m)
 
        seq_printf(m, "Core Power Down: %s\n",
                   yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
+
+       /* Not exactly sure what this is */
+       seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
+                  I915_READ(GEN6_GT_GFX_RC6_LOCKED));
+       seq_printf(m, "RC6 residency since boot: %u\n",
+                  I915_READ(GEN6_GT_GFX_RC6));
+       seq_printf(m, "RC6+ residency since boot: %u\n",
+                  I915_READ(GEN6_GT_GFX_RC6p));
+       seq_printf(m, "RC6++ residency since boot: %u\n",
+                  I915_READ(GEN6_GT_GFX_RC6pp));
+
        return 0;
 }
 
index 6924f44..972321f 100644 (file)
                                                 GEN6_PM_RP_DOWN_THRESHOLD | \
                                                 GEN6_PM_RP_DOWN_TIMEOUT)
 
+#define GEN6_GT_GFX_RC6_LOCKED                 0x138104
+#define GEN6_GT_GFX_RC6                                0x138108
+#define GEN6_GT_GFX_RC6p                       0x13810C
+#define GEN6_GT_GFX_RC6pp                      0x138110
+
 #define GEN6_PCODE_MAILBOX                     0x138124
 #define   GEN6_PCODE_READY                     (1<<31)
 #define   GEN6_READ_OC_PARAMS                  0xc