* config/epiphany/predicates.md (move_double_src_operand):

        Check that misaligned addresses are offsettable.
        (move_dest_operand): Likewise.
        * config/epiphany/epiphany.c (REG_OK_FOR_BASE_P): Don't force a
        misaligned stack address to reg+index.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@193894 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index aa88b76..ef32e39 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2012-11-28  Joern Rennecke  <joern.rennecke@embecosm.com>
+
+       * config/epiphany/predicates.md (move_double_src_operand):
+       Check that misaligned addresses are offsettable.
+       (move_dest_operand): Likewise.
+       * config/epiphany/epiphany.c (REG_OK_FOR_BASE_P): Don't force a
+       misaligned stack address to reg+index.
+
 2012-11-28  Oleg Raikhman  <oleg@adapteva.com>
 
        * config/epiphany/epiphany.h (ASM_OUTPUT_ALIGN_WITH_NOP): Define.

diff --git a/gcc/config/epiphany/epiphany.c b/gcc/config/epiphany/epiphany.c
index 88079d2..8901c4a 100644 (file)
--- a/gcc/config/epiphany/epiphany.c
+++ b/gcc/config/epiphany/epiphany.c
@@ -1963,6 +1963,14 @@ epiphany_legitimate_address_p (enum machine_mode mode, rtx x, bool strict)
     return true;
   if (LEGITIMATE_OFFSET_ADDRESS_P (mode, x))
     return true;
+  /* If this is a misaligned stack access, don't force it to reg+index.  */
+  if (GET_MODE_SIZE (mode) == 8
+      && GET_CODE (x) == PLUS && XEXP (x, 0) == stack_pointer_rtx
+      /* Decomposed to SImode; GET_MODE_SIZE (SImode) == 4 */
+      && !(INTVAL (XEXP (x, 1)) & 3)
+      && INTVAL (XEXP (x, 1)) >= -2047 * 4
+      && INTVAL (XEXP (x, 1)) <=  2046 * 4)
+    return true;
   if (TARGET_POST_INC
       && (GET_CODE (x) == POST_DEC || GET_CODE (x) == POST_INC)
       && RTX_OK_FOR_BASE_P (XEXP ((x), 0)))

diff --git a/gcc/config/epiphany/predicates.md b/gcc/config/epiphany/predicates.md
index 4cbff58..f47f832 100644 (file)
--- a/gcc/config/epiphany/predicates.md
+++ b/gcc/config/epiphany/predicates.md
@@ -164,6 +164,9 @@
 (define_predicate "move_double_src_operand"
   (match_code "reg,subreg,mem,const_int,const_double,const_vector")
 {
+  if (GET_CODE (op) == MEM && misaligned_operand (op, mode)
+      && !address_operand (plus_constant (XEXP (op, 0), 4), SImode))
+    return 0;
   return general_operand (op, mode);
 })
 
@@ -188,6 +191,9 @@
          return register_operand (op, mode);
        }
     case MEM :
+      if (GET_MODE_SIZE (mode) == 8 && misaligned_operand (op, mode)
+         && !address_operand (plus_constant (XEXP (op, 0), 4), SImode))
+       return 0;
       return address_operand (XEXP (op, 0), mode);
     default :
       return 0;