arm64: dts: rockchip: Enable Ethernet for Radxa CM3 IO

Add ethernet nodes for enabling gmac1 on the Radxa CM3 IO board.

Signed-off-by: Manoj Sai <abbaraju.manojsai@amarulasolutions.com>
Link: https://lore.kernel.org/r/20230125161023.12115-1-jagan@amarulasolutions.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts
index 3e6578f..170af01 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-cm3-io.dts
@@ -21,6 +21,13 @@
                stdout-path = "serial2:1500000n8";
        };
 
+       gmac1_clkin: external-gmac1-clock {
+               compatible = "fixed-clock";
+               clock-frequency = <125000000>;
+               clock-output-names = "gmac1_clkin";
+               #clock-cells = <0>;
+       };
+
        hdmi-con {
                compatible = "hdmi-connector";
                type = "a";
@@ -83,6 +90,29 @@
        status = "okay";
 };
 
+&gmac1 {
+       assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
+       assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
+       assigned-clock-rates = <0>, <125000000>;
+       clock_in_out = "input";
+       phy-handle = <&rgmii_phy1>;
+       phy-mode = "rgmii";
+       pinctrl-names = "default";
+       pinctrl-0 = <&gmac1m0_miim
+                    &gmac1m0_tx_bus2
+                    &gmac1m0_rx_bus2
+                    &gmac1m0_rgmii_clk
+                    &gmac1m0_rgmii_bus
+                    &gmac1m0_clkinout>;
+       snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+       snps,reset-active-low;
+       /* Reset time is 20ms, 100ms for rtl8211f */
+       snps,reset-delays-us = <0 20000 100000>;
+       tx_delay = <0x46>;
+       rx_delay = <0x2e>;
+       status = "okay";
+};
+
 &hdmi {
        avdd-0v9-supply = <&vdda0v9_image>;
        avdd-1v8-supply = <&vcca1v8_image>;
@@ -105,7 +135,70 @@
        status = "okay";
 };
 
+&mdio1 {
+       rgmii_phy1: ethernet-phy@0 {
+               compatible="ethernet-phy-ieee802.3-c22";
+               reg= <0x0>;
+       };
+};
+
 &pinctrl {
+       gmac1 {
+               gmac1m0_miim: gmac1m0-miim {
+                       rockchip,pins =
+                               /* gmac1_mdcm0 */
+                               <3 RK_PC4 3 &pcfg_pull_none_drv_level_15>,
+                               /* gmac1_mdiom0 */
+                               <3 RK_PC5 3 &pcfg_pull_none_drv_level_15>;
+               };
+
+               gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
+                       rockchip,pins =
+                               /* gmac1_rxd0m0 */
+                               <3 RK_PB1 3 &pcfg_pull_none_drv_level_15>,
+                               /* gmac1_rxd1m0 */
+                               <3 RK_PB2 3 &pcfg_pull_none_drv_level_15>,
+                               /* gmac1_rxdvcrsm0 */
+                               <3 RK_PB3 3 &pcfg_pull_none_drv_level_15>;
+               };
+
+               gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
+                       rockchip,pins =
+                               /* gmac1_txd0m0 */
+                               <3 RK_PB5 3 &pcfg_pull_none_drv_level_15>,
+                               /* gmac1_txd1m0 */
+                               <3 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
+                               /* gmac1_txenm0 */
+                               <3 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
+               };
+
+               gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
+                       rockchip,pins =
+                               /* gmac1_rxclkm0 */
+                               <3 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
+                               /* gmac1_txclkm0 */
+                               <3 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
+               };
+
+               gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
+                       rockchip,pins =
+                               /* gmac1_rxd2m0 */
+                               <3 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
+                               /* gmac1_rxd3m0 */
+                               <3 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
+                               /* gmac1_txd2m0 */
+                               <3 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
+                               /* gmac1_txd3m0 */
+                               <3 RK_PA3 3 &pcfg_pull_none_drv_level_15>;
+               };
+
+               gmac1m0_clkinout: gmac1m0-clkinout {
+                       rockchip,pins =
+                               /* gmac1_mclkinoutm0 */
+                               <3 RK_PC0 3 &pcfg_pull_none_drv_level_15>;
+               };
+       };
+
        leds {
                pi_nled_activity: pi-nled-activity {
                        rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;