arm: dts: Add support for A72 specific AM68 Starter Kit Base Board

The SK architecture comprises of baseboard and a SOM board. The
AM68 Starter Kit's baseboard contains most of the actual connectors,
power supply etc. The System on Module (SoM) is plugged on to the base
board. Therefore, add support for peripherals brought out in the base
board.

Schematics: https://www.ti.com/lit/zip/SPRR463

Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 8e83194..d397076 100644 (file)
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1254,7 +1254,8 @@ dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \
                              k3-j7200-r5-common-proc-board.dtb \
                              k3-j721e-sk.dtb \
                              k3-j721e-r5-sk.dtb
-dtb-$(CONFIG_SOC_K3_J721S2) += k3-j721s2-common-proc-board.dtb\
+dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-base-board.dtb\
+                              k3-j721s2-common-proc-board.dtb\
                               k3-j721s2-r5-common-proc-board.dtb
 dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-evm.dtb \
                              k3-am642-r5-evm.dtb \

diff --git a/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
new file mode 100644 (file)
index 0000000..12faaae
--- /dev/null
+++ b/arch/arm/dts/k3-am68-sk-base-board-u-boot.dtsi
@@ -0,0 +1,150 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+/ {
+       chosen {
+               stdout-path = "serial2:115200n8";
+               tick-timer = &timer1;
+       };
+
+       aliases {
+               serial0 = &wkup_uart0;
+               serial1 = &mcu_uart0;
+               serial2 = &main_uart8;
+               i2c0 = &wkup_i2c0;
+               i2c1 = &mcu_i2c0;
+               i2c2 = &mcu_i2c1;
+               i2c3 = &main_i2c0;
+               ethernet0 = &cpsw_port1;
+               mmc1 = &main_sdhci1;
+       };
+};
+
+&wkup_i2c0 {
+       u-boot,dm-spl;
+};
+
+&cbass_main {
+       u-boot,dm-spl;
+};
+
+&main_navss {
+       u-boot,dm-spl;
+};
+
+&cbass_mcu_wakeup {
+       u-boot,dm-spl;
+
+       timer1: timer@40400000 {
+               compatible = "ti,omap5430-timer";
+               reg = <0x0 0x40400000 0x0 0x80>;
+               ti,timer-alwon;
+               clock-frequency = <250000000>;
+               u-boot,dm-spl;
+       };
+
+       chipid@43000014 {
+               u-boot,dm-spl;
+       };
+};
+
+&mcu_navss {
+       u-boot,dm-spl;
+};
+
+&mcu_ringacc {
+       reg =   <0x0 0x2b800000 0x0 0x400000>,
+               <0x0 0x2b000000 0x0 0x400000>,
+               <0x0 0x28590000 0x0 0x100>,
+               <0x0 0x2a500000 0x0 0x40000>,
+               <0x0 0x28440000 0x0 0x40000>;
+       reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target", "cfg";
+       u-boot,dm-spl;
+};
+
+&mcu_udmap {
+       reg =   <0x0 0x285c0000 0x0 0x100>,
+               <0x0 0x284c0000 0x0 0x4000>,
+               <0x0 0x2a800000 0x0 0x40000>,
+               <0x0 0x284a0000 0x0 0x4000>,
+               <0x0 0x2aa00000 0x0 0x40000>,
+               <0x0 0x28400000 0x0 0x2000>;
+       reg-names = "gcfg", "rchan", "rchanrt", "tchan",
+                   "tchanrt", "rflow";
+       u-boot,dm-spl;
+};
+
+&secure_proxy_main {
+       u-boot,dm-spl;
+};
+
+&sms {
+       u-boot,dm-spl;
+       k3_sysreset: sysreset-controller {
+               compatible = "ti,sci-sysreset";
+               u-boot,dm-spl;
+       };
+};
+
+&main_pmx0 {
+       u-boot,dm-spl;
+};
+
+&main_uart8_pins_default {
+       u-boot,dm-spl;
+};
+
+&main_mmc1_pins_default {
+       u-boot,dm-spl;
+};
+
+&wkup_pmx0 {
+       u-boot,dm-spl;
+};
+
+&k3_pds {
+       u-boot,dm-spl;
+};
+
+&k3_clks {
+       u-boot,dm-spl;
+};
+
+&k3_reset {
+       u-boot,dm-spl;
+};
+
+&main_uart8 {
+       u-boot,dm-spl;
+};
+
+&mcu_uart0 {
+       u-boot,dm-spl;
+};
+
+&wkup_uart0 {
+       u-boot,dm-spl;
+};
+
+&mcu_cpsw {
+       reg = <0x0 0x46000000 0x0 0x200000>,
+             <0x0 0x40f00200 0x0 0x8>;
+       reg-names = "cpsw_nuss", "mac_efuse";
+       /delete-property/ ranges;
+
+       cpsw-phy-sel@40f04040 {
+               compatible = "ti,am654-cpsw-phy-sel";
+               reg= <0x0 0x40f04040 0x0 0x4>;
+               reg-names = "gmii-sel";
+       };
+};
+
+&main_sdhci0 {
+       status = "disabled";
+};
+
+&main_sdhci1 {
+       u-boot,dm-spl;
+};

diff --git a/arch/arm/dts/k3-am68-sk-base-board.dts b/arch/arm/dts/k3-am68-sk-base-board.dts
new file mode 100644 (file)
index 0000000..8fc0332
--- /dev/null
+++ b/arch/arm/dts/k3-am68-sk-base-board.dts
@@ -0,0 +1,353 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
+ *
+ * Base Board: **Yet to Add**
+ */
+
+/dts-v1/;
+
+#include "k3-am68-sk-som.dtsi"
+#include <dt-bindings/net/ti-dp83867.h>
+#include <dt-bindings/phy/phy-cadence.h>
+#include <dt-bindings/phy/phy.h>
+
+/ {
+       compatible = "ti,am68-sk", "ti,j721s2";
+       model = "Texas Instruments AM68 SK";
+
+       chosen {
+               stdout-path = "serial2:115200n8";
+               bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x2880000";
+       };
+
+       aliases {
+               serial2 = &main_uart8;
+               mmc1 = &main_sdhci1;
+       };
+
+       vusb_main: fixedregulator-vusb-main5v0 {
+               /* USB MAIN INPUT 5V DC */
+               compatible = "regulator-fixed";
+               regulator-name = "vusb-main5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       vsys_3v3: fixedregulator-vsys3v3 {
+               /* Output of LM5141 */
+               compatible = "regulator-fixed";
+               regulator-name = "vsys_3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&vusb_main>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       vdd_mmc1: fixedregulator-sd {
+               /* Output of TPS22918 */
+               compatible = "regulator-fixed";
+               regulator-name = "vdd_mmc1";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               enable-active-high;
+               vin-supply = <&vsys_3v3>;
+               gpio = <&exp1 10 GPIO_ACTIVE_HIGH>;
+       };
+
+       vdd_sd_dv: gpio-regulator-TLV71033 {
+               /* Output of TLV71033 */
+               compatible = "regulator-gpio";
+               regulator-name = "tlv71033";
+               pinctrl-names = "default";
+               pinctrl-0 = <&vdd_sd_dv_pins_default>;
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-boot-on;
+               vin-supply = <&vsys_3v3>;
+               gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
+               states = <1800000 0x0>,
+                        <3300000 0x1>;
+       };
+};
+
+&main_pmx0 {
+       main_uart8_pins_default: main-uart8-pins-default {
+               pinctrl-single,pins = <
+                       J721S2_IOPAD(0x040, PIN_INPUT, 14) /* (AC28) MCASP0_AXR0.UART8_CTSn */
+                       J721S2_IOPAD(0x044, PIN_OUTPUT, 14) /* (Y26) MCASP0_AXR1.UART8_RTSn */
+                       J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
+                       J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
+               >;
+       };
+
+       main_i2c0_pins_default: i2c0-pins-default {
+               pinctrl-single,pins = <
+                       J721S2_IOPAD(0x0e0, PIN_INPUT_PULLUP, 0) /* (AH25) I2C0_SCL */
+                       J721S2_IOPAD(0x0e4, PIN_INPUT_PULLUP, 0) /* (AE24) I2C0_SDA */
+               >;
+       };
+
+       main_mmc1_pins_default: main-mmc1-pins-default {
+               pinctrl-single,pins = <
+                       J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
+                       J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
+                       J721S2_IOPAD(0x100, PIN_INPUT, 0) /* (###) MMC1_CLKLB */
+                       J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
+                       J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
+                       J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
+                       J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
+                       J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
+               >;
+       };
+
+       vdd_sd_dv_pins_default: vdd-sd-dv-pins-default {
+               pinctrl-single,pins = <
+                       J721S2_IOPAD(0x0c4, PIN_INPUT, 7) /* (AB26) ECAP0_IN_APWM_OUT.GPIO0_49 */
+               >;
+       };
+};
+
+&wkup_pmx0 {
+       mcu_cpsw_pins_default: mcu-cpsw-pins-default {
+               pinctrl-single,pins = <
+                       J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
+                       J721S2_WKUP_IOPAD(0x090, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
+                       J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
+                       J721S2_WKUP_IOPAD(0x088, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
+                       J721S2_WKUP_IOPAD(0x084, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
+                       J721S2_WKUP_IOPAD(0x06c, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
+                       J721S2_WKUP_IOPAD(0x07c, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
+                       J721S2_WKUP_IOPAD(0x078, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
+                       J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
+                       J721S2_WKUP_IOPAD(0x070, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
+                       J721S2_WKUP_IOPAD(0x080, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
+                       J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
+               >;
+       };
+
+       mcu_mdio_pins_default: mcu-mdio-pins-default {
+               pinctrl-single,pins = <
+                       J721S2_WKUP_IOPAD(0x09c, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
+                       J721S2_WKUP_IOPAD(0x098, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
+               >;
+       };
+};
+
+&main_gpio2 {
+       status = "disabled";
+};
+
+&main_gpio4 {
+       status = "disabled";
+};
+
+&main_gpio6 {
+       status = "disabled";
+};
+
+&wkup_gpio1 {
+       status = "disabled";
+};
+
+&wkup_uart0 {
+       status = "reserved";
+};
+
+&main_uart0 {
+       status = "disabled";
+};
+
+&main_uart1 {
+       status = "disabled";
+};
+
+&main_uart2 {
+       status = "disabled";
+};
+
+&main_uart3 {
+       status = "disabled";
+};
+
+&main_uart4 {
+       status = "disabled";
+};
+
+&main_uart5 {
+       status = "disabled";
+};
+
+&main_uart6 {
+       status = "disabled";
+};
+
+&main_uart7 {
+       status = "disabled";
+};
+
+&main_uart8 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_uart8_pins_default>;
+       /* Shared with TFA on this platform */
+       power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
+};
+
+&main_uart9 {
+       status = "disabled";
+};
+
+&main_i2c0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&main_i2c0_pins_default>;
+       clock-frequency = <400000>;
+
+       exp1: gpio@21 {
+               compatible = "ti,tca6416";
+               reg = <0x21>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               gpio-line-names = "CSI_VIO_SEL", "CSI_SEL_FPC_EXPN", "HDMI_PDN",
+                                 "HDMI_LS_OE", "DP0_3V3_EN", "BOARDID_EEPROM_WP",
+                                 "CAN_STB", "","GPIO_uSD_PWR_EN", "EDP_ENABLE",
+                                 "IO_EXP_PCIE1_M2_RSTZ", "IO_EXP_MCU_RGMII_RSTZ",
+                                 "IO_EXP_CSI1_EXP_RSTZ", "","CSI0_B_GPIO1",
+                                 "CSI1_B_GPIO1";
+       };
+};
+
+&main_i2c1 {
+       status = "disabled";
+};
+
+&main_i2c2 {
+       status = "disabled";
+};
+
+&main_i2c3 {
+       status = "disabled";
+};
+
+&main_i2c4 {
+       status = "disabled";
+};
+
+&main_i2c5 {
+       status = "disabled";
+};
+
+&main_i2c6 {
+       status = "disabled";
+};
+
+&main_sdhci0 {
+       status = "disabled";
+};
+
+&main_sdhci1 {
+       /* SD card */
+       pinctrl-0 = <&main_mmc1_pins_default>;
+       pinctrl-names = "default";
+       disable-wp;
+       vmmc-supply = <&vdd_mmc1>;
+       vqmmc-supply = <&vdd_sd_dv>;
+};
+
+&mcu_cpsw {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
+};
+
+&davinci_mdio {
+       phy0: ethernet-phy@0 {
+               reg = <0>;
+               ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
+               ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
+               ti,min-output-impedance;
+       };
+};
+
+&cpsw_port1 {
+       phy-mode = "rgmii-rxid";
+       phy-handle = <&phy0>;
+};
+
+&mcu_mcan0 {
+       status = "disabled";
+};
+
+&mcu_mcan1 {
+       status = "disabled";
+};
+
+&main_mcan0 {
+       status = "disabled";
+};
+
+&main_mcan1 {
+       status = "disabled";
+};
+
+&main_mcan2 {
+       status = "disabled";
+};
+
+&main_mcan3 {
+       status = "disabled";
+};
+
+&main_mcan4 {
+       status = "disabled";
+};
+
+&main_mcan5 {
+       status = "disabled";
+};
+
+&main_mcan6 {
+       status = "disabled";
+};
+
+&main_mcan7 {
+       status = "disabled";
+};
+
+&main_mcan8 {
+       status = "disabled";
+};
+
+&main_mcan9 {
+       status = "disabled";
+};
+
+&main_mcan10 {
+       status = "disabled";
+};
+
+&main_mcan11 {
+       status = "disabled";
+};
+
+&main_mcan12 {
+       status = "disabled";
+};
+
+&main_mcan13 {
+       status = "disabled";
+};
+
+&main_mcan14 {
+       status = "disabled";
+};
+
+&main_mcan15 {
+       status = "disabled";
+};
+
+&main_mcan17 {
+       status = "disabled";
+};