Add VMRG/VSHF/VCP/VEX isntructions. Add regression tests too.
Also add new patterns to parse new UImm4 oeprand.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D90292
}
return false;
}
+ bool isUImm4() {
+ if (!isImm())
+ return false;
+
+ // Constant case
+ if (const auto *ConstExpr = dyn_cast<MCConstantExpr>(Imm.Val)) {
+ int64_t Value = ConstExpr->getValue();
+ return isUInt<4>(Value);
+ }
+ return false;
+ }
bool isUImm6() {
if (!isImm())
return false;
addImmOperands(Inst, N);
}
+ void addUImm4Operands(MCInst &Inst, unsigned N) const {
+ addImmOperands(Inst, N);
+ }
+
void addUImm6Operands(MCInst &Inst, unsigned N) const {
addImmOperands(Inst, N);
}
let ParserMatchClass = UImm3AsmOperand;
}
+// uimm4 - Generic immediate value.
+def UImm4AsmOperand : AsmOperandClass {
+ let Name = "UImm4";
+}
+def uimm4 : Operand<i32>, PatLeaf<(imm), [{
+ return isUInt<4>(N->getZExtValue()); }], ULO7> {
+ let ParserMatchClass = UImm4AsmOperand;
+}
+
// uimm6 - Generic immediate value.
def UImm6AsmOperand : AsmOperandClass {
let Name = "UImm6";
defm vvi : RVIlm<opcStr, ", $vy, $vz, $sy", opc, VRC,
(ins VRC:$vy, VRC:$vz, simm7fp:$sy)>;
}
+// special RV multiclass with 3 arguments for VSHF.
+// e.g. VSHF
+let vy = ?, vz = ?, VE_VLIndex = 4 in
+multiclass RVSHFm<string opcStr, bits<8>opc, RegisterClass RC,
+ Operand SIMM = uimm4> {
+ defm vvr : RVlm<opcStr, ", $vy, $vz, $sy", opc, RC,
+ (ins RC:$vy, RC:$vz, I64:$sy)>;
+ let cy = 0 in defm vvi : RVlm<opcStr, ", $vy, $vz, $sy", opc, RC,
+ (ins RC:$vy, RC:$vz, SIMM:$sy)>;
+}
// Section 8.10.1 - VADD (Vector Add)
let cx = 0, cx2 = 0 in
// Section 8.15.7 - VFIMS (Vector Floating Iteration Multiply and Subtract)
let cx = 0 in defm VFIMSD : RVI3m<"vfims.d", 0xff, V64, I64>;
let cx = 1 in defm VFIMSS : RVI3m<"vfims.s", 0xff, V64, F32>;
+
+//-----------------------------------------------------------------------------
+// Section 8.16 - Vector Merger Operation Instructions
+//-----------------------------------------------------------------------------
+
+// Section 8.16.1 - VMRG (Vector Merge)
+let cx = 0 in defm VMRG : RVm<"vmrg", 0xd6, V64, I64, VM>;
+// FIXME: vmrg.w should be called as pvmrg, but following assembly manual.
+let cx = 1 in defm VMRGW : RVm<"vmrg.w", 0xd6, V64, I64, VM512>;
+def : MnemonicAlias<"vmrg.l", "vmrg">;
+
+// Section 8.16.2 - VSHF (Vector Shuffle)
+defm VSHF : RVSHFm<"vshf", 0xbc, V64>;
+
+// Section 8.16.3 - VCP (Vector Compress)
+defm VCP : RV1m<"vcp", 0x8d, V64, VM>;
+
+// Section 8.16.4 - VEX (Vector Expand)
+defm VEX : RV1m<"vex", 0x9d, V64, VM>;
--- /dev/null
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vcp %v11, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x00,0x8d]
+vcp %v11, %v22
+
+# CHECK-INST: vcp %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0xff,0x00,0x00,0x00,0x8d]
+vcp %vix, %vix
+
+# CHECK-INST: vcp %vix, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x00,0x00,0x8d]
+vcp %vix, %v22
+
+# CHECK-INST: vcp %v11, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x0b,0x8d]
+vcp %v11, %v22, %vm11
+
+# CHECK-INST: vcp %v11, %vix, %vm11
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0x0b,0x00,0x00,0x0b,0x8d]
+vcp %v11, %vix, %vm11
+
+# CHECK-INST: vcp %v12, %v20, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x14,0x00,0x0c,0x00,0x00,0x0c,0x8d]
+vcp %v12, %v20, %vm12
--- /dev/null
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vex %v11, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x00,0x9d]
+vex %v11, %v22
+
+# CHECK-INST: vex %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0xff,0x00,0x00,0x00,0x9d]
+vex %vix, %vix
+
+# CHECK-INST: vex %vix, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x00,0x00,0x9d]
+vex %vix, %v22
+
+# CHECK-INST: vex %v11, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x00,0x0b,0x9d]
+vex %v11, %v22, %vm11
+
+# CHECK-INST: vex %v11, %vix, %vm11
+# CHECK-ENCODING: encoding: [0x00,0xff,0x00,0x0b,0x00,0x00,0x0b,0x9d]
+vex %v11, %vix, %vm11
+
+# CHECK-INST: vex %v12, %v20, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x14,0x00,0x0c,0x00,0x00,0x0c,0x9d]
+vex %v12, %v20, %vm12
--- /dev/null
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vmrg %v11, %s20, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0xd6]
+vmrg %v11, %s20, %v22
+
+# CHECK-INST: vmrg %vix, %vix, %vix
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xd6]
+vmrg.l %vix, %vix, %vix
+
+# CHECK-INST: vmrg.w %vix, -64, %v22
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x40,0xa0,0xd6]
+vmrg.w %vix, -64, %v22
+
+# CHECK-INST: vmrg %v11, 63, %v22, %vm11
+# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0xd6]
+vmrg.l %v11, 63, %v22, %vm11
+
+# CHECK-INST: vmrg.w %v11, %v23, %v22, %vm12
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0x00,0x8c,0xd6]
+vmrg.w %v11, %v23, %v22, %vm12
--- /dev/null
+# RUN: llvm-mc -triple=ve --show-encoding < %s \
+# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
+# RUN: | FileCheck %s --check-prefixes=CHECK-INST
+
+# CHECK-INST: vshf %v11, %v20, %v22, %s20
+# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0b,0x00,0x94,0x00,0xbc]
+vshf %v11, %v20, %v22, %s20
+
+# CHECK-INST: vshf %vix, %vix, %vix, 0
+# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0xbc]
+vshf %vix, %vix, %vix, 0
+
+# CHECK-INST: vshf %vix, %vix, %v22, 15
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0xff,0x00,0x0f,0x00,0xbc]
+vshf %vix, %vix, %v22, 15
+
+# CHECK-INST: vshf %v11, %vix, %v22, 12
+# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x0c,0x00,0xbc]
+vshf %v11, %vix, %v22, 12
+
+# CHECK-INST: vshf %v11, %v23, %v22, %s63
+# CHECK-ENCODING: encoding: [0x00,0x16,0x17,0x0b,0x00,0xbf,0x00,0xbc]
+vshf %v11, %v23, %v22, %s63