radv: add radeon_set_context_reg_rmw() helper

For emitting RMW packets in the command stream. This new helper
will be useful for implementing extended dynamic states to only
overwrite the fields that need to be updated instead of storing
more values in the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4531>

diff --git a/src/amd/vulkan/radv_cs.h b/src/amd/vulkan/radv_cs.h
index 1c89f1f..2bef75c 100644 (file)
--- a/src/amd/vulkan/radv_cs.h
+++ b/src/amd/vulkan/radv_cs.h
@@ -82,6 +82,18 @@ static inline void radeon_set_context_reg_idx(struct radeon_cmdbuf *cs,
        radeon_emit(cs, value);
 }
 
+static inline void radeon_set_context_reg_rmw(struct radeon_cmdbuf *cs,
+                                             unsigned reg, unsigned value,
+                                             unsigned mask)
+{
+       assert(reg >= SI_CONTEXT_REG_OFFSET && reg < SI_CONTEXT_REG_END);
+       assert(cs->cdw + 4 <= cs->max_dw);
+       radeon_emit(cs, PKT3(PKT3_CONTEXT_REG_RMW, 2, 0));
+       radeon_emit(cs, (reg - SI_CONTEXT_REG_OFFSET) >> 2);
+       radeon_emit(cs, mask);
+       radeon_emit(cs, value);
+}
+
 static inline void radeon_set_sh_reg_seq(struct radeon_cmdbuf *cs, unsigned reg, unsigned num)
 {
        assert(reg >= SI_SH_REG_OFFSET && reg < SI_SH_REG_END);