Change Monitor::mon_cpu to CPUState as well.
Reviewed-by: liguang <lig.fnst@cn.fujitsu.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
void cpu_synchronize_all_states(void)
{
- CPUArchState *cpu;
+ CPUArchState *env;
- for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
- cpu_synchronize_state(cpu);
+ for (env = first_cpu; env; env = env->next_cpu) {
+ cpu_synchronize_state(ENV_GET_CPU(env));
}
}
CPUState *cpu = ENV_GET_CPU(env);
CpuInfoList *info;
- cpu_synchronize_state(env);
+ cpu_synchronize_state(cpu);
info = g_malloc0(sizeof(*info));
info->value = g_malloc0(sizeof(*info->value));
static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
{
- cpu_synchronize_state(s->c_cpu);
+ cpu_synchronize_state(ENV_GET_CPU(s->c_cpu));
#if defined(TARGET_I386)
s->c_cpu->eip = pc;
#elif defined (TARGET_PPC)
}
break;
case 'g':
- cpu_synchronize_state(s->g_cpu);
+ cpu_synchronize_state(ENV_GET_CPU(s->g_cpu));
env = s->g_cpu;
len = 0;
for (addr = 0; addr < num_g_regs; addr++) {
put_packet(s, buf);
break;
case 'G':
- cpu_synchronize_state(s->g_cpu);
+ cpu_synchronize_state(ENV_GET_CPU(s->g_cpu));
env = s->g_cpu;
registers = mem_buf;
len = strlen(p) / 2;
env = find_cpu(thread);
if (env != NULL) {
CPUState *cpu = ENV_GET_CPU(env);
- cpu_synchronize_state(env);
+ cpu_synchronize_state(cpu);
len = snprintf((char *)mem_buf, sizeof(mem_buf),
"CPU#%d [%s]", cpu->cpu_index,
cpu->halted ? "halted " : "running");
uint32_t lvt;
int ret;
- cpu_synchronize_state(&s->cpu->env);
+ cpu_synchronize_state(cpu);
lvt = s->lvt[APIC_LVT_LINT1];
if (!(lvt & APIC_LVT_MASKED) && ((lvt >> 8) & 7) == APIC_DM_NMI) {
X86CPU *cpu = X86_CPU(cs);
CPUX86State *env = &cpu->env;
- cpu_synchronize_state(env);
+ cpu_synchronize_state(cs);
if (evaluate_tpr_instruction(s, env, &ip, access) < 0) {
if (s->state == VAPIC_ACTIVE) {
hwaddr rom_paddr;
VAPICROMState *s = opaque;
- cpu_synchronize_state(env);
+ cpu_synchronize_state(CPU(x86_env_get_cpu(env)));
/*
* The VAPIC supports two PIO-based hypercalls, both via port 0x7E.
unsigned char command;
uint32_t eax;
- cpu_synchronize_state(env);
+ cpu_synchronize_state(CPU(x86_env_get_cpu(env)));
eax = env->regs[R_EAX];
if (eax != VMPORT_MAGIC)
hwaddr map_size = 64 * 1024 * 1024;
hwaddr map_start;
- cpu_synchronize_state(env);
+ cpu_synchronize_state(cpu);
stl_p(&curspin->pir, env->spr[SPR_PIR]);
env->nip = ldq_p(&curspin->addr) & (map_size - 1);
env->gpr[3] = ldq_p(&curspin->r3);
/* generic hooks - to be moved/refactored once there are more users */
-static inline void cpu_synchronize_state(CPUArchState *env)
+static inline void cpu_synchronize_state(CPUState *cpu)
{
if (kvm_enabled()) {
- kvm_cpu_synchronize_state(ENV_GET_CPU(env));
+ kvm_cpu_synchronize_state(cpu);
}
}
QString *outbuf;
ReadLineState *rs;
MonitorControl *mc;
- CPUArchState *mon_cpu;
+ CPUState *mon_cpu;
BlockDriverCompletionFunc *password_completion_cb;
void *password_opaque;
QError *error;
if (cpu == NULL) {
return -1;
}
- cur_mon->mon_cpu = cpu->env_ptr;
+ cur_mon->mon_cpu = cpu;
return 0;
}
monitor_set_cpu(0);
}
cpu_synchronize_state(cur_mon->mon_cpu);
- return cur_mon->mon_cpu;
+ return cur_mon->mon_cpu->env_ptr;
}
int monitor_get_cpu_index(void)
char cc_op_name[32];
static const char *seg_name[6] = { "ES", "CS", "SS", "DS", "FS", "GS" };
- cpu_synchronize_state(env);
+ cpu_synchronize_state(cs);
eflags = cpu_compute_eflags(env);
#ifdef TARGET_X86_64
CPUState *cpu = CPU(params->cpu);
uint64_t *banks = cenv->mce_banks + 4 * params->bank;
- cpu_synchronize_state(cenv);
+ cpu_synchronize_state(cpu);
/*
* If there is an MCE exception being processed, ignore this SRAO MCE
ret = EXCP_DEBUG;
}
if (ret == 0) {
- cpu_synchronize_state(env);
+ cpu_synchronize_state(CPU(cpu));
assert(env->exception_injected == -1);
/* pass to guest */
int i;
uint64_t slbe, slbv;
- cpu_synchronize_state(env);
+ cpu_synchronize_state(CPU(ppc_env_get_cpu(env)));
cpu_fprintf(f, "SLB\tESID\t\t\tVSID\n");
for (i = 0; i < env->slb_nr; i++) {
int i;
- cpu_synchronize_state(env);
+ cpu_synchronize_state(CPU(ppc_env_get_cpu(env)));
cpu_fprintf(f, "NIP " TARGET_FMT_lx " LR " TARGET_FMT_lx " CTR "
TARGET_FMT_lx " XER " TARGET_FMT_lx "\n",
uint64_t code;
int r = 0;
- cpu_synchronize_state(env);
+ cpu_synchronize_state(CPU(cpu));
sccb = env->regs[ipbh0 & 0xf];
code = env->regs[(ipbh0 & 0xf0) >> 4];
static int s390_cpu_initial_reset(S390CPU *cpu)
{
+ CPUState *cs = CPU(cpu);
CPUS390XState *env = &cpu->env;
int i;
s390_del_running_cpu(cpu);
- if (kvm_vcpu_ioctl(CPU(cpu), KVM_S390_INITIAL_RESET, NULL) < 0) {
+ if (kvm_vcpu_ioctl(cs, KVM_S390_INITIAL_RESET, NULL) < 0) {
perror("cannot init reset vcpu");
}
/* Manually zero out all registers */
- cpu_synchronize_state(env);
+ cpu_synchronize_state(cs);
for (i = 0; i < 16; i++) {
env->regs[i] = 0;
}
S390CPU *target_cpu;
CPUS390XState *target_env;
- cpu_synchronize_state(env);
+ cpu_synchronize_state(CPU(cpu));
/* get order code */
order_code = run->s390_sieic.ipb >> 28;