[ARM] Add some fmin/fmax tests with commuted operands (NFC)

As well as vector commuted operands.

diff --git a/llvm/test/CodeGen/ARM/fminmax-folds.ll b/llvm/test/CodeGen/ARM/fminmax-folds.ll
index 01e5ab4..30dfd49 100644 (file)
--- a/llvm/test/CodeGen/ARM/fminmax-folds.ll
+++ b/llvm/test/CodeGen/ARM/fminmax-folds.ll
@@ -5,6 +5,10 @@ declare float @llvm.minnum.f32(float, float)
 declare float @llvm.maxnum.f32(float, float)
 declare float @llvm.minimum.f32(float, float)
 declare float @llvm.maximum.f32(float, float)
+declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>)
+declare <2 x float> @llvm.maxnum.v2f32(<2 x float>, <2 x float>)
+declare <2 x float> @llvm.minimum.v2f32(<2 x float>, <2 x float>)
+declare <2 x float> @llvm.maximum.v2f32(<2 x float>, <2 x float>)
 
 define float @test_minnum_const_nan(float %x) {
 ; CHECK-LABEL: test_minnum_const_nan:
@@ -234,8 +238,8 @@ define float @test_minimum_const_inf_nnan(float %x) {
   ret float %r
 }
 
-define float @test_minnum_const_neg_inf_nnan(float %x) {
-; CHECK-LABEL: test_minnum_const_neg_inf_nnan:
+define float @test_minnum_const_inf_nnan_comm(float %x) {
+; CHECK-LABEL: test_minnum_const_inf_nnan_comm:
 ; CHECK:       @ %bb.0:
 ; CHECK-NEXT:    vldr s0, .LCPI16_0
 ; CHECK-NEXT:    vmov s2, r0
@@ -245,6 +249,138 @@ define float @test_minnum_const_neg_inf_nnan(float %x) {
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
 ; CHECK-NEXT:  .LCPI16_0:
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+  %r = call nnan float @llvm.minnum.f32(float 0x7ff0000000000000, float %x)
+  ret float %r
+}
+
+define float @test_maxnum_const_inf_nnan_comm(float %x) {
+; CHECK-LABEL: test_maxnum_const_inf_nnan_comm:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vldr s0, .LCPI17_0
+; CHECK-NEXT:    vmov s2, r0
+; CHECK-NEXT:    vmaxnm.f32 s0, s2, s0
+; CHECK-NEXT:    vmov r0, s0
+; CHECK-NEXT:    bx lr
+; CHECK-NEXT:    .p2align 2
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI17_0:
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+  %r = call nnan float @llvm.maxnum.f32(float 0x7ff0000000000000, float %x)
+  ret float %r
+}
+
+define float @test_maximum_const_inf_nnan_comm(float %x) {
+; CHECK-LABEL: test_maximum_const_inf_nnan_comm:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vldr s0, .LCPI18_0
+; CHECK-NEXT:    vmov s2, r0
+; CHECK-NEXT:    vmax.f32 d0, d1, d0
+; CHECK-NEXT:    vmov r0, s0
+; CHECK-NEXT:    bx lr
+; CHECK-NEXT:    .p2align 2
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI18_0:
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+  %r = call nnan float @llvm.maximum.f32(float 0x7ff0000000000000, float %x)
+  ret float %r
+}
+
+define float @test_minimum_const_inf_nnan_comm(float %x) {
+; CHECK-LABEL: test_minimum_const_inf_nnan_comm:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vldr s0, .LCPI19_0
+; CHECK-NEXT:    vmov s2, r0
+; CHECK-NEXT:    vmin.f32 d0, d1, d0
+; CHECK-NEXT:    vmov r0, s0
+; CHECK-NEXT:    bx lr
+; CHECK-NEXT:    .p2align 2
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI19_0:
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+  %r = call nnan float @llvm.minimum.f32(float 0x7ff0000000000000, float %x)
+  ret float %r
+}
+
+define <2 x float> @test_minnum_const_inf_nnan_comm_vec(<2 x float> %x) {
+; CHECK-LABEL: test_minnum_const_inf_nnan_comm_vec:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vldr d16, .LCPI20_0
+; CHECK-NEXT:    vmov d17, r0, r1
+; CHECK-NEXT:    vminnm.f32 d16, d17, d16
+; CHECK-NEXT:    vmov r0, r1, d16
+; CHECK-NEXT:    bx lr
+; CHECK-NEXT:    .p2align 3
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI20_0:
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+  %r = call nnan <2 x float> @llvm.minnum.v2f32(<2 x float> <float 0x7ff0000000000000, float 0x7ff0000000000000>, <2 x float> %x)
+  ret <2 x float> %r
+}
+
+define <2 x float> @test_maxnum_const_inf_nnan_comm_vec(<2 x float> %x) {
+; CHECK-LABEL: test_maxnum_const_inf_nnan_comm_vec:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vldr d16, .LCPI21_0
+; CHECK-NEXT:    vmov d17, r0, r1
+; CHECK-NEXT:    vmaxnm.f32 d16, d17, d16
+; CHECK-NEXT:    vmov r0, r1, d16
+; CHECK-NEXT:    bx lr
+; CHECK-NEXT:    .p2align 3
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI21_0:
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+  %r = call nnan <2 x float> @llvm.maxnum.v2f32(<2 x float> <float 0x7ff0000000000000, float 0x7ff0000000000000>, <2 x float> %x)
+  ret <2 x float> %r
+}
+
+define <2 x float> @test_maximum_const_inf_nnan_comm_vec(<2 x float> %x) {
+; CHECK-LABEL: test_maximum_const_inf_nnan_comm_vec:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vldr d16, .LCPI22_0
+; CHECK-NEXT:    vmov d17, r0, r1
+; CHECK-NEXT:    vmax.f32 d16, d17, d16
+; CHECK-NEXT:    vmov r0, r1, d16
+; CHECK-NEXT:    bx lr
+; CHECK-NEXT:    .p2align 3
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI22_0:
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+  %r = call nnan <2 x float> @llvm.maximum.v2f32(<2 x float> <float 0x7ff0000000000000, float 0x7ff0000000000000>, <2 x float> %x)
+  ret <2 x float> %r
+}
+
+define <2 x float> @test_minimum_const_inf_nnan_comm_vec(<2 x float> %x) {
+; CHECK-LABEL: test_minimum_const_inf_nnan_comm_vec:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vldr d16, .LCPI23_0
+; CHECK-NEXT:    vmov d17, r0, r1
+; CHECK-NEXT:    vmin.f32 d16, d17, d16
+; CHECK-NEXT:    vmov r0, r1, d16
+; CHECK-NEXT:    bx lr
+; CHECK-NEXT:    .p2align 3
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI23_0:
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+; CHECK-NEXT:    .long 0x7f800000 @ float +Inf
+  %r = call nnan <2 x float> @llvm.minimum.v2f32(<2 x float> <float 0x7ff0000000000000, float 0x7ff0000000000000>, <2 x float> %x)
+  ret <2 x float> %r
+}
+
+define float @test_minnum_const_neg_inf_nnan(float %x) {
+; CHECK-LABEL: test_minnum_const_neg_inf_nnan:
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    vldr s0, .LCPI24_0
+; CHECK-NEXT:    vmov s2, r0
+; CHECK-NEXT:    vminnm.f32 s0, s2, s0
+; CHECK-NEXT:    vmov r0, s0
+; CHECK-NEXT:    bx lr
+; CHECK-NEXT:    .p2align 2
+; CHECK-NEXT:  @ %bb.1:
+; CHECK-NEXT:  .LCPI24_0:
 ; CHECK-NEXT:    .long 0xff800000 @ float -Inf
   %r = call nnan float @llvm.minnum.f32(float %x, float 0xfff0000000000000)
   ret float %r
@@ -253,14 +389,14 @@ define float @test_minnum_const_neg_inf_nnan(float %x) {
 define float @test_maxnum_const_neg_inf_nnan(float %x) {
 ; CHECK-LABEL: test_maxnum_const_neg_inf_nnan:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI17_0
+; CHECK-NEXT:    vldr s0, .LCPI25_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmaxnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI17_0:
+; CHECK-NEXT:  .LCPI25_0:
 ; CHECK-NEXT:    .long 0xff800000 @ float -Inf
   %r = call nnan float @llvm.maxnum.f32(float %x, float 0xfff0000000000000)
   ret float %r
@@ -269,14 +405,14 @@ define float @test_maxnum_const_neg_inf_nnan(float %x) {
 define float @test_maximum_const_neg_inf_nnan(float %x) {
 ; CHECK-LABEL: test_maximum_const_neg_inf_nnan:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI18_0
+; CHECK-NEXT:    vldr s0, .LCPI26_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmax.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI18_0:
+; CHECK-NEXT:  .LCPI26_0:
 ; CHECK-NEXT:    .long 0xff800000 @ float -Inf
   %r = call nnan float @llvm.maximum.f32(float %x, float 0xfff0000000000000)
   ret float %r
@@ -285,14 +421,14 @@ define float @test_maximum_const_neg_inf_nnan(float %x) {
 define float @test_minimum_const_neg_inf_nnan(float %x) {
 ; CHECK-LABEL: test_minimum_const_neg_inf_nnan:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI19_0
+; CHECK-NEXT:    vldr s0, .LCPI27_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmin.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI19_0:
+; CHECK-NEXT:  .LCPI27_0:
 ; CHECK-NEXT:    .long 0xff800000 @ float -Inf
   %r = call nnan float @llvm.minimum.f32(float %x, float 0xfff0000000000000)
   ret float %r
@@ -301,14 +437,14 @@ define float @test_minimum_const_neg_inf_nnan(float %x) {
 define float @test_minnum_const_max(float %x) {
 ; CHECK-LABEL: test_minnum_const_max:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI20_0
+; CHECK-NEXT:    vldr s0, .LCPI28_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vminnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI20_0:
+; CHECK-NEXT:  .LCPI28_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call float @llvm.minnum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -317,14 +453,14 @@ define float @test_minnum_const_max(float %x) {
 define float @test_maxnum_const_max(float %x) {
 ; CHECK-LABEL: test_maxnum_const_max:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI21_0
+; CHECK-NEXT:    vldr s0, .LCPI29_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmaxnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI21_0:
+; CHECK-NEXT:  .LCPI29_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call float @llvm.maxnum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -333,14 +469,14 @@ define float @test_maxnum_const_max(float %x) {
 define float @test_maximum_const_max(float %x) {
 ; CHECK-LABEL: test_maximum_const_max:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI22_0
+; CHECK-NEXT:    vldr s0, .LCPI30_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmax.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI22_0:
+; CHECK-NEXT:  .LCPI30_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call float @llvm.maximum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -349,14 +485,14 @@ define float @test_maximum_const_max(float %x) {
 define float @test_minimum_const_max(float %x) {
 ; CHECK-LABEL: test_minimum_const_max:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI23_0
+; CHECK-NEXT:    vldr s0, .LCPI31_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmin.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI23_0:
+; CHECK-NEXT:  .LCPI31_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call float @llvm.minimum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -365,14 +501,14 @@ define float @test_minimum_const_max(float %x) {
 define float @test_minnum_const_neg_max(float %x) {
 ; CHECK-LABEL: test_minnum_const_neg_max:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI24_0
+; CHECK-NEXT:    vldr s0, .LCPI32_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vminnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI24_0:
+; CHECK-NEXT:  .LCPI32_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call float @llvm.minnum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -381,14 +517,14 @@ define float @test_minnum_const_neg_max(float %x) {
 define float @test_maxnum_const_neg_max(float %x) {
 ; CHECK-LABEL: test_maxnum_const_neg_max:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI25_0
+; CHECK-NEXT:    vldr s0, .LCPI33_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmaxnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI25_0:
+; CHECK-NEXT:  .LCPI33_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call float @llvm.maxnum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -397,14 +533,14 @@ define float @test_maxnum_const_neg_max(float %x) {
 define float @test_maximum_const_neg_max(float %x) {
 ; CHECK-LABEL: test_maximum_const_neg_max:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI26_0
+; CHECK-NEXT:    vldr s0, .LCPI34_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmax.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI26_0:
+; CHECK-NEXT:  .LCPI34_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call float @llvm.maximum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -413,14 +549,14 @@ define float @test_maximum_const_neg_max(float %x) {
 define float @test_minimum_const_neg_max(float %x) {
 ; CHECK-LABEL: test_minimum_const_neg_max:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI27_0
+; CHECK-NEXT:    vldr s0, .LCPI35_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmin.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI27_0:
+; CHECK-NEXT:  .LCPI35_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call float @llvm.minimum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -429,14 +565,14 @@ define float @test_minimum_const_neg_max(float %x) {
 define float @test_minnum_const_max_ninf(float %x) {
 ; CHECK-LABEL: test_minnum_const_max_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI28_0
+; CHECK-NEXT:    vldr s0, .LCPI36_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vminnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI28_0:
+; CHECK-NEXT:  .LCPI36_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call ninf float @llvm.minnum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -445,14 +581,14 @@ define float @test_minnum_const_max_ninf(float %x) {
 define float @test_maxnum_const_max_ninf(float %x) {
 ; CHECK-LABEL: test_maxnum_const_max_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI29_0
+; CHECK-NEXT:    vldr s0, .LCPI37_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmaxnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI29_0:
+; CHECK-NEXT:  .LCPI37_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call ninf float @llvm.maxnum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -461,14 +597,14 @@ define float @test_maxnum_const_max_ninf(float %x) {
 define float @test_maximum_const_max_ninf(float %x) {
 ; CHECK-LABEL: test_maximum_const_max_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI30_0
+; CHECK-NEXT:    vldr s0, .LCPI38_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmax.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI30_0:
+; CHECK-NEXT:  .LCPI38_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call ninf float @llvm.maximum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -477,14 +613,14 @@ define float @test_maximum_const_max_ninf(float %x) {
 define float @test_minimum_const_max_ninf(float %x) {
 ; CHECK-LABEL: test_minimum_const_max_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI31_0
+; CHECK-NEXT:    vldr s0, .LCPI39_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmin.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI31_0:
+; CHECK-NEXT:  .LCPI39_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call ninf float @llvm.minimum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -493,14 +629,14 @@ define float @test_minimum_const_max_ninf(float %x) {
 define float @test_minnum_const_neg_max_ninf(float %x) {
 ; CHECK-LABEL: test_minnum_const_neg_max_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI32_0
+; CHECK-NEXT:    vldr s0, .LCPI40_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vminnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI32_0:
+; CHECK-NEXT:  .LCPI40_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call ninf float @llvm.minnum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -509,14 +645,14 @@ define float @test_minnum_const_neg_max_ninf(float %x) {
 define float @test_maxnum_const_neg_max_ninf(float %x) {
 ; CHECK-LABEL: test_maxnum_const_neg_max_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI33_0
+; CHECK-NEXT:    vldr s0, .LCPI41_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmaxnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI33_0:
+; CHECK-NEXT:  .LCPI41_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call ninf float @llvm.maxnum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -525,14 +661,14 @@ define float @test_maxnum_const_neg_max_ninf(float %x) {
 define float @test_maximum_const_neg_max_ninf(float %x) {
 ; CHECK-LABEL: test_maximum_const_neg_max_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI34_0
+; CHECK-NEXT:    vldr s0, .LCPI42_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmax.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI34_0:
+; CHECK-NEXT:  .LCPI42_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call ninf float @llvm.maximum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -541,14 +677,14 @@ define float @test_maximum_const_neg_max_ninf(float %x) {
 define float @test_minimum_const_neg_max_ninf(float %x) {
 ; CHECK-LABEL: test_minimum_const_neg_max_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI35_0
+; CHECK-NEXT:    vldr s0, .LCPI43_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmin.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI35_0:
+; CHECK-NEXT:  .LCPI43_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call ninf float @llvm.minimum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -557,14 +693,14 @@ define float @test_minimum_const_neg_max_ninf(float %x) {
 define float @test_minnum_const_max_nnan_ninf(float %x) {
 ; CHECK-LABEL: test_minnum_const_max_nnan_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI36_0
+; CHECK-NEXT:    vldr s0, .LCPI44_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vminnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI36_0:
+; CHECK-NEXT:  .LCPI44_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call nnan ninf float @llvm.minnum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -573,14 +709,14 @@ define float @test_minnum_const_max_nnan_ninf(float %x) {
 define float @test_maxnum_const_max_nnan_ninf(float %x) {
 ; CHECK-LABEL: test_maxnum_const_max_nnan_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI37_0
+; CHECK-NEXT:    vldr s0, .LCPI45_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmaxnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI37_0:
+; CHECK-NEXT:  .LCPI45_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call nnan ninf float @llvm.maxnum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -589,14 +725,14 @@ define float @test_maxnum_const_max_nnan_ninf(float %x) {
 define float @test_maximum_const_max_nnan_ninf(float %x) {
 ; CHECK-LABEL: test_maximum_const_max_nnan_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI38_0
+; CHECK-NEXT:    vldr s0, .LCPI46_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmax.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI38_0:
+; CHECK-NEXT:  .LCPI46_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call nnan ninf float @llvm.maximum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -605,14 +741,14 @@ define float @test_maximum_const_max_nnan_ninf(float %x) {
 define float @test_minimum_const_max_nnan_ninf(float %x) {
 ; CHECK-LABEL: test_minimum_const_max_nnan_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI39_0
+; CHECK-NEXT:    vldr s0, .LCPI47_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmin.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI39_0:
+; CHECK-NEXT:  .LCPI47_0:
 ; CHECK-NEXT:    .long 0x7f7fffff @ float 3.40282347E+38
   %r = call nnan ninf float @llvm.minimum.f32(float %x, float 0x47efffffe0000000)
   ret float %r
@@ -621,14 +757,14 @@ define float @test_minimum_const_max_nnan_ninf(float %x) {
 define float @test_minnum_const_neg_max_nnan_ninf(float %x) {
 ; CHECK-LABEL: test_minnum_const_neg_max_nnan_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI40_0
+; CHECK-NEXT:    vldr s0, .LCPI48_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vminnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI40_0:
+; CHECK-NEXT:  .LCPI48_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call nnan ninf float @llvm.minnum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -637,14 +773,14 @@ define float @test_minnum_const_neg_max_nnan_ninf(float %x) {
 define float @test_maxnum_const_neg_max_nnan_ninf(float %x) {
 ; CHECK-LABEL: test_maxnum_const_neg_max_nnan_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI41_0
+; CHECK-NEXT:    vldr s0, .LCPI49_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmaxnm.f32 s0, s2, s0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI41_0:
+; CHECK-NEXT:  .LCPI49_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call nnan ninf float @llvm.maxnum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -653,14 +789,14 @@ define float @test_maxnum_const_neg_max_nnan_ninf(float %x) {
 define float @test_maximum_const_neg_max_nnan_ninf(float %x) {
 ; CHECK-LABEL: test_maximum_const_neg_max_nnan_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI42_0
+; CHECK-NEXT:    vldr s0, .LCPI50_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmax.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI42_0:
+; CHECK-NEXT:  .LCPI50_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call nnan ninf float @llvm.maximum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r
@@ -669,14 +805,14 @@ define float @test_maximum_const_neg_max_nnan_ninf(float %x) {
 define float @test_minimum_const_neg_max_nnan_ninf(float %x) {
 ; CHECK-LABEL: test_minimum_const_neg_max_nnan_ninf:
 ; CHECK:       @ %bb.0:
-; CHECK-NEXT:    vldr s0, .LCPI43_0
+; CHECK-NEXT:    vldr s0, .LCPI51_0
 ; CHECK-NEXT:    vmov s2, r0
 ; CHECK-NEXT:    vmin.f32 d0, d1, d0
 ; CHECK-NEXT:    vmov r0, s0
 ; CHECK-NEXT:    bx lr
 ; CHECK-NEXT:    .p2align 2
 ; CHECK-NEXT:  @ %bb.1:
-; CHECK-NEXT:  .LCPI43_0:
+; CHECK-NEXT:  .LCPI51_0:
 ; CHECK-NEXT:    .long 0xff7fffff @ float -3.40282347E+38
   %r = call nnan ninf float @llvm.minimum.f32(float %x, float 0xc7efffffe0000000)
   ret float %r