Blackfin arch: noMMU CPLB lookup tables can be in L1 SRAM
authorMike Frysinger <vapier.adi@gmail.com>
Tue, 18 Nov 2008 09:48:22 +0000 (17:48 +0800)
committerBryan Wu <cooloney@kernel.org>
Tue, 18 Nov 2008 09:48:22 +0000 (17:48 +0800)
 - unify duplicate page_size_table definitions
 - make sure it is placed alongside the other cplb switching code

Pointed-out-by: Michael McTernan <mmcternan@airvana.com>
Signed-off-by: Mike Frysinger <vapier.adi@gmail.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
arch/blackfin/kernel/cplb-nompu/cplbmgr.S
arch/blackfin/kernel/cplbinfo.c

index 985f3fc..f4ca76c 100644 (file)
@@ -629,15 +629,20 @@ ENTRY(_cplb_mgr)
        RTS;
 ENDPROC(_cplb_mgr)
 
+#ifdef CONFIG_CPLB_SWITCH_TAB_L1
+.section .l1.data
+#else
 .data
-.align 4;
-_page_size_table:
+#endif
+
+ENTRY(_page_size_table)
 .byte4 0x00000400;     /* 1K */
 .byte4 0x00001000;     /* 4K */
 .byte4 0x00100000;     /* 1M */
 .byte4 0x00400000;     /* 4M */
+END(_page_size_table)
 
-.align 4;
-_dcplb_preference:
+ENTRY(_dcplb_preference)
 .byte4 0x00000001;     /* valid bit */
 .byte4 0x00000002;     /* lock bit */
+END(_dcplb_preference)
index dc584fe..723839d 100644 (file)
@@ -59,12 +59,7 @@ static char *cplb_print_entry(char *buf, cplb_type type, unsigned int cpu)
 
 #else
 
-static int page_size_table[4] = {
-       0x00000400,             /* 1K */
-       0x00001000,             /* 4K */
-       0x00100000,             /* 1M */
-       0x00400000              /* 4M */
-};
+extern int page_size_table[];
 
 static int cplb_find_entry(unsigned long *cplb_addr,
                           unsigned long *cplb_data, unsigned long addr,