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[RISCV] Pre-commit test for D118222
author
wangpc
<pc.wang@linux.alibaba.com>
Tue, 8 Feb 2022 04:52:13 +0000
(12:52 +0800)
committer
wangpc
<pc.wang@linux.alibaba.com>
Tue, 8 Feb 2022 04:52:13 +0000
(12:52 +0800)
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D119212
llvm/test/CodeGen/RISCV/double-calling-conv.ll
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diff --git
a/llvm/test/CodeGen/RISCV/double-calling-conv.ll
b/llvm/test/CodeGen/RISCV/double-calling-conv.ll
index
51434d9
..
4ec95aa
100644
(file)
--- a/
llvm/test/CodeGen/RISCV/double-calling-conv.ll
+++ b/
llvm/test/CodeGen/RISCV/double-calling-conv.ll
@@
-142,3
+142,15
@@
define double @caller_double_stack() nounwind {
%1 = call double @callee_double_stack(i64 1, i64 2, i64 3, i64 4, double 5.72, double 6.72)
ret double %1
}
+
+define double @func_return_double_undef() nounwind {
+; RV32IFD-LABEL: func_return_double_undef:
+; RV32IFD: # %bb.0:
+; RV32IFD-NEXT: addi sp, sp, -16
+; RV32IFD-NEXT: fsd ft0, 8(sp)
+; RV32IFD-NEXT: lw a0, 8(sp)
+; RV32IFD-NEXT: lw a1, 12(sp)
+; RV32IFD-NEXT: addi sp, sp, 16
+; RV32IFD-NEXT: ret
+ ret double undef
+}