#define SBI_PLATFORM_HART_INDEX2ID_OFFSET (0x60 + (__SIZEOF_POINTER__ * 2))
#define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT (1UL << 12)
+#define SBI_PLATFORM_TLB_FIFO_NUM_ENTRIES 8
#ifndef __ASSEMBLER__
/** Get tlb flush limit value **/
u64 (*get_tlbr_flush_limit)(void);
+ /** Get tlb fifo num entries*/
+ u32 (*get_tlb_num_entries)(void);
+
/** Initialize platform timer for current HART */
int (*timer_init)(bool cold_boot);
/** Exit platform timer for current HART */
return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
}
+/**
+ * Get platform specific tlb fifo num entries.
+ *
+ * @param plat pointer to struct sbi_platform
+ *
+ * @return number of tlb fifo entries
+*/
+static inline u32 sbi_platform_tlb_fifo_num_entries(const struct sbi_platform *plat)
+{
+ if (plat && sbi_platform_ops(plat)->get_tlb_num_entries)
+ return sbi_platform_ops(plat)->get_tlb_num_entries();
+ return SBI_PLATFORM_TLB_FIFO_NUM_ENTRIES;
+}
+
/**
* Get total number of HARTs supported by the platform
*
/* clang-format on */
-#define SBI_TLB_FIFO_NUM_ENTRIES 8
-
struct sbi_scratch;
struct sbi_tlb_info {
return SBI_ENOMEM;
}
tlb_fifo_mem_off = sbi_scratch_alloc_offset(
- SBI_TLB_FIFO_NUM_ENTRIES * SBI_TLB_INFO_SIZE);
+ sbi_platform_tlb_fifo_num_entries(plat) * SBI_TLB_INFO_SIZE);
if (!tlb_fifo_mem_off) {
sbi_scratch_free_offset(tlb_fifo_off);
sbi_scratch_free_offset(tlb_sync_off);
ATOMIC_INIT(tlb_sync, 0);
sbi_fifo_init(tlb_q, tlb_mem,
- SBI_TLB_FIFO_NUM_ENTRIES, SBI_TLB_INFO_SIZE);
+ sbi_platform_tlb_fifo_num_entries(plat), SBI_TLB_INFO_SIZE);
return 0;
}
const struct fdt_match *match_table;
u64 (*features)(const struct fdt_match *match);
u64 (*tlbr_flush_limit)(const struct fdt_match *match);
+ u32 (*tlb_num_entries)(const struct fdt_match *match);
bool (*cold_boot_allowed)(u32 hartid, const struct fdt_match *match);
int (*early_init)(bool cold_boot, const struct fdt_match *match);
int (*final_init)(bool cold_boot, const struct fdt_match *match);
return SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT;
}
+static u32 generic_tlb_num_entries(void)
+{
+ if (generic_plat && generic_plat->tlb_num_entries)
+ return generic_plat->tlb_num_entries(generic_plat_match);
+ return SBI_PLATFORM_TLB_FIFO_NUM_ENTRIES;
+}
+
static int generic_pmu_init(void)
{
return fdt_pmu_setup(fdt_get_address());
.pmu_init = generic_pmu_init,
.pmu_xlate_to_mhpmevent = generic_pmu_xlate_to_mhpmevent,
.get_tlbr_flush_limit = generic_tlbr_flush_limit,
+ .get_tlb_num_entries = generic_tlb_num_entries,
.timer_init = fdt_timer_init,
.timer_exit = fdt_timer_exit,
.vendor_ext_check = generic_vendor_ext_check,