ARM: dts: Configure interconnect target module for am4 tpcc

We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also correct the custom node name to use generic node name dma.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi
index 3caddfe..fd6b6cb 100644 (file)
--- a/arch/arm/boot/dts/am4372.dtsi
+++ b/arch/arm/boot/dts/am4372.dtsi
@@ -185,23 +185,34 @@
                                &pm_sram_data>;
                };
 
-               edma: edma@49000000 {
-                       compatible = "ti,edma3-tpcc";
+               target-module@49000000 {
+                       compatible = "ti,sysc-omap4", "ti,sysc";
                        ti,hwmods = "tpcc";
-                       reg =   <0x49000000 0x10000>;
-                       reg-names = "edma3_cc";
-                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
-                                    <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupt-names = "edma3_ccint", "edma3_mperr",
-                                         "edma3_ccerrint";
-                       dma-requests = <64>;
-                       #dma-cells = <2>;
-
-                       ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
-                                  <&edma_tptc2 0>;
-
-                       ti,edma-memcpy-channels = <58 59>;
+                       reg = <0x49000000 0x4>;
+                       reg-names = "rev";
+                       clocks = <&l3_clkctrl AM4_L3_TPCC_CLKCTRL 0>;
+                       clock-names = "fck";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <0x0 0x49000000 0x10000>;
+
+                       edma: dma@0 {
+                               compatible = "ti,edma3-tpcc";
+                               reg = <0 0x10000>;
+                               reg-names = "edma3_cc";
+                               interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+                                            <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "edma3_ccint", "edma3_mperr",
+                                                 "edma3_ccerrint";
+                               dma-requests = <64>;
+                               #dma-cells = <2>;
+
+                               ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
+                                          <&edma_tptc2 0>;
+
+                               ti,edma-memcpy-channels = <58 59>;
+                       };
                };
 
                edma_tptc0: tptc@49800000 {