}
}
}
- EXPORT_SYMBOL(pci_dma_sync_sg_for_device);
+
+ struct dma_map_ops pci32_dma_ops = {
+ .alloc_coherent = pci32_alloc_coherent,
+ .free_coherent = pci32_free_coherent,
+ .map_page = pci32_map_page,
+ .map_sg = pci32_map_sg,
+ .unmap_sg = pci32_unmap_sg,
+ .sync_single_for_cpu = pci32_sync_single_for_cpu,
+ .sync_single_for_device = pci32_sync_single_for_device,
+ .sync_sg_for_cpu = pci32_sync_sg_for_cpu,
+ .sync_sg_for_device = pci32_sync_sg_for_device,
+ };
+ EXPORT_SYMBOL(pci32_dma_ops);
+
#endif /* CONFIG_PCI */
+ /*
+ * Return whether the given PCI device DMA address mask can be
+ * supported properly. For example, if your device can only drive the
+ * low 24-bits during PCI bus mastering, then you would pass
+ * 0x00ffffff as the mask to this function.
+ */
+ int dma_supported(struct device *dev, u64 mask)
+ {
+ #ifdef CONFIG_PCI
+ if (dev->bus == &pci_bus_type)
+ return 1;
+ #endif
+ return 0;
+ }
+ EXPORT_SYMBOL(dma_supported);
+
+ int dma_set_mask(struct device *dev, u64 dma_mask)
+ {
+ #ifdef CONFIG_PCI
+ if (dev->bus == &pci_bus_type)
+ return pci_set_dma_mask(to_pci_dev(dev), dma_mask);
+ #endif
+ return -EOPNOTSUPP;
+ }
+ EXPORT_SYMBOL(dma_set_mask);
+
+
#ifdef CONFIG_PROC_FS
-static int
-_sparc_io_get_info(char *buf, char **start, off_t fpos, int length, int *eof,
- void *data)
+static int sparc_io_proc_show(struct seq_file *m, void *v)
{
- char *p = buf, *e = buf + length;
- struct resource *r;
+ struct resource *root = m->private, *r;
const char *nm;
- for (r = ((struct resource *)data)->child; r != NULL; r = r->sibling) {
- if (p + 32 >= e) /* Better than nothing */
- break;
+ for (r = root->child; r != NULL; r = r->sibling) {
if ((nm = r->name) == 0) nm = "???";
- p += sprintf(p, "%016llx-%016llx: %s\n",
+ seq_printf(m, "%016llx-%016llx: %s\n",
(unsigned long long)r->start,
(unsigned long long)r->end, nm);
}