drm/amd/powerplay: move table setting common code to smu_cmn.c

As they are shared by all ASICs.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index b9ff398..6a32387 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -221,47 +221,6 @@ int smu_get_power_num_states(struct smu_context *smu,
        return 0;
 }
 
-int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int argument,
-                    void *table_data, bool drv2smu)
-{
-       struct smu_table_context *smu_table = &smu->smu_table;
-       struct amdgpu_device *adev = smu->adev;
-       struct smu_table *table = &smu_table->driver_table;
-       int table_id = smu_cmn_to_asic_specific_index(smu,
-                                                     CMN2ASIC_MAPPING_TABLE,
-                                                     table_index);
-       uint32_t table_size;
-       int ret = 0;
-       if (!table_data || table_id >= SMU_TABLE_COUNT || table_id < 0)
-               return -EINVAL;
-
-       table_size = smu_table->tables[table_index].size;
-
-       if (drv2smu) {
-               memcpy(table->cpu_addr, table_data, table_size);
-               /*
-                * Flush hdp cache: to guard the content seen by
-                * GPU is consitent with CPU.
-                */
-               amdgpu_asic_flush_hdp(adev, NULL);
-       }
-
-       ret = smu_send_smc_msg_with_param(smu, drv2smu ?
-                                         SMU_MSG_TransferTableDram2Smu :
-                                         SMU_MSG_TransferTableSmu2Dram,
-                                         table_id | ((argument & 0xFFFF) << 16),
-                                         NULL);
-       if (ret)
-               return ret;
-
-       if (!drv2smu) {
-               amdgpu_asic_flush_hdp(adev, NULL);
-               memcpy(table_data, table->cpu_addr, table_size);
-       }
-
-       return ret;
-}
-
 bool is_support_sw_smu(struct amdgpu_device *adev)
 {
        if (adev->asic_type >= CHIP_ARCTURUS)

diff --git a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
index 4fa99b7..4fc2b93 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/arcturus_ppt.c
@@ -527,7 +527,7 @@ static int arcturus_get_smu_metrics_data(struct smu_context *smu,
 
        if (!smu_table->metrics_time ||
             time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(1))) {
-               ret = smu_update_table(smu,
+               ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_SMU_METRICS,
                                       0,
                                       smu_table->metrics_table,
@@ -1215,7 +1215,7 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu,
                        continue;
 
                if (smu_version >= 0x360d00) {
-                       result = smu_update_table(smu,
+                       result = smu_cmn_update_table(smu,
                                                  SMU_TABLE_ACTIVITY_MONITOR_COEFF,
                                                  workload_type,
                                                  (void *)(&activity_monitor),
@@ -1284,7 +1284,7 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
 
        if ((profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) &&
             (smu_version >=0x360d00)) {
-               ret = smu_update_table(smu,
+               ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF,
                                       WORKLOAD_PPLIB_CUSTOM_BIT,
                                       (void *)(&activity_monitor),
@@ -1319,7 +1319,7 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
                        break;
                }
 
-               ret = smu_update_table(smu,
+               ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF,
                                       WORKLOAD_PPLIB_CUSTOM_BIT,
                                       (void *)(&activity_monitor),
@@ -1913,7 +1913,7 @@ static int arcturus_i2c_eeprom_read_data(struct i2c_adapter *control,
 
        mutex_lock(&adev->smu.mutex);
        /* Now read data starting with that address */
-       ret = smu_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req,
+       ret = smu_cmn_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req,
                                        true);
        mutex_unlock(&adev->smu.mutex);
 
@@ -1954,7 +1954,7 @@ static int arcturus_i2c_eeprom_write_data(struct i2c_adapter *control,
        arcturus_fill_eeprom_i2c_req(&req, true, address, numbytes, data);
 
        mutex_lock(&adev->smu.mutex);
-       ret = smu_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req, true);
+       ret = smu_cmn_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req, true);
        mutex_unlock(&adev->smu.mutex);
 
        if (!ret) {
@@ -2276,7 +2276,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = {
        .setup_pptable = arcturus_setup_pptable,
        .get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,
        .check_fw_version = smu_v11_0_check_fw_version,
-       .write_pptable = smu_v11_0_write_pptable,
+       .write_pptable = smu_cmn_write_pptable,
        .set_driver_table_location = smu_v11_0_set_driver_table_location,
        .set_tool_table_location = smu_v11_0_set_tool_table_location,
        .notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index a8f98f3..112b998 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -732,9 +732,6 @@ extern const struct amd_ip_funcs smu_ip_funcs;
 extern const struct amdgpu_ip_block_version smu_v11_0_ip_block;
 extern const struct amdgpu_ip_block_version smu_v12_0_ip_block;
 
-int smu_update_table(struct smu_context *smu, enum smu_table_id table_index, int argument,
-                    void *table_data, bool drv2smu);
-
 bool is_support_sw_smu(struct amdgpu_device *adev);
 int smu_reset(struct smu_context *smu);
 int smu_sys_get_pp_table(struct smu_context *smu, void **table);

diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
index c35ac25..2cc7307 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h
@@ -156,8 +156,6 @@ int smu_v11_0_get_vbios_bootup_values(struct smu_context *smu);
 
 int smu_v11_0_check_fw_version(struct smu_context *smu);
 
-int smu_v11_0_write_pptable(struct smu_context *smu);
-
 int smu_v11_0_set_driver_table_location(struct smu_context *smu);
 
 int smu_v11_0_set_tool_table_location(struct smu_context *smu);

diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index 4ea2cd5..f79441e 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -489,7 +489,7 @@ static int navi10_get_smu_metrics_data(struct smu_context *smu,
        mutex_lock(&smu->metrics_lock);
        if (!smu_table->metrics_time ||
             time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(1))) {
-               ret = smu_update_table(smu,
+               ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_SMU_METRICS,
                                       0,
                                       smu_table->metrics_table,
@@ -1398,7 +1398,7 @@ static int navi10_get_power_profile_mode(struct smu_context *smu, char *buf)
                if (workload_type < 0)
                        return -EINVAL;
 
-               result = smu_update_table(smu,
+               result = smu_cmn_update_table(smu,
                                          SMU_TABLE_ACTIVITY_MONITOR_COEFF, workload_type,
                                          (void *)(&activity_monitor), false);
                if (result) {
@@ -1469,7 +1469,7 @@ static int navi10_set_power_profile_mode(struct smu_context *smu, long *input, u
 
        if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
 
-               ret = smu_update_table(smu,
+               ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT,
                                       (void *)(&activity_monitor), false);
                if (ret) {
@@ -1513,7 +1513,7 @@ static int navi10_set_power_profile_mode(struct smu_context *smu, long *input, u
                        break;
                }
 
-               ret = smu_update_table(smu,
+               ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT,
                                       (void *)(&activity_monitor), true);
                if (ret) {
@@ -1636,7 +1636,7 @@ static int navi10_set_watermarks_table(struct smu_context *smu,
        /* pass data to smu controller */
        if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
             !(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
-               ret = smu_write_watermarks_table(smu);
+               ret = smu_cmn_write_watermarks_table(smu);
                if (ret) {
                        dev_err(smu->adev->dev, "Failed to update WMTABLE!");
                        return ret;
@@ -1957,7 +1957,7 @@ static int navi10_set_default_od_settings(struct smu_context *smu)
                (OverDriveTable_t *)smu->smu_table.boot_overdrive_table;
        int ret = 0;
 
-       ret = smu_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, false);
+       ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, false);
        if (ret) {
                dev_err(smu->adev->dev, "Failed to get overdrive table!\n");
                return ret;
@@ -2091,7 +2091,7 @@ static int navi10_od_edit_dpm_table(struct smu_context *smu, enum PP_OD_DPM_TABL
                break;
        case PP_OD_COMMIT_DPM_TABLE:
                navi10_dump_od_table(smu, od_table);
-               ret = smu_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, true);
+               ret = smu_cmn_update_table(smu, SMU_TABLE_OVERDRIVE, 0, (void *)od_table, true);
                if (ret) {
                        dev_err(smu->adev->dev, "Failed to import overdrive table!\n");
                        return ret;
@@ -2289,7 +2289,7 @@ static const struct pptable_funcs navi10_ppt_funcs = {
        .setup_pptable = navi10_setup_pptable,
        .get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,
        .check_fw_version = smu_v11_0_check_fw_version,
-       .write_pptable = smu_v11_0_write_pptable,
+       .write_pptable = smu_cmn_write_pptable,
        .set_driver_table_location = smu_v11_0_set_driver_table_location,
        .set_tool_table_location = smu_v11_0_set_tool_table_location,
        .notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,

diff --git a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
index 8763073..5097ea0 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/renoir_ppt.c
@@ -135,7 +135,7 @@ static int renoir_get_metrics_table(struct smu_context *smu,
 
        mutex_lock(&smu->metrics_lock);
        if (!smu_table->metrics_time || time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(100))) {
-               ret = smu_update_table(smu, SMU_TABLE_SMU_METRICS, 0,
+               ret = smu_cmn_update_table(smu, SMU_TABLE_SMU_METRICS, 0,
                                (void *)smu_table->metrics_table, false);
                if (ret) {
                        dev_info(smu->adev->dev, "Failed to export SMU metrics table!\n");
@@ -893,7 +893,7 @@ static int renoir_set_watermarks_table(
        /* pass data to smu controller */
        if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
             !(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
-               ret = smu_write_watermarks_table(smu);
+               ret = smu_cmn_write_watermarks_table(smu);
                if (ret) {
                        dev_err(smu->adev->dev, "Failed to update WMTABLE!");
                        return ret;

diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index 830d93a..9b3de4b 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -396,7 +396,7 @@ static int sienna_cichlid_get_smu_metrics_data(struct smu_context *smu,
        mutex_lock(&smu->metrics_lock);
        if (!smu_table->metrics_time ||
             time_after(jiffies, smu_table->metrics_time + msecs_to_jiffies(1))) {
-               ret = smu_update_table(smu,
+               ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_SMU_METRICS,
                                       0,
                                       smu_table->metrics_table,
@@ -1201,7 +1201,7 @@ static int sienna_cichlid_get_power_profile_mode(struct smu_context *smu, char *
                if (workload_type < 0)
                        return -EINVAL;
 
-               result = smu_update_table(smu,
+               result = smu_cmn_update_table(smu,
                                          SMU_TABLE_ACTIVITY_MONITOR_COEFF, workload_type,
                                          (void *)(&activity_monitor), false);
                if (result) {
@@ -1272,7 +1272,7 @@ static int sienna_cichlid_set_power_profile_mode(struct smu_context *smu, long *
 
        if (smu->power_profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) {
 
-               ret = smu_update_table(smu,
+               ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT,
                                       (void *)(&activity_monitor), false);
                if (ret) {
@@ -1316,7 +1316,7 @@ static int sienna_cichlid_set_power_profile_mode(struct smu_context *smu, long *
                        break;
                }
 
-               ret = smu_update_table(smu,
+               ret = smu_cmn_update_table(smu,
                                       SMU_TABLE_ACTIVITY_MONITOR_COEFF, WORKLOAD_PPLIB_CUSTOM_BIT,
                                       (void *)(&activity_monitor), true);
                if (ret) {
@@ -1439,7 +1439,7 @@ static int sienna_cichlid_set_watermarks_table(struct smu_context *smu,
 
        if ((smu->watermarks_bitmap & WATERMARKS_EXIST) &&
             !(smu->watermarks_bitmap & WATERMARKS_LOADED)) {
-               ret = smu_write_watermarks_table(smu);
+               ret = smu_cmn_write_watermarks_table(smu);
                if (ret) {
                        dev_err(smu->adev->dev, "Failed to update WMTABLE!");
                        return ret;
@@ -2441,7 +2441,7 @@ static const struct pptable_funcs sienna_cichlid_ppt_funcs = {
        .setup_pptable = sienna_cichlid_setup_pptable,
        .get_vbios_bootup_values = smu_v11_0_get_vbios_bootup_values,
        .check_fw_version = smu_v11_0_check_fw_version,
-       .write_pptable = smu_v11_0_write_pptable,
+       .write_pptable = smu_cmn_write_pptable,
        .set_driver_table_location = smu_v11_0_set_driver_table_location,
        .set_tool_table_location = smu_v11_0_set_tool_table_location,
        .notify_memory_pool_location = smu_v11_0_notify_memory_pool_location,

diff --git a/drivers/gpu/drm/amd/powerplay/smu_cmn.c b/drivers/gpu/drm/amd/powerplay/smu_cmn.c
index 814c21c..7f5439c 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_cmn.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_cmn.c
@@ -440,3 +440,72 @@ int smu_cmn_get_smc_version(struct smu_context *smu,
 
        return ret;
 }
+
+int smu_cmn_update_table(struct smu_context *smu,
+                        enum smu_table_id table_index,
+                        int argument,
+                        void *table_data,
+                        bool drv2smu)
+{
+       struct smu_table_context *smu_table = &smu->smu_table;
+       struct amdgpu_device *adev = smu->adev;
+       struct smu_table *table = &smu_table->driver_table;
+       int table_id = smu_cmn_to_asic_specific_index(smu,
+                                                     CMN2ASIC_MAPPING_TABLE,
+                                                     table_index);
+       uint32_t table_size;
+       int ret = 0;
+       if (!table_data || table_id >= SMU_TABLE_COUNT || table_id < 0)
+               return -EINVAL;
+
+       table_size = smu_table->tables[table_index].size;
+
+       if (drv2smu) {
+               memcpy(table->cpu_addr, table_data, table_size);
+               /*
+                * Flush hdp cache: to guard the content seen by
+                * GPU is consitent with CPU.
+                */
+               amdgpu_asic_flush_hdp(adev, NULL);
+       }
+
+       ret = smu_send_smc_msg_with_param(smu, drv2smu ?
+                                         SMU_MSG_TransferTableDram2Smu :
+                                         SMU_MSG_TransferTableSmu2Dram,
+                                         table_id | ((argument & 0xFFFF) << 16),
+                                         NULL);
+       if (ret)
+               return ret;
+
+       if (!drv2smu) {
+               amdgpu_asic_flush_hdp(adev, NULL);
+               memcpy(table_data, table->cpu_addr, table_size);
+       }
+
+       return ret;
+}
+
+int smu_cmn_write_watermarks_table(struct smu_context *smu)
+{
+       void *watermarks_table = smu->smu_table.watermarks_table;
+
+       if (!watermarks_table)
+               return -EINVAL;
+
+       return smu_cmn_update_table(smu,
+                                   SMU_TABLE_WATERMARKS,
+                                   0,
+                                   watermarks_table,
+                                   true);
+}
+
+int smu_cmn_write_pptable(struct smu_context *smu)
+{
+       void *pptable = smu->smu_table.driver_pptable;
+
+       return smu_cmn_update_table(smu,
+                                   SMU_TABLE_PPTABLE,
+                                   0,
+                                   pptable,
+                                   true);
+}

diff --git a/drivers/gpu/drm/amd/powerplay/smu_cmn.h b/drivers/gpu/drm/amd/powerplay/smu_cmn.h
index 9b1d2e9..214e778 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_cmn.h
+++ b/drivers/gpu/drm/amd/powerplay/smu_cmn.h
@@ -59,4 +59,14 @@ int smu_cmn_get_smc_version(struct smu_context *smu,
                            uint32_t *if_version,
                            uint32_t *smu_version);
 
+int smu_cmn_update_table(struct smu_context *smu,
+                        enum smu_table_id table_index,
+                        int argument,
+                        void *table_data,
+                        bool drv2smu);
+
+int smu_cmn_write_watermarks_table(struct smu_context *smu);
+
+int smu_cmn_write_pptable(struct smu_context *smu);
+
 #endif

diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
index 72fe5c8..0c0303a 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c
@@ -764,17 +764,6 @@ int smu_v11_0_notify_memory_pool_location(struct smu_context *smu)
        return ret;
 }
 
-int smu_v11_0_write_pptable(struct smu_context *smu)
-{
-       struct smu_table_context *table_context = &smu->smu_table;
-       int ret = 0;
-
-       ret = smu_update_table(smu, SMU_TABLE_PPTABLE, 0,
-                              table_context->driver_pptable, true);
-
-       return ret;
-}
-
 int smu_v11_0_set_min_deep_sleep_dcefclk(struct smu_context *smu, uint32_t clk)
 {
        int ret;

diff --git a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
index 7964f14..364358a 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
+++ b/drivers/gpu/drm/amd/powerplay/smu_v12_0.c
@@ -293,7 +293,7 @@ int smu_v12_0_set_default_dpm_tables(struct smu_context *smu)
 {
        struct smu_table_context *smu_table = &smu->smu_table;
 
-       return smu_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false);
+       return smu_cmn_update_table(smu, SMU_TABLE_DPMCLOCKS, 0, smu_table->clocks_table, false);
 }
 
 int smu_v12_0_mode2_reset(struct smu_context *smu){