ARM: dts: ls1021a: change dma channels order to match schema
authorLi Yang <leoyang.li@nxp.com>
Tue, 12 Oct 2021 23:58:09 +0000 (18:58 -0500)
committerShawn Guo <shawnguo@kernel.org>
Fri, 15 Oct 2021 03:16:21 +0000 (11:16 +0800)
Although the ordering of DMA channels was not relevant in the txt binding,
it is defined as ordered in the converted yaml schema.  Update the dts
to match the order.

Signed-off-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm/boot/dts/ls1021a.dtsi

index 77f983b..960de95 100644 (file)
                        reg = <0x0 0x2180000 0x0 0x10000>;
                        interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clockgen 4 1>;
-                       dma-names = "tx", "rx";
-                       dmas = <&edma0 1 39>, <&edma0 1 38>;
+                       dma-names = "rx", "tx";
+                       dmas = <&edma0 1 38>, <&edma0 1 39>;
                        status = "disabled";
                };
 
                        reg = <0x0 0x2190000 0x0 0x10000>;
                        interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clockgen 4 1>;
-                       dma-names = "tx", "rx";
-                       dmas = <&edma0 1 37>, <&edma0 1 36>;
+                       dma-names = "rx", "tx";
+                       dmas = <&edma0 1 36>, <&edma0 1 37>;
                        status = "disabled";
                };
 
                        reg = <0x0 0x21a0000 0x0 0x10000>;
                        interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&clockgen 4 1>;
-                       dma-names = "tx", "rx";
-                       dmas = <&edma0 1 35>, <&edma0 1 34>;
+                       dma-names = "rx", "tx";
+                       dmas = <&edma0 1 34>, <&edma0 1 35>;
                        status = "disabled";
                };