r600c: add evergreen ARL support.

Signed-off-by: Alberto Milone <alberto.milone@canonical.com>

diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c
index bee9c3b..024853c 100644 (file)
--- a/src/mesa/drivers/dri/r600/r700_assembler.c
+++ b/src/mesa/drivers/dri/r600/r700_assembler.c
@@ -481,6 +481,8 @@ unsigned int EG_GetNumOperands(GLuint opcode, GLuint nIsOp3)
     case EG_OP2_INST_FLT_TO_INT:
     case EG_OP2_INST_SIN:
     case EG_OP2_INST_COS:
+    case EG_OP2_INST_FLT_TO_INT_FLOOR:
+    case EG_OP2_INST_MOVA_INT:
         return 1;
         
     default: radeon_error(
@@ -3297,23 +3299,76 @@ GLboolean assemble_ARL(r700_AssemblerBase *pAsm)
         return GL_FALSE;
     }
 
-    pAsm->D.dst.opcode = SQ_OP2_INST_MOVA_FLOOR;
-    setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
-    pAsm->D.dst.rtype = DST_REG_TEMPORARY;
-    pAsm->D.dst.reg = 0;
-    pAsm->D.dst.writex = 0;
-    pAsm->D.dst.writey = 0;
-    pAsm->D.dst.writez = 0;
-    pAsm->D.dst.writew = 0;
-
-    if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+    if(8 == pAsm->unAsic)
     {
-        return GL_FALSE;
-    }
+        /* Evergreen */
 
-    if( GL_FALSE == next_ins(pAsm) )
+        /* Float to Signed Integer Using FLOOR */
+        pAsm->D.dst.opcode = EG_OP2_INST_FLT_TO_INT_FLOOR;
+        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
+        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+        pAsm->D.dst.reg = 0;
+        pAsm->D.dst.writex = 0;
+        pAsm->D.dst.writey = 0;
+        pAsm->D.dst.writez = 0;
+        pAsm->D.dst.writew = 0;
+
+        if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+        {
+            return GL_FALSE;
+        }
+
+        if( GL_FALSE == next_ins(pAsm) )
+        {
+            return GL_FALSE;
+        }
+
+        /* Copy Signed Integer To Integer in AR and GPR */
+        pAsm->D.dst.opcode = EG_OP2_INST_MOVA_INT;
+        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
+        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+        pAsm->D.dst.reg = 0;
+        pAsm->D.dst.writex = 0;
+        pAsm->D.dst.writey = 0;
+        pAsm->D.dst.writez = 0;
+        pAsm->D.dst.writew = 0;
+
+        if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+        {
+            return GL_FALSE;
+        }
+
+        if( GL_FALSE == next_ins(pAsm) )
+        {
+            return GL_FALSE;
+        }
+    }
+    else
     {
-        return GL_FALSE;
+        /* r6xx/r7xx */
+
+        /* Truncate floating-point to the nearest integer
+           in the range [-256, +255], and copy to AR and
+           to a GPR.
+        */
+        pAsm->D.dst.opcode = SQ_OP2_INST_MOVA_FLOOR;
+        setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);
+        pAsm->D.dst.rtype = DST_REG_TEMPORARY;
+        pAsm->D.dst.reg = 0;
+        pAsm->D.dst.writex = 0;
+        pAsm->D.dst.writey = 0;
+        pAsm->D.dst.writez = 0;
+        pAsm->D.dst.writew = 0;
+
+        if( GL_FALSE == assemble_src(pAsm, 0, -1) )
+        {
+            return GL_FALSE;
+        }
+
+        if( GL_FALSE == next_ins(pAsm) )
+        {
+            return GL_FALSE;
+        }
     }
 
     return GL_TRUE;